| Imre Deak | 7a055fc | 2007-07-17 04:05:57 -0700 | [diff] [blame] | 1 | #ifndef _DISPC_H |
| 2 | #define _DISPC_H |
| 3 | |
| 4 | #include <linux/interrupt.h> |
| 5 | |
| 6 | #define DISPC_PLANE_GFX 0 |
| 7 | #define DISPC_PLANE_VID1 1 |
| 8 | #define DISPC_PLANE_VID2 2 |
| 9 | |
| 10 | #define DISPC_RGB_1_BPP 0x00 |
| 11 | #define DISPC_RGB_2_BPP 0x01 |
| 12 | #define DISPC_RGB_4_BPP 0x02 |
| 13 | #define DISPC_RGB_8_BPP 0x03 |
| 14 | #define DISPC_RGB_12_BPP 0x04 |
| 15 | #define DISPC_RGB_16_BPP 0x06 |
| 16 | #define DISPC_RGB_24_BPP 0x08 |
| 17 | #define DISPC_RGB_24_BPP_UNPACK_32 0x09 |
| 18 | #define DISPC_YUV2_422 0x0a |
| 19 | #define DISPC_UYVY_422 0x0b |
| 20 | |
| 21 | #define DISPC_BURST_4x32 0 |
| 22 | #define DISPC_BURST_8x32 1 |
| 23 | #define DISPC_BURST_16x32 2 |
| 24 | |
| 25 | #define DISPC_LOAD_CLUT_AND_FRAME 0x00 |
| 26 | #define DISPC_LOAD_CLUT_ONLY 0x01 |
| 27 | #define DISPC_LOAD_FRAME_ONLY 0x02 |
| 28 | #define DISPC_LOAD_CLUT_ONCE_FRAME 0x03 |
| 29 | |
| 30 | #define DISPC_TFT_DATA_LINES_12 0 |
| 31 | #define DISPC_TFT_DATA_LINES_16 1 |
| 32 | #define DISPC_TFT_DATA_LINES_18 2 |
| 33 | #define DISPC_TFT_DATA_LINES_24 3 |
| 34 | |
| 35 | extern void omap_dispc_set_lcd_size(int width, int height); |
| 36 | |
| 37 | extern void omap_dispc_enable_lcd_out(int enable); |
| 38 | extern void omap_dispc_enable_digit_out(int enable); |
| 39 | |
| Daniel Stone | 4c88ef1 | 2009-09-22 16:46:57 -0700 | [diff] [blame] | 40 | extern int omap_dispc_request_irq(unsigned long irq_mask, |
| 41 | void (*callback)(void *data), void *data); |
| 42 | extern void omap_dispc_free_irq(unsigned long irq_mask, |
| 43 | void (*callback)(void *data), void *data); |
| Imre Deak | 7a055fc | 2007-07-17 04:05:57 -0700 | [diff] [blame] | 44 | |
| Russell King | 7c8ad98 | 2008-09-05 15:13:24 +0100 | [diff] [blame] | 45 | extern const struct lcd_ctrl omap2_int_ctrl; |
| Imre Deak | 7a055fc | 2007-07-17 04:05:57 -0700 | [diff] [blame] | 46 | #endif |