Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c24xx/clock.c |
| 2 | * |
Ben Dooks | 50f430e | 2009-11-13 22:54:12 +0000 | [diff] [blame] | 3 | * Copyright 2004-2005 Simtec Electronics |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * S3C24XX Core clock control support |
| 7 | * |
| 8 | * Based on, and code from linux/arch/arm/mach-versatile/clock.c |
| 9 | ** |
| 10 | ** Copyright (C) 2004 ARM Limited. |
| 11 | ** Written by Deep Blue Solutions Limited. |
| 12 | * |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify |
| 15 | * it under the terms of the GNU General Public License as published by |
| 16 | * the Free Software Foundation; either version 2 of the License, or |
| 17 | * (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, write to the Free Software |
| 26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/kernel.h> |
| 32 | #include <linux/list.h> |
| 33 | #include <linux/errno.h> |
| 34 | #include <linux/err.h> |
| 35 | #include <linux/platform_device.h> |
| 36 | #include <linux/sysdev.h> |
| 37 | #include <linux/interrupt.h> |
| 38 | #include <linux/ioport.h> |
| 39 | #include <linux/clk.h> |
| 40 | #include <linux/spinlock.h> |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 41 | #include <linux/io.h> |
Amit Daniel Kachhap | 436c387 | 2011-01-12 13:40:04 +0900 | [diff] [blame] | 42 | #if defined(CONFIG_DEBUG_FS) |
| 43 | #include <linux/debugfs.h> |
| 44 | #endif |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 45 | |
| 46 | #include <mach/hardware.h> |
| 47 | #include <asm/irq.h> |
| 48 | |
| 49 | #include <plat/cpu-freq.h> |
| 50 | |
| 51 | #include <plat/clock.h> |
| 52 | #include <plat/cpu.h> |
| 53 | |
Marek Szyprowski | 7cf4b48 | 2010-10-07 17:19:10 +0900 | [diff] [blame] | 54 | #include <linux/serial_core.h> |
| 55 | #include <plat/regs-serial.h> /* for s3c24xx_uart_devs */ |
| 56 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 57 | /* clock information */ |
| 58 | |
| 59 | static LIST_HEAD(clocks); |
| 60 | |
| 61 | /* We originally used an mutex here, but some contexts (see resume) |
| 62 | * are calling functions such as clk_set_parent() with IRQs disabled |
| 63 | * causing an BUG to be triggered. |
| 64 | */ |
| 65 | DEFINE_SPINLOCK(clocks_lock); |
| 66 | |
| 67 | /* enable and disable calls for use with the clk struct */ |
| 68 | |
| 69 | static int clk_null_enable(struct clk *clk, int enable) |
| 70 | { |
| 71 | return 0; |
| 72 | } |
| 73 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 74 | int clk_enable(struct clk *clk) |
| 75 | { |
| 76 | if (IS_ERR(clk) || clk == NULL) |
| 77 | return -EINVAL; |
| 78 | |
| 79 | clk_enable(clk->parent); |
| 80 | |
| 81 | spin_lock(&clocks_lock); |
| 82 | |
| 83 | if ((clk->usage++) == 0) |
| 84 | (clk->enable)(clk, 1); |
| 85 | |
| 86 | spin_unlock(&clocks_lock); |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | void clk_disable(struct clk *clk) |
| 91 | { |
| 92 | if (IS_ERR(clk) || clk == NULL) |
| 93 | return; |
| 94 | |
| 95 | spin_lock(&clocks_lock); |
| 96 | |
| 97 | if ((--clk->usage) == 0) |
| 98 | (clk->enable)(clk, 0); |
| 99 | |
| 100 | spin_unlock(&clocks_lock); |
| 101 | clk_disable(clk->parent); |
| 102 | } |
| 103 | |
| 104 | |
| 105 | unsigned long clk_get_rate(struct clk *clk) |
| 106 | { |
| 107 | if (IS_ERR(clk)) |
| 108 | return 0; |
| 109 | |
| 110 | if (clk->rate != 0) |
| 111 | return clk->rate; |
| 112 | |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 113 | if (clk->ops != NULL && clk->ops->get_rate != NULL) |
| 114 | return (clk->ops->get_rate)(clk); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 115 | |
| 116 | if (clk->parent != NULL) |
| 117 | return clk_get_rate(clk->parent); |
| 118 | |
| 119 | return clk->rate; |
| 120 | } |
| 121 | |
| 122 | long clk_round_rate(struct clk *clk, unsigned long rate) |
| 123 | { |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 124 | if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate) |
| 125 | return (clk->ops->round_rate)(clk, rate); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 126 | |
| 127 | return rate; |
| 128 | } |
| 129 | |
| 130 | int clk_set_rate(struct clk *clk, unsigned long rate) |
| 131 | { |
| 132 | int ret; |
| 133 | |
| 134 | if (IS_ERR(clk)) |
| 135 | return -EINVAL; |
| 136 | |
| 137 | /* We do not default just do a clk->rate = rate as |
| 138 | * the clock may have been made this way by choice. |
| 139 | */ |
| 140 | |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 141 | WARN_ON(clk->ops == NULL); |
| 142 | WARN_ON(clk->ops && clk->ops->set_rate == NULL); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 143 | |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 144 | if (clk->ops == NULL || clk->ops->set_rate == NULL) |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 145 | return -EINVAL; |
| 146 | |
| 147 | spin_lock(&clocks_lock); |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 148 | ret = (clk->ops->set_rate)(clk, rate); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 149 | spin_unlock(&clocks_lock); |
| 150 | |
| 151 | return ret; |
| 152 | } |
| 153 | |
| 154 | struct clk *clk_get_parent(struct clk *clk) |
| 155 | { |
| 156 | return clk->parent; |
| 157 | } |
| 158 | |
| 159 | int clk_set_parent(struct clk *clk, struct clk *parent) |
| 160 | { |
| 161 | int ret = 0; |
| 162 | |
| 163 | if (IS_ERR(clk)) |
| 164 | return -EINVAL; |
| 165 | |
| 166 | spin_lock(&clocks_lock); |
| 167 | |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 168 | if (clk->ops && clk->ops->set_parent) |
| 169 | ret = (clk->ops->set_parent)(clk, parent); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 170 | |
| 171 | spin_unlock(&clocks_lock); |
| 172 | |
| 173 | return ret; |
| 174 | } |
| 175 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 176 | EXPORT_SYMBOL(clk_enable); |
| 177 | EXPORT_SYMBOL(clk_disable); |
| 178 | EXPORT_SYMBOL(clk_get_rate); |
| 179 | EXPORT_SYMBOL(clk_round_rate); |
| 180 | EXPORT_SYMBOL(clk_set_rate); |
| 181 | EXPORT_SYMBOL(clk_get_parent); |
| 182 | EXPORT_SYMBOL(clk_set_parent); |
| 183 | |
| 184 | /* base clocks */ |
| 185 | |
Kukjin Kim | ed27684 | 2010-01-14 12:50:23 +0900 | [diff] [blame] | 186 | int clk_default_setrate(struct clk *clk, unsigned long rate) |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 187 | { |
| 188 | clk->rate = rate; |
| 189 | return 0; |
| 190 | } |
| 191 | |
Kukjin Kim | ed27684 | 2010-01-14 12:50:23 +0900 | [diff] [blame] | 192 | struct clk_ops clk_ops_def_setrate = { |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 193 | .set_rate = clk_default_setrate, |
| 194 | }; |
| 195 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 196 | struct clk clk_xtal = { |
| 197 | .name = "xtal", |
| 198 | .id = -1, |
| 199 | .rate = 0, |
| 200 | .parent = NULL, |
| 201 | .ctrlbit = 0, |
| 202 | }; |
| 203 | |
Ben Dooks | 4b31d8b | 2008-10-21 14:07:00 +0100 | [diff] [blame] | 204 | struct clk clk_ext = { |
| 205 | .name = "ext", |
| 206 | .id = -1, |
| 207 | }; |
| 208 | |
| 209 | struct clk clk_epll = { |
| 210 | .name = "epll", |
| 211 | .id = -1, |
| 212 | }; |
| 213 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 214 | struct clk clk_mpll = { |
| 215 | .name = "mpll", |
| 216 | .id = -1, |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 217 | .ops = &clk_ops_def_setrate, |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 218 | }; |
| 219 | |
| 220 | struct clk clk_upll = { |
| 221 | .name = "upll", |
| 222 | .id = -1, |
| 223 | .parent = NULL, |
| 224 | .ctrlbit = 0, |
| 225 | }; |
| 226 | |
| 227 | struct clk clk_f = { |
| 228 | .name = "fclk", |
| 229 | .id = -1, |
| 230 | .rate = 0, |
| 231 | .parent = &clk_mpll, |
| 232 | .ctrlbit = 0, |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 233 | }; |
| 234 | |
| 235 | struct clk clk_h = { |
| 236 | .name = "hclk", |
| 237 | .id = -1, |
| 238 | .rate = 0, |
| 239 | .parent = NULL, |
| 240 | .ctrlbit = 0, |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 241 | .ops = &clk_ops_def_setrate, |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 242 | }; |
| 243 | |
| 244 | struct clk clk_p = { |
| 245 | .name = "pclk", |
| 246 | .id = -1, |
| 247 | .rate = 0, |
| 248 | .parent = NULL, |
| 249 | .ctrlbit = 0, |
Ben Dooks | b3bf41b | 2009-12-01 01:24:37 +0000 | [diff] [blame] | 250 | .ops = &clk_ops_def_setrate, |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 251 | }; |
| 252 | |
| 253 | struct clk clk_usb_bus = { |
| 254 | .name = "usb-bus", |
| 255 | .id = -1, |
| 256 | .rate = 0, |
| 257 | .parent = &clk_upll, |
| 258 | }; |
| 259 | |
| 260 | |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 261 | struct clk s3c24xx_uclk = { |
| 262 | .name = "uclk", |
| 263 | .id = -1, |
| 264 | }; |
| 265 | |
| 266 | /* initialise the clock system */ |
| 267 | |
Ben Dooks | 8428d47 | 2010-01-25 10:44:10 +0900 | [diff] [blame] | 268 | /** |
| 269 | * s3c24xx_register_clock() - register a clock |
| 270 | * @clk: The clock to register |
| 271 | * |
| 272 | * Add the specified clock to the list of clocks known by the system. |
| 273 | */ |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 274 | int s3c24xx_register_clock(struct clk *clk) |
| 275 | { |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 276 | if (clk->enable == NULL) |
| 277 | clk->enable = clk_null_enable; |
| 278 | |
Thomas Abraham | f86c666 | 2011-06-14 19:12:26 +0900 | [diff] [blame^] | 279 | /* fill up the clk_lookup structure and register it*/ |
| 280 | clk->lookup.dev_id = clk->devname; |
| 281 | clk->lookup.con_id = clk->name; |
| 282 | clk->lookup.clk = clk; |
| 283 | clkdev_add(&clk->lookup); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 284 | |
| 285 | return 0; |
| 286 | } |
| 287 | |
Ben Dooks | 8428d47 | 2010-01-25 10:44:10 +0900 | [diff] [blame] | 288 | /** |
| 289 | * s3c24xx_register_clocks() - register an array of clock pointers |
| 290 | * @clks: Pointer to an array of struct clk pointers |
| 291 | * @nr_clks: The number of clocks in the @clks array. |
| 292 | * |
| 293 | * Call s3c24xx_register_clock() for all the clock pointers contained |
| 294 | * in the @clks list. Returns the number of failures. |
| 295 | */ |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 296 | int s3c24xx_register_clocks(struct clk **clks, int nr_clks) |
| 297 | { |
| 298 | int fails = 0; |
| 299 | |
| 300 | for (; nr_clks > 0; nr_clks--, clks++) { |
Ben Dooks | 50ee2d3 | 2010-01-25 10:46:51 +0900 | [diff] [blame] | 301 | if (s3c24xx_register_clock(*clks) < 0) { |
| 302 | struct clk *clk = *clks; |
| 303 | printk(KERN_ERR "%s: failed to register %p: %s\n", |
| 304 | __func__, clk, clk->name); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 305 | fails++; |
Ben Dooks | 50ee2d3 | 2010-01-25 10:46:51 +0900 | [diff] [blame] | 306 | } |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | return fails; |
| 310 | } |
| 311 | |
Ben Dooks | 1d9f13c | 2010-01-06 01:21:38 +0900 | [diff] [blame] | 312 | /** |
| 313 | * s3c_register_clocks() - register an array of clocks |
| 314 | * @clkp: Pointer to the first clock in the array. |
| 315 | * @nr_clks: Number of clocks to register. |
| 316 | * |
| 317 | * Call s3c24xx_register_clock() on the @clkp array given, printing an |
| 318 | * error if it fails to register the clock (unlikely). |
| 319 | */ |
Ben Dooks | ab5d97d | 2010-01-25 10:39:23 +0900 | [diff] [blame] | 320 | void __init s3c_register_clocks(struct clk *clkp, int nr_clks) |
Ben Dooks | 1d9f13c | 2010-01-06 01:21:38 +0900 | [diff] [blame] | 321 | { |
| 322 | int ret; |
| 323 | |
| 324 | for (; nr_clks > 0; nr_clks--, clkp++) { |
| 325 | ret = s3c24xx_register_clock(clkp); |
| 326 | |
| 327 | if (ret < 0) { |
| 328 | printk(KERN_ERR "Failed to register clock %s (%d)\n", |
| 329 | clkp->name, ret); |
| 330 | } |
| 331 | } |
| 332 | } |
| 333 | |
Ben Dooks | 4e04691 | 2010-04-28 12:58:13 +0900 | [diff] [blame] | 334 | /** |
| 335 | * s3c_disable_clocks() - disable an array of clocks |
| 336 | * @clkp: Pointer to the first clock in the array. |
| 337 | * @nr_clks: Number of clocks to register. |
| 338 | * |
| 339 | * for internal use only at initialisation time. disable the clocks in the |
| 340 | * @clkp array. |
| 341 | */ |
| 342 | |
| 343 | void __init s3c_disable_clocks(struct clk *clkp, int nr_clks) |
| 344 | { |
| 345 | for (; nr_clks > 0; nr_clks--, clkp++) |
| 346 | (clkp->enable)(clkp, 0); |
| 347 | } |
| 348 | |
Uwe Kleine-König | 421f91d | 2010-06-11 12:17:00 +0200 | [diff] [blame] | 349 | /* initialise all the clocks */ |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 350 | |
| 351 | int __init s3c24xx_register_baseclocks(unsigned long xtal) |
| 352 | { |
Ben Dooks | 50f430e | 2009-11-13 22:54:12 +0000 | [diff] [blame] | 353 | printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n"); |
Ben Dooks | adbefaa | 2008-10-21 14:06:54 +0100 | [diff] [blame] | 354 | |
| 355 | clk_xtal.rate = xtal; |
| 356 | |
| 357 | /* register our clocks */ |
| 358 | |
| 359 | if (s3c24xx_register_clock(&clk_xtal) < 0) |
| 360 | printk(KERN_ERR "failed to register master xtal\n"); |
| 361 | |
| 362 | if (s3c24xx_register_clock(&clk_mpll) < 0) |
| 363 | printk(KERN_ERR "failed to register mpll clock\n"); |
| 364 | |
| 365 | if (s3c24xx_register_clock(&clk_upll) < 0) |
| 366 | printk(KERN_ERR "failed to register upll clock\n"); |
| 367 | |
| 368 | if (s3c24xx_register_clock(&clk_f) < 0) |
| 369 | printk(KERN_ERR "failed to register cpu fclk\n"); |
| 370 | |
| 371 | if (s3c24xx_register_clock(&clk_h) < 0) |
| 372 | printk(KERN_ERR "failed to register cpu hclk\n"); |
| 373 | |
| 374 | if (s3c24xx_register_clock(&clk_p) < 0) |
| 375 | printk(KERN_ERR "failed to register cpu pclk\n"); |
| 376 | |
| 377 | return 0; |
| 378 | } |
| 379 | |
Amit Daniel Kachhap | 436c387 | 2011-01-12 13:40:04 +0900 | [diff] [blame] | 380 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
| 381 | /* debugfs support to trace clock tree hierarchy and attributes */ |
| 382 | |
| 383 | static struct dentry *clk_debugfs_root; |
| 384 | |
| 385 | static int clk_debugfs_register_one(struct clk *c) |
| 386 | { |
| 387 | int err; |
| 388 | struct dentry *d, *child, *child_tmp; |
| 389 | struct clk *pa = c->parent; |
| 390 | char s[255]; |
| 391 | char *p = s; |
| 392 | |
Thomas Abraham | f86c666 | 2011-06-14 19:12:26 +0900 | [diff] [blame^] | 393 | p += sprintf(p, "%s", c->devname); |
Amit Daniel Kachhap | 436c387 | 2011-01-12 13:40:04 +0900 | [diff] [blame] | 394 | |
| 395 | d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); |
| 396 | if (!d) |
| 397 | return -ENOMEM; |
| 398 | |
| 399 | c->dent = d; |
| 400 | |
| 401 | d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage); |
| 402 | if (!d) { |
| 403 | err = -ENOMEM; |
| 404 | goto err_out; |
| 405 | } |
| 406 | |
| 407 | d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); |
| 408 | if (!d) { |
| 409 | err = -ENOMEM; |
| 410 | goto err_out; |
| 411 | } |
| 412 | return 0; |
| 413 | |
| 414 | err_out: |
| 415 | d = c->dent; |
| 416 | list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) |
| 417 | debugfs_remove(child); |
| 418 | debugfs_remove(c->dent); |
| 419 | return err; |
| 420 | } |
| 421 | |
| 422 | static int clk_debugfs_register(struct clk *c) |
| 423 | { |
| 424 | int err; |
| 425 | struct clk *pa = c->parent; |
| 426 | |
| 427 | if (pa && !pa->dent) { |
| 428 | err = clk_debugfs_register(pa); |
| 429 | if (err) |
| 430 | return err; |
| 431 | } |
| 432 | |
| 433 | if (!c->dent) { |
| 434 | err = clk_debugfs_register_one(c); |
| 435 | if (err) |
| 436 | return err; |
| 437 | } |
| 438 | return 0; |
| 439 | } |
| 440 | |
| 441 | static int __init clk_debugfs_init(void) |
| 442 | { |
| 443 | struct clk *c; |
| 444 | struct dentry *d; |
| 445 | int err; |
| 446 | |
| 447 | d = debugfs_create_dir("clock", NULL); |
| 448 | if (!d) |
| 449 | return -ENOMEM; |
| 450 | clk_debugfs_root = d; |
| 451 | |
| 452 | list_for_each_entry(c, &clocks, list) { |
| 453 | err = clk_debugfs_register(c); |
| 454 | if (err) |
| 455 | goto err_out; |
| 456 | } |
| 457 | return 0; |
| 458 | |
| 459 | err_out: |
| 460 | debugfs_remove_recursive(clk_debugfs_root); |
| 461 | return err; |
| 462 | } |
| 463 | late_initcall(clk_debugfs_init); |
| 464 | |
| 465 | #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ |