Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * ARM Ltd. Fast Models |
| 3 | * |
| 4 | * Architecture Envelope Model (AEM) ARMv8-A |
| 5 | * ARMAEMv8AMPCT |
| 6 | * |
| 7 | * RTSM_VE_AEMv8A.lisa |
| 8 | */ |
| 9 | |
| 10 | /dts-v1/; |
| 11 | |
| 12 | /memreserve/ 0x80000000 0x00010000; |
| 13 | |
| 14 | / { |
| 15 | model = "RTSM_VE_AEMv8A"; |
| 16 | compatible = "arm,rtsm_ve,aemv8a", "arm,vexpress"; |
| 17 | interrupt-parent = <&gic>; |
| 18 | #address-cells = <2>; |
| 19 | #size-cells = <2>; |
| 20 | |
| 21 | chosen { }; |
| 22 | |
| 23 | aliases { |
| 24 | serial0 = &v2m_serial0; |
| 25 | serial1 = &v2m_serial1; |
| 26 | serial2 = &v2m_serial2; |
| 27 | serial3 = &v2m_serial3; |
| 28 | }; |
| 29 | |
| 30 | cpus { |
| 31 | #address-cells = <2>; |
| 32 | #size-cells = <0>; |
| 33 | |
| 34 | cpu@0 { |
| 35 | device_type = "cpu"; |
| 36 | compatible = "arm,armv8"; |
| 37 | reg = <0x0 0x0>; |
| 38 | enable-method = "spin-table"; |
| 39 | cpu-release-addr = <0x0 0x8000fff8>; |
Sudeep Holla | 7934d69 | 2015-01-21 12:02:30 +0000 | [diff] [blame] | 40 | next-level-cache = <&L2_0>; |
Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 41 | }; |
| 42 | cpu@1 { |
| 43 | device_type = "cpu"; |
| 44 | compatible = "arm,armv8"; |
| 45 | reg = <0x0 0x1>; |
| 46 | enable-method = "spin-table"; |
| 47 | cpu-release-addr = <0x0 0x8000fff8>; |
Sudeep Holla | 7934d69 | 2015-01-21 12:02:30 +0000 | [diff] [blame] | 48 | next-level-cache = <&L2_0>; |
Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 49 | }; |
| 50 | cpu@2 { |
| 51 | device_type = "cpu"; |
| 52 | compatible = "arm,armv8"; |
| 53 | reg = <0x0 0x2>; |
| 54 | enable-method = "spin-table"; |
| 55 | cpu-release-addr = <0x0 0x8000fff8>; |
Sudeep Holla | 7934d69 | 2015-01-21 12:02:30 +0000 | [diff] [blame] | 56 | next-level-cache = <&L2_0>; |
Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 57 | }; |
| 58 | cpu@3 { |
| 59 | device_type = "cpu"; |
| 60 | compatible = "arm,armv8"; |
| 61 | reg = <0x0 0x3>; |
| 62 | enable-method = "spin-table"; |
| 63 | cpu-release-addr = <0x0 0x8000fff8>; |
Sudeep Holla | 7934d69 | 2015-01-21 12:02:30 +0000 | [diff] [blame] | 64 | next-level-cache = <&L2_0>; |
| 65 | }; |
| 66 | |
| 67 | L2_0: l2-cache0 { |
| 68 | compatible = "cache"; |
Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 69 | }; |
| 70 | }; |
| 71 | |
| 72 | memory@80000000 { |
| 73 | device_type = "memory"; |
| 74 | reg = <0x00000000 0x80000000 0 0x80000000>, |
| 75 | <0x00000008 0x80000000 0 0x80000000>; |
| 76 | }; |
| 77 | |
| 78 | gic: interrupt-controller@2c001000 { |
| 79 | compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; |
| 80 | #interrupt-cells = <3>; |
| 81 | #address-cells = <0>; |
| 82 | interrupt-controller; |
| 83 | reg = <0x0 0x2c001000 0 0x1000>, |
| 84 | <0x0 0x2c002000 0 0x1000>, |
| 85 | <0x0 0x2c004000 0 0x2000>, |
| 86 | <0x0 0x2c006000 0 0x2000>; |
| 87 | interrupts = <1 9 0xf04>; |
| 88 | }; |
| 89 | |
| 90 | timer { |
| 91 | compatible = "arm,armv8-timer"; |
Liviu Dudau | 6bc474d | 2014-11-27 14:36:45 +0000 | [diff] [blame] | 92 | interrupts = <1 13 0xf08>, |
| 93 | <1 14 0xf08>, |
| 94 | <1 11 0xf08>, |
| 95 | <1 10 0xf08>; |
Pawel Moll | 90556ca | 2012-11-21 11:44:28 +0000 | [diff] [blame] | 96 | clock-frequency = <100000000>; |
| 97 | }; |
| 98 | |
| 99 | pmu { |
| 100 | compatible = "arm,armv8-pmuv3"; |
| 101 | interrupts = <0 60 4>, |
| 102 | <0 61 4>, |
| 103 | <0 62 4>, |
| 104 | <0 63 4>; |
| 105 | }; |
| 106 | |
| 107 | smb { |
| 108 | compatible = "simple-bus"; |
| 109 | |
| 110 | #address-cells = <2>; |
| 111 | #size-cells = <1>; |
| 112 | ranges = <0 0 0 0x08000000 0x04000000>, |
| 113 | <1 0 0 0x14000000 0x04000000>, |
| 114 | <2 0 0 0x18000000 0x04000000>, |
| 115 | <3 0 0 0x1c000000 0x04000000>, |
| 116 | <4 0 0 0x0c000000 0x04000000>, |
| 117 | <5 0 0 0x10000000 0x04000000>; |
| 118 | |
| 119 | #interrupt-cells = <1>; |
| 120 | interrupt-map-mask = <0 0 63>; |
| 121 | interrupt-map = <0 0 0 &gic 0 0 4>, |
| 122 | <0 0 1 &gic 0 1 4>, |
| 123 | <0 0 2 &gic 0 2 4>, |
| 124 | <0 0 3 &gic 0 3 4>, |
| 125 | <0 0 4 &gic 0 4 4>, |
| 126 | <0 0 5 &gic 0 5 4>, |
| 127 | <0 0 6 &gic 0 6 4>, |
| 128 | <0 0 7 &gic 0 7 4>, |
| 129 | <0 0 8 &gic 0 8 4>, |
| 130 | <0 0 9 &gic 0 9 4>, |
| 131 | <0 0 10 &gic 0 10 4>, |
| 132 | <0 0 11 &gic 0 11 4>, |
| 133 | <0 0 12 &gic 0 12 4>, |
| 134 | <0 0 13 &gic 0 13 4>, |
| 135 | <0 0 14 &gic 0 14 4>, |
| 136 | <0 0 15 &gic 0 15 4>, |
| 137 | <0 0 16 &gic 0 16 4>, |
| 138 | <0 0 17 &gic 0 17 4>, |
| 139 | <0 0 18 &gic 0 18 4>, |
| 140 | <0 0 19 &gic 0 19 4>, |
| 141 | <0 0 20 &gic 0 20 4>, |
| 142 | <0 0 21 &gic 0 21 4>, |
| 143 | <0 0 22 &gic 0 22 4>, |
| 144 | <0 0 23 &gic 0 23 4>, |
| 145 | <0 0 24 &gic 0 24 4>, |
| 146 | <0 0 25 &gic 0 25 4>, |
| 147 | <0 0 26 &gic 0 26 4>, |
| 148 | <0 0 27 &gic 0 27 4>, |
| 149 | <0 0 28 &gic 0 28 4>, |
| 150 | <0 0 29 &gic 0 29 4>, |
| 151 | <0 0 30 &gic 0 30 4>, |
| 152 | <0 0 31 &gic 0 31 4>, |
| 153 | <0 0 32 &gic 0 32 4>, |
| 154 | <0 0 33 &gic 0 33 4>, |
| 155 | <0 0 34 &gic 0 34 4>, |
| 156 | <0 0 35 &gic 0 35 4>, |
| 157 | <0 0 36 &gic 0 36 4>, |
| 158 | <0 0 37 &gic 0 37 4>, |
| 159 | <0 0 38 &gic 0 38 4>, |
| 160 | <0 0 39 &gic 0 39 4>, |
| 161 | <0 0 40 &gic 0 40 4>, |
| 162 | <0 0 41 &gic 0 41 4>, |
| 163 | <0 0 42 &gic 0 42 4>; |
| 164 | |
| 165 | /include/ "rtsm_ve-motherboard.dtsi" |
| 166 | }; |
| 167 | }; |