Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 1 | /* |
Sujith Manoharan | 5b68138 | 2011-05-17 13:36:18 +0530 | [diff] [blame] | 2 | * Copyright (c) 2008-2011 Atheros Communications Inc. |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
Luis R. Rodriguez | 5bb1279 | 2009-09-14 00:55:09 -0700 | [diff] [blame] | 17 | #include "hw.h" |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 18 | |
Sujith | 79d7f4b | 2010-06-01 15:14:06 +0530 | [diff] [blame] | 19 | void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val) |
| 20 | { |
| 21 | REG_WRITE(ah, reg, val); |
| 22 | |
| 23 | if (ah->config.analog_shiftreg) |
| 24 | udelay(100); |
| 25 | } |
| 26 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 27 | void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, |
| 28 | u32 shift, u32 val) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 29 | { |
Oleksij Rempel | 2028523b | 2015-03-22 19:29:59 +0100 | [diff] [blame] | 30 | REG_RMW(ah, reg, ((val << shift) & mask), mask); |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 31 | |
Sujith | 2660b81 | 2009-02-09 13:27:26 +0530 | [diff] [blame] | 32 | if (ah->config.analog_shiftreg) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 33 | udelay(100); |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 34 | } |
| 35 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 36 | int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, |
| 37 | int16_t targetLeft, int16_t targetRight) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 38 | { |
| 39 | int16_t rv; |
| 40 | |
| 41 | if (srcRight == srcLeft) { |
| 42 | rv = targetLeft; |
| 43 | } else { |
| 44 | rv = (int16_t) (((target - srcLeft) * targetRight + |
| 45 | (srcRight - target) * targetLeft) / |
| 46 | (srcRight - srcLeft)); |
| 47 | } |
| 48 | return rv; |
| 49 | } |
| 50 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 51 | bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, |
| 52 | u16 *indexL, u16 *indexR) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 53 | { |
| 54 | u16 i; |
| 55 | |
| 56 | if (target <= pList[0]) { |
| 57 | *indexL = *indexR = 0; |
| 58 | return true; |
| 59 | } |
| 60 | if (target >= pList[listSize - 1]) { |
| 61 | *indexL = *indexR = (u16) (listSize - 1); |
| 62 | return true; |
| 63 | } |
| 64 | |
| 65 | for (i = 0; i < listSize - 1; i++) { |
| 66 | if (pList[i] == target) { |
| 67 | *indexL = *indexR = i; |
| 68 | return true; |
| 69 | } |
| 70 | if (target < pList[i + 1]) { |
| 71 | *indexL = i; |
| 72 | *indexR = (u16) (i + 1); |
| 73 | return false; |
| 74 | } |
| 75 | } |
| 76 | return false; |
| 77 | } |
| 78 | |
Sujith Manoharan | 04cf53f | 2011-01-04 13:17:28 +0530 | [diff] [blame] | 79 | void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data, |
| 80 | int eep_start_loc, int size) |
| 81 | { |
| 82 | int i = 0, j, addr; |
| 83 | u32 addrdata[8]; |
| 84 | u32 data[8]; |
| 85 | |
| 86 | for (addr = 0; addr < size; addr++) { |
| 87 | addrdata[i] = AR5416_EEPROM_OFFSET + |
| 88 | ((addr + eep_start_loc) << AR5416_EEPROM_S); |
| 89 | i++; |
| 90 | if (i == 8) { |
| 91 | REG_READ_MULTI(ah, addrdata, data, i); |
| 92 | |
| 93 | for (j = 0; j < i; j++) { |
| 94 | *eep_data = data[j]; |
| 95 | eep_data++; |
| 96 | } |
| 97 | i = 0; |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | if (i != 0) { |
| 102 | REG_READ_MULTI(ah, addrdata, data, i); |
| 103 | |
| 104 | for (j = 0; j < i; j++) { |
| 105 | *eep_data = data[j]; |
| 106 | eep_data++; |
| 107 | } |
| 108 | } |
| 109 | } |
| 110 | |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 111 | static bool ath9k_hw_nvram_read_blob(struct ath_hw *ah, u32 off, |
| 112 | u16 *data) |
| 113 | { |
| 114 | u16 *blob_data; |
| 115 | |
| 116 | if (off * sizeof(u16) > ah->eeprom_blob->size) |
| 117 | return false; |
| 118 | |
| 119 | blob_data = (u16 *)ah->eeprom_blob->data; |
| 120 | *data = blob_data[off]; |
| 121 | return true; |
| 122 | } |
| 123 | |
Gabor Juhos | 0e4b9f2 | 2012-12-10 15:30:27 +0100 | [diff] [blame] | 124 | bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 125 | { |
Gabor Juhos | 0e4b9f2 | 2012-12-10 15:30:27 +0100 | [diff] [blame] | 126 | struct ath_common *common = ath9k_hw_common(ah); |
Gabor Juhos | 2fd2cdf | 2012-12-10 15:30:25 +0100 | [diff] [blame] | 127 | bool ret; |
| 128 | |
Gabor Juhos | ab5c4f7 | 2012-12-10 15:30:28 +0100 | [diff] [blame] | 129 | if (ah->eeprom_blob) |
| 130 | ret = ath9k_hw_nvram_read_blob(ah, off, data); |
| 131 | else |
| 132 | ret = common->bus_ops->eeprom_read(common, off, data); |
| 133 | |
Gabor Juhos | 2fd2cdf | 2012-12-10 15:30:25 +0100 | [diff] [blame] | 134 | if (!ret) |
Gabor Juhos | 7177d8f | 2012-12-10 15:30:26 +0100 | [diff] [blame] | 135 | ath_dbg(common, EEPROM, |
| 136 | "unable to read eeprom region at offset %u\n", off); |
Gabor Juhos | 2fd2cdf | 2012-12-10 15:30:25 +0100 | [diff] [blame] | 137 | |
| 138 | return ret; |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 139 | } |
| 140 | |
Martin Blumenstingl | 6fa658f | 2015-10-31 13:57:32 +0100 | [diff] [blame] | 141 | int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size) |
| 142 | { |
| 143 | u16 magic; |
| 144 | u16 *eepdata; |
| 145 | int i; |
| 146 | struct ath_common *common = ath9k_hw_common(ah); |
| 147 | |
| 148 | if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { |
| 149 | ath_err(common, "Reading Magic # failed\n"); |
| 150 | return -EIO; |
| 151 | } |
| 152 | |
| 153 | if (magic == AR5416_EEPROM_MAGIC) { |
| 154 | *swap_needed = false; |
| 155 | } else if (swab16(magic) == AR5416_EEPROM_MAGIC) { |
| 156 | if (ah->ah_flags & AH_NO_EEP_SWAP) { |
| 157 | ath_info(common, |
| 158 | "Ignoring endianness difference in EEPROM magic bytes.\n"); |
| 159 | |
| 160 | *swap_needed = false; |
| 161 | } else { |
| 162 | *swap_needed = true; |
| 163 | } |
| 164 | } else { |
| 165 | ath_err(common, |
| 166 | "Invalid EEPROM Magic (0x%04x).\n", magic); |
| 167 | return -EINVAL; |
| 168 | } |
| 169 | |
| 170 | eepdata = (u16 *)(&ah->eeprom); |
| 171 | |
| 172 | if (*swap_needed) { |
| 173 | ath_dbg(common, EEPROM, |
| 174 | "EEPROM Endianness is not native.. Changing.\n"); |
| 175 | |
| 176 | for (i = 0; i < size; i++) |
| 177 | eepdata[i] = swab16(eepdata[i]); |
| 178 | } |
| 179 | |
| 180 | return 0; |
| 181 | } |
| 182 | |
| 183 | bool ath9k_hw_nvram_validate_checksum(struct ath_hw *ah, int size) |
| 184 | { |
| 185 | u32 i, sum = 0; |
| 186 | u16 *eepdata = (u16 *)(&ah->eeprom); |
| 187 | struct ath_common *common = ath9k_hw_common(ah); |
| 188 | |
| 189 | for (i = 0; i < size; i++) |
| 190 | sum ^= eepdata[i]; |
| 191 | |
| 192 | if (sum != 0xffff) { |
| 193 | ath_err(common, "Bad EEPROM checksum 0x%x\n", sum); |
| 194 | return false; |
| 195 | } |
| 196 | |
| 197 | return true; |
| 198 | } |
| 199 | |
| 200 | bool ath9k_hw_nvram_check_version(struct ath_hw *ah, int version, int minrev) |
| 201 | { |
| 202 | struct ath_common *common = ath9k_hw_common(ah); |
| 203 | |
| 204 | if (ah->eep_ops->get_eeprom_ver(ah) != version || |
| 205 | ah->eep_ops->get_eeprom_rev(ah) < minrev) { |
| 206 | ath_err(common, "Bad EEPROM VER 0x%04x or REV 0x%04x\n", |
| 207 | ah->eep_ops->get_eeprom_ver(ah), |
| 208 | ah->eep_ops->get_eeprom_rev(ah)); |
Dan Carpenter | 19f2ce3 | 2015-12-19 13:59:19 +0300 | [diff] [blame] | 209 | return false; |
Martin Blumenstingl | 6fa658f | 2015-10-31 13:57:32 +0100 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | return true; |
| 213 | } |
| 214 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 215 | void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, |
| 216 | u8 *pVpdList, u16 numIntercepts, |
| 217 | u8 *pRetVpdList) |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 218 | { |
| 219 | u16 i, k; |
| 220 | u8 currPwr = pwrMin; |
| 221 | u16 idxL = 0, idxR = 0; |
| 222 | |
| 223 | for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) { |
| 224 | ath9k_hw_get_lower_upper_index(currPwr, pPwrList, |
| 225 | numIntercepts, &(idxL), |
| 226 | &(idxR)); |
| 227 | if (idxR < 1) |
| 228 | idxR = 1; |
| 229 | if (idxL == numIntercepts - 1) |
| 230 | idxL = (u16) (numIntercepts - 2); |
| 231 | if (pPwrList[idxL] == pPwrList[idxR]) |
| 232 | k = pVpdList[idxL]; |
| 233 | else |
| 234 | k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] + |
| 235 | (pPwrList[idxR] - currPwr) * pVpdList[idxL]) / |
| 236 | (pPwrList[idxR] - pPwrList[idxL])); |
| 237 | pRetVpdList[i] = (u8) k; |
| 238 | currPwr += 2; |
| 239 | } |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 240 | } |
| 241 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 242 | void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah, |
| 243 | struct ath9k_channel *chan, |
| 244 | struct cal_target_power_leg *powInfo, |
| 245 | u16 numChannels, |
| 246 | struct cal_target_power_leg *pNewPower, |
| 247 | u16 numRates, bool isExtTarget) |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 248 | { |
| 249 | struct chan_centers centers; |
| 250 | u16 clo, chi; |
| 251 | int i; |
| 252 | int matchIndex = -1, lowIndex = -1; |
| 253 | u16 freq; |
| 254 | |
| 255 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 256 | freq = (isExtTarget) ? centers.ext_center : centers.ctl_center; |
| 257 | |
| 258 | if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, |
| 259 | IS_CHAN_2GHZ(chan))) { |
| 260 | matchIndex = 0; |
| 261 | } else { |
| 262 | for (i = 0; (i < numChannels) && |
| 263 | (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
| 264 | if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel, |
| 265 | IS_CHAN_2GHZ(chan))) { |
| 266 | matchIndex = i; |
| 267 | break; |
Roel Kluin | 73f57f8 | 2009-08-07 23:50:00 +0200 | [diff] [blame] | 268 | } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel, |
| 269 | IS_CHAN_2GHZ(chan)) && i > 0 && |
| 270 | freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel, |
| 271 | IS_CHAN_2GHZ(chan))) { |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 272 | lowIndex = i - 1; |
| 273 | break; |
| 274 | } |
| 275 | } |
| 276 | if ((matchIndex == -1) && (lowIndex == -1)) |
| 277 | matchIndex = i - 1; |
| 278 | } |
| 279 | |
| 280 | if (matchIndex != -1) { |
| 281 | *pNewPower = powInfo[matchIndex]; |
| 282 | } else { |
| 283 | clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel, |
| 284 | IS_CHAN_2GHZ(chan)); |
| 285 | chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel, |
| 286 | IS_CHAN_2GHZ(chan)); |
| 287 | |
| 288 | for (i = 0; i < numRates; i++) { |
| 289 | pNewPower->tPow2x[i] = |
| 290 | (u8)ath9k_hw_interpolate(freq, clo, chi, |
| 291 | powInfo[lowIndex].tPow2x[i], |
| 292 | powInfo[lowIndex + 1].tPow2x[i]); |
| 293 | } |
| 294 | } |
| 295 | } |
| 296 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 297 | void ath9k_hw_get_target_powers(struct ath_hw *ah, |
| 298 | struct ath9k_channel *chan, |
| 299 | struct cal_target_power_ht *powInfo, |
| 300 | u16 numChannels, |
| 301 | struct cal_target_power_ht *pNewPower, |
| 302 | u16 numRates, bool isHt40Target) |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 303 | { |
| 304 | struct chan_centers centers; |
| 305 | u16 clo, chi; |
| 306 | int i; |
| 307 | int matchIndex = -1, lowIndex = -1; |
| 308 | u16 freq; |
| 309 | |
| 310 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 311 | freq = isHt40Target ? centers.synth_center : centers.ctl_center; |
| 312 | |
| 313 | if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) { |
| 314 | matchIndex = 0; |
| 315 | } else { |
| 316 | for (i = 0; (i < numChannels) && |
| 317 | (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
| 318 | if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel, |
| 319 | IS_CHAN_2GHZ(chan))) { |
| 320 | matchIndex = i; |
| 321 | break; |
| 322 | } else |
Roel Kluin | 73f57f8 | 2009-08-07 23:50:00 +0200 | [diff] [blame] | 323 | if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel, |
| 324 | IS_CHAN_2GHZ(chan)) && i > 0 && |
| 325 | freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel, |
| 326 | IS_CHAN_2GHZ(chan))) { |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 327 | lowIndex = i - 1; |
| 328 | break; |
| 329 | } |
| 330 | } |
| 331 | if ((matchIndex == -1) && (lowIndex == -1)) |
| 332 | matchIndex = i - 1; |
| 333 | } |
| 334 | |
| 335 | if (matchIndex != -1) { |
| 336 | *pNewPower = powInfo[matchIndex]; |
| 337 | } else { |
| 338 | clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel, |
| 339 | IS_CHAN_2GHZ(chan)); |
| 340 | chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel, |
| 341 | IS_CHAN_2GHZ(chan)); |
| 342 | |
| 343 | for (i = 0; i < numRates; i++) { |
| 344 | pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq, |
| 345 | clo, chi, |
| 346 | powInfo[lowIndex].tPow2x[i], |
| 347 | powInfo[lowIndex + 1].tPow2x[i]); |
| 348 | } |
| 349 | } |
| 350 | } |
| 351 | |
Sujith | b5aec95 | 2009-08-07 09:45:15 +0530 | [diff] [blame] | 352 | u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, |
| 353 | bool is2GHz, int num_band_edges) |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 354 | { |
Felix Fietkau | 4ddfcd7 | 2010-12-12 00:51:08 +0100 | [diff] [blame] | 355 | u16 twiceMaxEdgePower = MAX_RATE_POWER; |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 356 | int i; |
| 357 | |
| 358 | for (i = 0; (i < num_band_edges) && |
| 359 | (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
| 360 | if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) { |
Felix Fietkau | e702ba1 | 2010-12-01 19:07:46 +0100 | [diff] [blame] | 361 | twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl); |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 362 | break; |
| 363 | } else if ((i > 0) && |
| 364 | (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, |
| 365 | is2GHz))) { |
| 366 | if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel, |
| 367 | is2GHz) < freq && |
Felix Fietkau | e702ba1 | 2010-12-01 19:07:46 +0100 | [diff] [blame] | 368 | CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) { |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 369 | twiceMaxEdgePower = |
Felix Fietkau | e702ba1 | 2010-12-01 19:07:46 +0100 | [diff] [blame] | 370 | CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl); |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 371 | } |
| 372 | break; |
| 373 | } |
| 374 | } |
| 375 | |
| 376 | return twiceMaxEdgePower; |
| 377 | } |
| 378 | |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 379 | u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit, |
| 380 | u8 antenna_reduction) |
| 381 | { |
Gabor Juhos | 8f942b9 | 2012-04-14 22:01:59 +0200 | [diff] [blame] | 382 | u16 reduction = antenna_reduction; |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 383 | |
| 384 | /* |
| 385 | * Reduce scaled Power by number of chains active |
| 386 | * to get the per chain tx power level. |
| 387 | */ |
| 388 | switch (ar5416_get_ntxchains(ah->txchainmask)) { |
| 389 | case 1: |
| 390 | break; |
| 391 | case 2: |
Gabor Juhos | 6010e72 | 2012-04-16 22:22:49 +0200 | [diff] [blame] | 392 | reduction += POWER_CORRECTION_FOR_TWO_CHAIN; |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 393 | break; |
| 394 | case 3: |
Gabor Juhos | 6010e72 | 2012-04-16 22:22:49 +0200 | [diff] [blame] | 395 | reduction += POWER_CORRECTION_FOR_THREE_CHAIN; |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 396 | break; |
| 397 | } |
| 398 | |
Gabor Juhos | 8f942b9 | 2012-04-14 22:01:59 +0200 | [diff] [blame] | 399 | if (power_limit > reduction) |
| 400 | power_limit -= reduction; |
| 401 | else |
| 402 | power_limit = 0; |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 403 | |
Gabor Juhos | 8f942b9 | 2012-04-14 22:01:59 +0200 | [diff] [blame] | 404 | return power_limit; |
Gabor Juhos | ea6f792 | 2012-04-14 22:01:58 +0200 | [diff] [blame] | 405 | } |
| 406 | |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 407 | void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah) |
| 408 | { |
| 409 | struct ath_common *common = ath9k_hw_common(ah); |
| 410 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
| 411 | |
| 412 | switch (ar5416_get_ntxchains(ah->txchainmask)) { |
| 413 | case 1: |
| 414 | break; |
| 415 | case 2: |
Gabor Juhos | 6010e72 | 2012-04-16 22:22:49 +0200 | [diff] [blame] | 416 | regulatory->max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 417 | break; |
| 418 | case 3: |
Gabor Juhos | 6010e72 | 2012-04-16 22:22:49 +0200 | [diff] [blame] | 419 | regulatory->max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN; |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 420 | break; |
| 421 | default: |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 422 | ath_dbg(common, EEPROM, "Invalid chainmask configuration\n"); |
Sujith | a55f858 | 2010-06-01 15:14:07 +0530 | [diff] [blame] | 423 | break; |
| 424 | } |
| 425 | } |
| 426 | |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 427 | void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, |
| 428 | struct ath9k_channel *chan, |
| 429 | void *pRawDataSet, |
| 430 | u8 *bChans, u16 availPiers, |
| 431 | u16 tPdGainOverlap, |
| 432 | u16 *pPdGainBoundaries, u8 *pPDADCValues, |
| 433 | u16 numXpdGains) |
| 434 | { |
| 435 | int i, j, k; |
| 436 | int16_t ss; |
| 437 | u16 idxL = 0, idxR = 0, numPiers; |
| 438 | static u8 vpdTableL[AR5416_NUM_PD_GAINS] |
| 439 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 440 | static u8 vpdTableR[AR5416_NUM_PD_GAINS] |
| 441 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 442 | static u8 vpdTableI[AR5416_NUM_PD_GAINS] |
| 443 | [AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
| 444 | |
| 445 | u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; |
| 446 | u8 minPwrT4[AR5416_NUM_PD_GAINS]; |
| 447 | u8 maxPwrT4[AR5416_NUM_PD_GAINS]; |
| 448 | int16_t vpdStep; |
| 449 | int16_t tmpVal; |
| 450 | u16 sizeCurrVpdTable, maxIndex, tgtIndex; |
| 451 | bool match; |
| 452 | int16_t minDelta = 0; |
| 453 | struct chan_centers centers; |
| 454 | int pdgain_boundary_default; |
| 455 | struct cal_data_per_freq *data_def = pRawDataSet; |
| 456 | struct cal_data_per_freq_4k *data_4k = pRawDataSet; |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 457 | struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet; |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 458 | bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah); |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 459 | int intercepts; |
| 460 | |
| 461 | if (AR_SREV_9287(ah)) |
| 462 | intercepts = AR9287_PD_GAIN_ICEPTS; |
| 463 | else |
| 464 | intercepts = AR5416_PD_GAIN_ICEPTS; |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 465 | |
| 466 | memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS); |
| 467 | ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
| 468 | |
| 469 | for (numPiers = 0; numPiers < availPiers; numPiers++) { |
| 470 | if (bChans[numPiers] == AR5416_BCHAN_UNUSED) |
| 471 | break; |
| 472 | } |
| 473 | |
| 474 | match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center, |
| 475 | IS_CHAN_2GHZ(chan)), |
| 476 | bChans, numPiers, &idxL, &idxR); |
| 477 | |
| 478 | if (match) { |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 479 | if (AR_SREV_9287(ah)) { |
| 480 | /* FIXME: array overrun? */ |
| 481 | for (i = 0; i < numXpdGains; i++) { |
| 482 | minPwrT4[i] = data_9287[idxL].pwrPdg[i][0]; |
| 483 | maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4]; |
| 484 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
| 485 | data_9287[idxL].pwrPdg[i], |
| 486 | data_9287[idxL].vpdPdg[i], |
| 487 | intercepts, |
| 488 | vpdTableI[i]); |
| 489 | } |
| 490 | } else if (eeprom_4k) { |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 491 | for (i = 0; i < numXpdGains; i++) { |
| 492 | minPwrT4[i] = data_4k[idxL].pwrPdg[i][0]; |
| 493 | maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4]; |
| 494 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
| 495 | data_4k[idxL].pwrPdg[i], |
| 496 | data_4k[idxL].vpdPdg[i], |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 497 | intercepts, |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 498 | vpdTableI[i]); |
| 499 | } |
| 500 | } else { |
| 501 | for (i = 0; i < numXpdGains; i++) { |
| 502 | minPwrT4[i] = data_def[idxL].pwrPdg[i][0]; |
| 503 | maxPwrT4[i] = data_def[idxL].pwrPdg[i][4]; |
| 504 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
| 505 | data_def[idxL].pwrPdg[i], |
| 506 | data_def[idxL].vpdPdg[i], |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 507 | intercepts, |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 508 | vpdTableI[i]); |
| 509 | } |
| 510 | } |
| 511 | } else { |
| 512 | for (i = 0; i < numXpdGains; i++) { |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 513 | if (AR_SREV_9287(ah)) { |
| 514 | pVpdL = data_9287[idxL].vpdPdg[i]; |
| 515 | pPwrL = data_9287[idxL].pwrPdg[i]; |
| 516 | pVpdR = data_9287[idxR].vpdPdg[i]; |
| 517 | pPwrR = data_9287[idxR].pwrPdg[i]; |
| 518 | } else if (eeprom_4k) { |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 519 | pVpdL = data_4k[idxL].vpdPdg[i]; |
| 520 | pPwrL = data_4k[idxL].pwrPdg[i]; |
| 521 | pVpdR = data_4k[idxR].vpdPdg[i]; |
| 522 | pPwrR = data_4k[idxR].pwrPdg[i]; |
| 523 | } else { |
| 524 | pVpdL = data_def[idxL].vpdPdg[i]; |
| 525 | pPwrL = data_def[idxL].pwrPdg[i]; |
| 526 | pVpdR = data_def[idxR].vpdPdg[i]; |
| 527 | pPwrR = data_def[idxR].pwrPdg[i]; |
| 528 | } |
| 529 | |
| 530 | minPwrT4[i] = max(pPwrL[0], pPwrR[0]); |
| 531 | |
| 532 | maxPwrT4[i] = |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 533 | min(pPwrL[intercepts - 1], |
| 534 | pPwrR[intercepts - 1]); |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 535 | |
| 536 | |
| 537 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
| 538 | pPwrL, pVpdL, |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 539 | intercepts, |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 540 | vpdTableL[i]); |
| 541 | ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
| 542 | pPwrR, pVpdR, |
Felix Fietkau | 940cd2c | 2010-12-12 00:51:10 +0100 | [diff] [blame] | 543 | intercepts, |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 544 | vpdTableR[i]); |
| 545 | |
| 546 | for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { |
| 547 | vpdTableI[i][j] = |
| 548 | (u8)(ath9k_hw_interpolate((u16) |
| 549 | FREQ2FBIN(centers. |
| 550 | synth_center, |
| 551 | IS_CHAN_2GHZ |
| 552 | (chan)), |
| 553 | bChans[idxL], bChans[idxR], |
| 554 | vpdTableL[i][j], vpdTableR[i][j])); |
| 555 | } |
| 556 | } |
| 557 | } |
| 558 | |
| 559 | k = 0; |
| 560 | |
| 561 | for (i = 0; i < numXpdGains; i++) { |
| 562 | if (i == (numXpdGains - 1)) |
| 563 | pPdGainBoundaries[i] = |
| 564 | (u16)(maxPwrT4[i] / 2); |
| 565 | else |
| 566 | pPdGainBoundaries[i] = |
| 567 | (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4); |
| 568 | |
| 569 | pPdGainBoundaries[i] = |
| 570 | min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); |
| 571 | |
Felix Fietkau | 1b8714f | 2011-09-15 14:25:35 +0200 | [diff] [blame] | 572 | minDelta = 0; |
Felix Fietkau | 115277a | 2010-12-12 00:51:09 +0100 | [diff] [blame] | 573 | |
| 574 | if (i == 0) { |
| 575 | if (AR_SREV_9280_20_OR_LATER(ah)) |
| 576 | ss = (int16_t)(0 - (minPwrT4[i] / 2)); |
| 577 | else |
| 578 | ss = 0; |
| 579 | } else { |
| 580 | ss = (int16_t)((pPdGainBoundaries[i - 1] - |
| 581 | (minPwrT4[i] / 2)) - |
| 582 | tPdGainOverlap + 1 + minDelta); |
| 583 | } |
| 584 | vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); |
| 585 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
| 586 | |
| 587 | while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { |
| 588 | tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); |
| 589 | pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); |
| 590 | ss++; |
| 591 | } |
| 592 | |
| 593 | sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1); |
| 594 | tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap - |
| 595 | (minPwrT4[i] / 2)); |
| 596 | maxIndex = (tgtIndex < sizeCurrVpdTable) ? |
| 597 | tgtIndex : sizeCurrVpdTable; |
| 598 | |
| 599 | while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { |
| 600 | pPDADCValues[k++] = vpdTableI[i][ss++]; |
| 601 | } |
| 602 | |
| 603 | vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - |
| 604 | vpdTableI[i][sizeCurrVpdTable - 2]); |
| 605 | vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
| 606 | |
| 607 | if (tgtIndex >= maxIndex) { |
| 608 | while ((ss <= tgtIndex) && |
| 609 | (k < (AR5416_NUM_PDADC_VALUES - 1))) { |
| 610 | tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] + |
| 611 | (ss - maxIndex + 1) * vpdStep)); |
| 612 | pPDADCValues[k++] = (u8)((tmpVal > 255) ? |
| 613 | 255 : tmpVal); |
| 614 | ss++; |
| 615 | } |
| 616 | } |
| 617 | } |
| 618 | |
| 619 | if (eeprom_4k) |
| 620 | pdgain_boundary_default = 58; |
| 621 | else |
| 622 | pdgain_boundary_default = pPdGainBoundaries[i - 1]; |
| 623 | |
| 624 | while (i < AR5416_PD_GAINS_IN_MASK) { |
| 625 | pPdGainBoundaries[i] = pdgain_boundary_default; |
| 626 | i++; |
| 627 | } |
| 628 | |
| 629 | while (k < AR5416_NUM_PDADC_VALUES) { |
| 630 | pPDADCValues[k] = pPDADCValues[k - 1]; |
| 631 | k++; |
| 632 | } |
| 633 | } |
| 634 | |
Luis R. Rodriguez | f637cfd | 2009-08-03 12:24:46 -0700 | [diff] [blame] | 635 | int ath9k_hw_eeprom_init(struct ath_hw *ah) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 636 | { |
| 637 | int status; |
Sujith | c16c9d0 | 2009-08-07 09:45:11 +0530 | [diff] [blame] | 638 | |
Senthil Balasubramanian | 15c9ee7 | 2010-04-15 17:39:14 -0400 | [diff] [blame] | 639 | if (AR_SREV_9300_20_OR_LATER(ah)) |
| 640 | ah->eep_ops = &eep_ar9300_ops; |
| 641 | else if (AR_SREV_9287(ah)) { |
Luis R. Rodriguez | 0b8f6f2b1 | 2010-04-15 17:39:12 -0400 | [diff] [blame] | 642 | ah->eep_ops = &eep_ar9287_ops; |
Luis R. Rodriguez | d7e7d22 | 2009-08-03 23:14:12 -0400 | [diff] [blame] | 643 | } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) { |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 644 | ah->eep_ops = &eep_4k_ops; |
| 645 | } else { |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 646 | ah->eep_ops = &eep_def_ops; |
| 647 | } |
Senthil Balasubramanian | e759407 | 2008-12-08 19:43:48 +0530 | [diff] [blame] | 648 | |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 649 | if (!ah->eep_ops->fill_eeprom(ah)) |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 650 | return -EIO; |
| 651 | |
Sujith | f74df6f | 2009-02-09 13:27:24 +0530 | [diff] [blame] | 652 | status = ah->eep_ops->check_eeprom(ah); |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 653 | |
| 654 | return status; |
| 655 | } |