Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-sh/processor.h |
| 3 | * |
| 4 | * Copyright (C) 1999, 2000 Niibe Yutaka |
| 5 | * Copyright (C) 2002, 2003 Paul Mundt |
| 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_SH_PROCESSOR_H |
| 9 | #define __ASM_SH_PROCESSOR_H |
| 10 | #ifdef __KERNEL__ |
| 11 | |
| 12 | #include <asm/page.h> |
| 13 | #include <asm/types.h> |
| 14 | #include <asm/cache.h> |
| 15 | #include <linux/threads.h> |
| 16 | #include <asm/ptrace.h> |
| 17 | |
| 18 | /* |
| 19 | * Default implementation of macro that returns current |
| 20 | * instruction pointer ("program counter"). |
| 21 | */ |
| 22 | #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) |
| 23 | |
| 24 | /* Core Processor Version Register */ |
| 25 | #define CCN_PVR 0xff000030 |
| 26 | #define CCN_CVR 0xff000040 |
| 27 | #define CCN_PRR 0xff000044 |
| 28 | |
| 29 | /* |
| 30 | * CPU type and hardware bug flags. Kept separately for each CPU. |
| 31 | * |
| 32 | * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry |
| 33 | * in arch/sh/Kconfig, as well as an entry in arch/sh/kernel/setup.c |
| 34 | * for parsing the subtype in get_cpu_subtype(). |
| 35 | */ |
| 36 | enum cpu_type { |
| 37 | /* SH-2 types */ |
| 38 | CPU_SH7604, |
| 39 | |
| 40 | /* SH-3 types */ |
| 41 | CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, |
| 42 | CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300, |
| 43 | |
| 44 | /* SH-4 types */ |
| 45 | CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, |
| 46 | CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, |
| 47 | CPU_SH73180, |
| 48 | |
| 49 | /* Unknown subtype */ |
| 50 | CPU_SH_NONE |
| 51 | }; |
| 52 | |
| 53 | struct sh_cpuinfo { |
| 54 | enum cpu_type type; |
| 55 | char hard_math; |
| 56 | unsigned long loops_per_jiffy; |
| 57 | |
| 58 | unsigned int cpu_clock, master_clock, bus_clock, module_clock; |
| 59 | #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 |
| 60 | unsigned int memory_clock; |
| 61 | #endif |
| 62 | |
| 63 | struct cache_info icache; |
| 64 | struct cache_info dcache; |
| 65 | |
| 66 | unsigned long flags; |
| 67 | }; |
| 68 | |
| 69 | extern struct sh_cpuinfo boot_cpu_data; |
| 70 | |
| 71 | #ifdef CONFIG_SMP |
| 72 | extern struct sh_cpuinfo cpu_data[]; |
| 73 | #define current_cpu_data cpu_data[smp_processor_id()] |
| 74 | #else |
| 75 | #define cpu_data (&boot_cpu_data) |
| 76 | #define current_cpu_data boot_cpu_data |
| 77 | #endif |
| 78 | |
| 79 | /* |
| 80 | * User space process size: 2GB. |
| 81 | * |
| 82 | * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff |
| 83 | */ |
| 84 | #define TASK_SIZE 0x7c000000UL |
| 85 | |
| 86 | /* This decides where the kernel will search for a free chunk of vm |
| 87 | * space during mmap's. |
| 88 | */ |
| 89 | #define TASK_UNMAPPED_BASE (TASK_SIZE / 3) |
| 90 | |
| 91 | /* |
| 92 | * Bit of SR register |
| 93 | * |
| 94 | * FD-bit: |
| 95 | * When it's set, it means the processor doesn't have right to use FPU, |
| 96 | * and it results exception when the floating operation is executed. |
| 97 | * |
| 98 | * IMASK-bit: |
| 99 | * Interrupt level mask |
| 100 | */ |
| 101 | #define SR_FD 0x00008000 |
| 102 | #define SR_DSP 0x00001000 |
| 103 | #define SR_IMASK 0x000000f0 |
| 104 | |
| 105 | /* |
| 106 | * FPU structure and data |
| 107 | */ |
| 108 | |
| 109 | struct sh_fpu_hard_struct { |
| 110 | unsigned long fp_regs[16]; |
| 111 | unsigned long xfp_regs[16]; |
| 112 | unsigned long fpscr; |
| 113 | unsigned long fpul; |
| 114 | |
| 115 | long status; /* software status information */ |
| 116 | }; |
| 117 | |
| 118 | /* Dummy fpu emulator */ |
| 119 | struct sh_fpu_soft_struct { |
| 120 | unsigned long fp_regs[16]; |
| 121 | unsigned long xfp_regs[16]; |
| 122 | unsigned long fpscr; |
| 123 | unsigned long fpul; |
| 124 | |
| 125 | unsigned char lookahead; |
| 126 | unsigned long entry_pc; |
| 127 | }; |
| 128 | |
| 129 | union sh_fpu_union { |
| 130 | struct sh_fpu_hard_struct hard; |
| 131 | struct sh_fpu_soft_struct soft; |
| 132 | }; |
| 133 | |
| 134 | /* |
| 135 | * Processor flags |
| 136 | */ |
| 137 | |
| 138 | #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ |
| 139 | #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ |
| 140 | #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ |
| 141 | #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ |
| 142 | #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ |
| 143 | |
| 144 | struct thread_struct { |
| 145 | unsigned long sp; |
| 146 | unsigned long pc; |
| 147 | |
| 148 | unsigned long trap_no, error_code; |
| 149 | unsigned long address; |
| 150 | /* Hardware debugging registers may come here */ |
| 151 | unsigned long ubc_pc; |
| 152 | |
| 153 | /* floating point info */ |
| 154 | union sh_fpu_union fpu; |
| 155 | }; |
| 156 | |
| 157 | /* Count of active tasks with UBC settings */ |
| 158 | extern int ubc_usercnt; |
| 159 | |
| 160 | #define INIT_THREAD { \ |
| 161 | sizeof(init_stack) + (long) &init_stack, /* sp */ \ |
| 162 | 0, /* pc */ \ |
| 163 | 0, 0, \ |
| 164 | 0, \ |
| 165 | 0, \ |
| 166 | {{{0,}},} /* fpu state */ \ |
| 167 | } |
| 168 | |
| 169 | /* |
| 170 | * Do necessary setup to start up a newly executed thread. |
| 171 | */ |
| 172 | #define start_thread(regs, new_pc, new_sp) \ |
| 173 | set_fs(USER_DS); \ |
| 174 | regs->pr = 0; \ |
| 175 | regs->sr = SR_FD; /* User mode. */ \ |
| 176 | regs->pc = new_pc; \ |
| 177 | regs->regs[15] = new_sp |
| 178 | |
| 179 | /* Forward declaration, a strange C thing */ |
| 180 | struct task_struct; |
| 181 | struct mm_struct; |
| 182 | |
| 183 | /* Free all resources held by a thread. */ |
| 184 | extern void release_thread(struct task_struct *); |
| 185 | |
| 186 | /* Prepare to copy thread state - unlazy all lazy status */ |
| 187 | #define prepare_to_copy(tsk) do { } while (0) |
| 188 | |
| 189 | /* |
| 190 | * create a kernel thread without removing it from tasklists |
| 191 | */ |
| 192 | extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); |
| 193 | |
| 194 | /* Copy and release all segment info associated with a VM */ |
| 195 | #define copy_segments(p, mm) do { } while(0) |
| 196 | #define release_segments(mm) do { } while(0) |
| 197 | |
| 198 | /* |
| 199 | * FPU lazy state save handling. |
| 200 | */ |
| 201 | |
| 202 | static __inline__ void disable_fpu(void) |
| 203 | { |
| 204 | unsigned long __dummy; |
| 205 | |
| 206 | /* Set FD flag in SR */ |
| 207 | __asm__ __volatile__("stc sr, %0\n\t" |
| 208 | "or %1, %0\n\t" |
| 209 | "ldc %0, sr" |
| 210 | : "=&r" (__dummy) |
| 211 | : "r" (SR_FD)); |
| 212 | } |
| 213 | |
| 214 | static __inline__ void enable_fpu(void) |
| 215 | { |
| 216 | unsigned long __dummy; |
| 217 | |
| 218 | /* Clear out FD flag in SR */ |
| 219 | __asm__ __volatile__("stc sr, %0\n\t" |
| 220 | "and %1, %0\n\t" |
| 221 | "ldc %0, sr" |
| 222 | : "=&r" (__dummy) |
| 223 | : "r" (~SR_FD)); |
| 224 | } |
| 225 | |
| 226 | static __inline__ void release_fpu(struct pt_regs *regs) |
| 227 | { |
| 228 | regs->sr |= SR_FD; |
| 229 | } |
| 230 | |
| 231 | static __inline__ void grab_fpu(struct pt_regs *regs) |
| 232 | { |
| 233 | regs->sr &= ~SR_FD; |
| 234 | } |
| 235 | |
| 236 | #ifdef CONFIG_CPU_SH4 |
| 237 | extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); |
| 238 | #else |
| 239 | #define save_fpu(tsk) do { } while (0) |
| 240 | #endif |
| 241 | |
| 242 | #define unlazy_fpu(tsk, regs) do { \ |
| 243 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ |
| 244 | save_fpu(tsk, regs); \ |
| 245 | } \ |
| 246 | } while (0) |
| 247 | |
| 248 | #define clear_fpu(tsk, regs) do { \ |
| 249 | if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ |
| 250 | clear_tsk_thread_flag(tsk, TIF_USEDFPU); \ |
| 251 | release_fpu(regs); \ |
| 252 | } \ |
| 253 | } while (0) |
| 254 | |
| 255 | /* Double presision, NANS as NANS, rounding to nearest, no exceptions */ |
| 256 | #define FPSCR_INIT 0x00080000 |
| 257 | |
| 258 | #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ |
| 259 | #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ |
| 260 | |
| 261 | /* |
| 262 | * Return saved PC of a blocked thread. |
| 263 | */ |
| 264 | #define thread_saved_pc(tsk) (tsk->thread.pc) |
| 265 | |
| 266 | extern unsigned long get_wchan(struct task_struct *p); |
| 267 | |
| 268 | #define KSTK_EIP(tsk) ((tsk)->thread.pc) |
| 269 | #define KSTK_ESP(tsk) ((tsk)->thread.sp) |
| 270 | |
| 271 | #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") |
| 272 | #define cpu_relax() do { } while (0) |
| 273 | |
| 274 | #endif /* __KERNEL__ */ |
| 275 | #endif /* __ASM_SH_PROCESSOR_H */ |