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Ben Dooksf8271e52007-02-17 15:41:50 +01001/* linux/arch/arm/mach-s3c2443/dma.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2443 DMA selection
7 *
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/init.h>
Kay Sievers4a858cf2011-12-21 16:01:38 -080017#include <linux/device.h>
Ben Dooksf8271e52007-02-17 15:41:50 +010018#include <linux/serial_core.h>
Russell Kingfced80c2008-09-06 12:10:45 +010019#include <linux/io.h>
Ben Dooksf8271e52007-02-17 15:41:50 +010020
Russell Kinga09e64f2008-08-05 16:14:15 +010021#include <mach/dma.h>
Ben Dooksf8271e52007-02-17 15:41:50 +010022
Ben Dooks992426b2010-02-20 23:01:33 +000023#include <plat/dma-s3c24xx.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010024#include <plat/cpu.h>
Ben Dooksf8271e52007-02-17 15:41:50 +010025
Ben Dooksa2b7ba92008-10-07 22:26:09 +010026#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/regs-gpio.h>
Ben Dooks44dc9402009-03-19 15:02:35 +000028#include <plat/regs-dma.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/regs-lcd.h>
Ben Dooks13622702008-10-30 10:14:38 +000030#include <plat/regs-spi.h>
Ben Dooksf8271e52007-02-17 15:41:50 +010031
32#define MAP(x) { \
33 [0] = (x) | DMA_CH_VALID, \
34 [1] = (x) | DMA_CH_VALID, \
35 [2] = (x) | DMA_CH_VALID, \
36 [3] = (x) | DMA_CH_VALID, \
37 [4] = (x) | DMA_CH_VALID, \
38 [5] = (x) | DMA_CH_VALID, \
39 }
40
41static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
42 [DMACH_XD0] = {
43 .name = "xdreq0",
44 .channels = MAP(S3C2443_DMAREQSEL_XDREQ0),
45 },
46 [DMACH_XD1] = {
47 .name = "xdreq1",
48 .channels = MAP(S3C2443_DMAREQSEL_XDREQ1),
49 },
Heiko Stuebner46cdaba2012-03-07 01:53:17 -080050 [DMACH_SDI] = { /* only on S3C2443 */
Ben Dooksf8271e52007-02-17 15:41:50 +010051 .name = "sdi",
52 .channels = MAP(S3C2443_DMAREQSEL_SDI),
Ben Dooksf8271e52007-02-17 15:41:50 +010053 },
Heiko Stuebnerad6c1d42012-04-24 18:06:53 -070054 [DMACH_SPI0_RX] = {
55 .name = "spi0-rx",
56 .channels = MAP(S3C2443_DMAREQSEL_SPI0RX),
57 },
58 [DMACH_SPI0_TX] = {
59 .name = "spi0-tx",
Ben Dooksf8271e52007-02-17 15:41:50 +010060 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX),
Ben Dooksf8271e52007-02-17 15:41:50 +010061 },
Heiko Stuebnerad6c1d42012-04-24 18:06:53 -070062 [DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */
63 .name = "spi1-rx",
64 .channels = MAP(S3C2443_DMAREQSEL_SPI1RX),
65 },
66 [DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */
67 .name = "spi1-tx",
Ben Dooksf8271e52007-02-17 15:41:50 +010068 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX),
Ben Dooksf8271e52007-02-17 15:41:50 +010069 },
70 [DMACH_UART0] = {
71 .name = "uart0",
72 .channels = MAP(S3C2443_DMAREQSEL_UART0_0),
Ben Dooksf8271e52007-02-17 15:41:50 +010073 },
74 [DMACH_UART1] = {
75 .name = "uart1",
76 .channels = MAP(S3C2443_DMAREQSEL_UART1_0),
Ben Dooksf8271e52007-02-17 15:41:50 +010077 },
Heiko Stuebnerb0990952012-03-07 01:53:12 -080078 [DMACH_UART2] = {
Ben Dooksf8271e52007-02-17 15:41:50 +010079 .name = "uart2",
80 .channels = MAP(S3C2443_DMAREQSEL_UART2_0),
Ben Dooksf8271e52007-02-17 15:41:50 +010081 },
Heiko Stuebnerb0990952012-03-07 01:53:12 -080082 [DMACH_UART3] = {
Ben Dooksf8271e52007-02-17 15:41:50 +010083 .name = "uart3",
84 .channels = MAP(S3C2443_DMAREQSEL_UART3_0),
Ben Dooksf8271e52007-02-17 15:41:50 +010085 },
86 [DMACH_UART0_SRC2] = {
87 .name = "uart0",
88 .channels = MAP(S3C2443_DMAREQSEL_UART0_1),
Ben Dooksf8271e52007-02-17 15:41:50 +010089 },
90 [DMACH_UART1_SRC2] = {
91 .name = "uart1",
92 .channels = MAP(S3C2443_DMAREQSEL_UART1_1),
Ben Dooksf8271e52007-02-17 15:41:50 +010093 },
Heiko Stuebnerb0990952012-03-07 01:53:12 -080094 [DMACH_UART2_SRC2] = {
Ben Dooksf8271e52007-02-17 15:41:50 +010095 .name = "uart2",
96 .channels = MAP(S3C2443_DMAREQSEL_UART2_1),
Ben Dooksf8271e52007-02-17 15:41:50 +010097 },
Heiko Stuebnerb0990952012-03-07 01:53:12 -080098 [DMACH_UART3_SRC2] = {
Ben Dooksf8271e52007-02-17 15:41:50 +010099 .name = "uart3",
100 .channels = MAP(S3C2443_DMAREQSEL_UART3_1),
Ben Dooksf8271e52007-02-17 15:41:50 +0100101 },
102 [DMACH_TIMER] = {
103 .name = "timer",
104 .channels = MAP(S3C2443_DMAREQSEL_TIMER),
105 },
106 [DMACH_I2S_IN] = {
107 .name = "i2s-sdi",
108 .channels = MAP(S3C2443_DMAREQSEL_I2SRX),
Ben Dooksf8271e52007-02-17 15:41:50 +0100109 },
110 [DMACH_I2S_OUT] = {
111 .name = "i2s-sdo",
112 .channels = MAP(S3C2443_DMAREQSEL_I2STX),
Ben Dooksf8271e52007-02-17 15:41:50 +0100113 },
114 [DMACH_PCM_IN] = {
115 .name = "pcm-in",
116 .channels = MAP(S3C2443_DMAREQSEL_PCMIN),
Ben Dooksf8271e52007-02-17 15:41:50 +0100117 },
118 [DMACH_PCM_OUT] = {
119 .name = "pcm-out",
120 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT),
Ben Dooksf8271e52007-02-17 15:41:50 +0100121 },
122 [DMACH_MIC_IN] = {
123 .name = "mic-in",
124 .channels = MAP(S3C2443_DMAREQSEL_MICIN),
Ben Dooksf8271e52007-02-17 15:41:50 +0100125 },
126};
127
128static void s3c2443_dma_select(struct s3c2410_dma_chan *chan,
129 struct s3c24xx_dma_map *map)
130{
Heiko Stuebnere8de5a12013-05-21 01:01:37 +0900131 unsigned long chsel = map->channels[0] & (~DMA_CH_VALID);
132 writel(chsel | S3C2443_DMAREQSEL_HW,
Ben Dooksf8271e52007-02-17 15:41:50 +0100133 chan->regs + S3C2443_DMA_DMAREQSEL);
134}
135
136static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
137 .select = s3c2443_dma_select,
138 .dcon_mask = 0,
139 .map = s3c2443_dma_mappings,
140 .map_size = ARRAY_SIZE(s3c2443_dma_mappings),
141};
142
Heiko Stuebner04511a62012-01-27 15:35:25 +0900143static int __init s3c2443_dma_add(struct device *dev,
144 struct subsys_interface *sif)
Ben Dooksf8271e52007-02-17 15:41:50 +0100145{
146 s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
147 return s3c24xx_dma_init_map(&s3c2443_dma_sel);
148}
149
Heiko Stuebner46cdaba2012-03-07 01:53:17 -0800150#ifdef CONFIG_CPU_S3C2416
151/* S3C2416 DMA contains the same selection table as the S3C2443 */
152static struct subsys_interface s3c2416_dma_interface = {
153 .name = "s3c2416_dma",
154 .subsys = &s3c2416_subsys,
155 .add_dev = s3c2443_dma_add,
156};
157
158static int __init s3c2416_dma_init(void)
159{
160 return subsys_interface_register(&s3c2416_dma_interface);
161}
162
163arch_initcall(s3c2416_dma_init);
164#endif
165
166#ifdef CONFIG_CPU_S3C2443
Kay Sievers4a858cf2011-12-21 16:01:38 -0800167static struct subsys_interface s3c2443_dma_interface = {
168 .name = "s3c2443_dma",
169 .subsys = &s3c2443_subsys,
170 .add_dev = s3c2443_dma_add,
Ben Dooksf8271e52007-02-17 15:41:50 +0100171};
172
173static int __init s3c2443_dma_init(void)
174{
Kay Sievers4a858cf2011-12-21 16:01:38 -0800175 return subsys_interface_register(&s3c2443_dma_interface);
Ben Dooksf8271e52007-02-17 15:41:50 +0100176}
177
178arch_initcall(s3c2443_dma_init);
Heiko Stuebner46cdaba2012-03-07 01:53:17 -0800179#endif