blob: 41d23210583c99a39b203c57b6107f9e638e6816 [file] [log] [blame]
Paul Mundtaf3c7df2007-11-09 17:08:54 +09001/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_32_H
9#define __ASM_SH_PROCESSOR_32_H
10#ifdef __KERNEL__
11
12#include <linux/compiler.h>
Paul Mundtfa439722008-09-04 18:53:58 +090013#include <linux/linkage.h>
Paul Mundtaf3c7df2007-11-09 17:08:54 +090014#include <asm/page.h>
15#include <asm/types.h>
16#include <asm/cache.h>
17#include <asm/ptrace.h>
Paul Mundtaf3c7df2007-11-09 17:08:54 +090018
19/*
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
22 */
Paul Mundt103340c2008-07-28 22:32:03 +090023#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; })
Paul Mundtaf3c7df2007-11-09 17:08:54 +090024
25/* Core Processor Version Register */
26#define CCN_PVR 0xff000030
27#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044
29
30struct sh_cpuinfo {
31 unsigned int type;
Stuart Menefy3611ee72008-07-02 15:15:09 +090032 int cut_major, cut_minor;
Paul Mundtaf3c7df2007-11-09 17:08:54 +090033 unsigned long loops_per_jiffy;
34 unsigned long asid_cache;
35
36 struct cache_info icache; /* Primary I-cache */
37 struct cache_info dcache; /* Primary D-cache */
38 struct cache_info scache; /* Secondary cache */
39
40 unsigned long flags;
41} __attribute__ ((aligned(L1_CACHE_BYTES)));
42
43extern struct sh_cpuinfo cpu_data[];
44#define boot_cpu_data cpu_data[0]
45#define current_cpu_data cpu_data[smp_processor_id()]
46#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
47
Paul Mundtfa439722008-09-04 18:53:58 +090048asmlinkage void __init sh_cpu_init(void);
49
Paul Mundtaf3c7df2007-11-09 17:08:54 +090050/*
51 * User space process size: 2GB.
52 *
53 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
54 */
55#define TASK_SIZE 0x7c000000UL
56
David Howells922a70d2008-02-08 04:19:26 -080057#define STACK_TOP TASK_SIZE
58#define STACK_TOP_MAX STACK_TOP
59
Paul Mundtaf3c7df2007-11-09 17:08:54 +090060/* This decides where the kernel will search for a free chunk of vm
61 * space during mmap's.
62 */
63#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
64
65/*
66 * Bit of SR register
67 *
68 * FD-bit:
69 * When it's set, it means the processor doesn't have right to use FPU,
70 * and it results exception when the floating operation is executed.
71 *
72 * IMASK-bit:
73 * Interrupt level mask
74 */
Paul Mundtaf3c7df2007-11-09 17:08:54 +090075#define SR_DSP 0x00001000
76#define SR_IMASK 0x000000f0
Paul Mundt9bbafce2008-03-26 19:02:47 +090077#define SR_FD 0x00008000
Paul Mundtaf3c7df2007-11-09 17:08:54 +090078
79/*
80 * FPU structure and data
81 */
82
83struct sh_fpu_hard_struct {
84 unsigned long fp_regs[16];
85 unsigned long xfp_regs[16];
86 unsigned long fpscr;
87 unsigned long fpul;
88
89 long status; /* software status information */
90};
91
92/* Dummy fpu emulator */
93struct sh_fpu_soft_struct {
94 unsigned long fp_regs[16];
95 unsigned long xfp_regs[16];
96 unsigned long fpscr;
97 unsigned long fpul;
98
99 unsigned char lookahead;
100 unsigned long entry_pc;
101};
102
103union sh_fpu_union {
104 struct sh_fpu_hard_struct hard;
105 struct sh_fpu_soft_struct soft;
106};
107
108struct thread_struct {
109 /* Saved registers when thread is descheduled */
110 unsigned long sp;
111 unsigned long pc;
112
113 /* Hardware debugging registers */
114 unsigned long ubc_pc;
115
116 /* floating point info */
117 union sh_fpu_union fpu;
118};
119
Paul Mundtaf3c7df2007-11-09 17:08:54 +0900120/* Count of active tasks with UBC settings */
121extern int ubc_usercnt;
122
123#define INIT_THREAD { \
124 .sp = sizeof(init_stack) + (long) &init_stack, \
125}
126
127/*
128 * Do necessary setup to start up a newly executed thread.
129 */
130#define start_thread(regs, new_pc, new_sp) \
131 set_fs(USER_DS); \
132 regs->pr = 0; \
133 regs->sr = SR_FD; /* User mode. */ \
134 regs->pc = new_pc; \
135 regs->regs[15] = new_sp
136
137/* Forward declaration, a strange C thing */
138struct task_struct;
139struct mm_struct;
140
141/* Free all resources held by a thread. */
142extern void release_thread(struct task_struct *);
143
144/* Prepare to copy thread state - unlazy all lazy status */
145#define prepare_to_copy(tsk) do { } while (0)
146
147/*
148 * create a kernel thread without removing it from tasklists
149 */
150extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
151
152/* Copy and release all segment info associated with a VM */
153#define copy_segments(p, mm) do { } while(0)
154#define release_segments(mm) do { } while(0)
155
156/*
157 * FPU lazy state save handling.
158 */
159
160static __inline__ void disable_fpu(void)
161{
162 unsigned long __dummy;
163
164 /* Set FD flag in SR */
165 __asm__ __volatile__("stc sr, %0\n\t"
166 "or %1, %0\n\t"
167 "ldc %0, sr"
168 : "=&r" (__dummy)
169 : "r" (SR_FD));
170}
171
172static __inline__ void enable_fpu(void)
173{
174 unsigned long __dummy;
175
176 /* Clear out FD flag in SR */
177 __asm__ __volatile__("stc sr, %0\n\t"
178 "and %1, %0\n\t"
179 "ldc %0, sr"
180 : "=&r" (__dummy)
181 : "r" (~SR_FD));
182}
183
Paul Mundtaf3c7df2007-11-09 17:08:54 +0900184/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
185#define FPSCR_INIT 0x00080000
186
187#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
188#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
189
190/*
191 * Return saved PC of a blocked thread.
192 */
193#define thread_saved_pc(tsk) (tsk->thread.pc)
194
195void show_trace(struct task_struct *tsk, unsigned long *sp,
196 struct pt_regs *regs);
197extern unsigned long get_wchan(struct task_struct *p);
198
199#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
200#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
201
202#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
203#define cpu_relax() barrier()
204
205#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
206 defined(CONFIG_CPU_SH4)
207#define PREFETCH_STRIDE L1_CACHE_BYTES
208#define ARCH_HAS_PREFETCH
209#define ARCH_HAS_PREFETCHW
210static inline void prefetch(void *x)
211{
212 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
213}
214
215#define prefetchw(x) prefetch(x)
216#endif
217
Paul Mundtaf3c7df2007-11-09 17:08:54 +0900218#endif /* __KERNEL__ */
219#endif /* __ASM_SH_PROCESSOR_32_H */