Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Jerome Glisse. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Jerome Glisse <glisse@freedesktop.org> |
| 26 | */ |
Marek Olšák | 4330441 | 2014-03-02 00:56:20 +0100 | [diff] [blame] | 27 | #include <linux/list_sort.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 28 | #include <drm/drmP.h> |
| 29 | #include <drm/radeon_drm.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 30 | #include "radeon_reg.h" |
| 31 | #include "radeon.h" |
Christian König | 860024e | 2013-09-07 18:29:01 +0200 | [diff] [blame] | 32 | #include "radeon_trace.h" |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 33 | |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 34 | #define RADEON_CS_MAX_PRIORITY 32u |
| 35 | #define RADEON_CS_NUM_BUCKETS (RADEON_CS_MAX_PRIORITY + 1) |
| 36 | |
| 37 | /* This is based on the bucket sort with O(n) time complexity. |
| 38 | * An item with priority "i" is added to bucket[i]. The lists are then |
| 39 | * concatenated in descending order. |
| 40 | */ |
| 41 | struct radeon_cs_buckets { |
| 42 | struct list_head bucket[RADEON_CS_NUM_BUCKETS]; |
| 43 | }; |
| 44 | |
| 45 | static void radeon_cs_buckets_init(struct radeon_cs_buckets *b) |
| 46 | { |
| 47 | unsigned i; |
| 48 | |
| 49 | for (i = 0; i < RADEON_CS_NUM_BUCKETS; i++) |
| 50 | INIT_LIST_HEAD(&b->bucket[i]); |
| 51 | } |
| 52 | |
| 53 | static void radeon_cs_buckets_add(struct radeon_cs_buckets *b, |
| 54 | struct list_head *item, unsigned priority) |
| 55 | { |
| 56 | /* Since buffers which appear sooner in the relocation list are |
| 57 | * likely to be used more often than buffers which appear later |
| 58 | * in the list, the sort mustn't change the ordering of buffers |
| 59 | * with the same priority, i.e. it must be stable. |
| 60 | */ |
| 61 | list_add_tail(item, &b->bucket[min(priority, RADEON_CS_MAX_PRIORITY)]); |
| 62 | } |
| 63 | |
| 64 | static void radeon_cs_buckets_get_list(struct radeon_cs_buckets *b, |
| 65 | struct list_head *out_list) |
| 66 | { |
| 67 | unsigned i; |
| 68 | |
| 69 | /* Connect the sorted buckets in the output list. */ |
| 70 | for (i = 0; i < RADEON_CS_NUM_BUCKETS; i++) { |
| 71 | list_splice(&b->bucket[i], out_list); |
| 72 | } |
| 73 | } |
| 74 | |
Lauri Kasanen | 1109ca0 | 2012-08-31 13:43:50 -0400 | [diff] [blame] | 75 | static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 76 | { |
| 77 | struct drm_device *ddev = p->rdev->ddev; |
| 78 | struct radeon_cs_chunk *chunk; |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 79 | struct radeon_cs_buckets buckets; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 80 | unsigned i, j; |
| 81 | bool duplicate; |
| 82 | |
| 83 | if (p->chunk_relocs_idx == -1) { |
| 84 | return 0; |
| 85 | } |
| 86 | chunk = &p->chunks[p->chunk_relocs_idx]; |
Alex Deucher | cf4ccd0 | 2011-11-18 10:19:47 -0500 | [diff] [blame] | 87 | p->dma_reloc_idx = 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 88 | /* FIXME: we assume that each relocs use 4 dwords */ |
| 89 | p->nrelocs = chunk->length_dw / 4; |
| 90 | p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL); |
| 91 | if (p->relocs_ptr == NULL) { |
| 92 | return -ENOMEM; |
| 93 | } |
| 94 | p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL); |
| 95 | if (p->relocs == NULL) { |
| 96 | return -ENOMEM; |
| 97 | } |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 98 | |
| 99 | radeon_cs_buckets_init(&buckets); |
| 100 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 101 | for (i = 0; i < p->nrelocs; i++) { |
| 102 | struct drm_radeon_cs_reloc *r; |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 103 | unsigned priority; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 104 | |
| 105 | duplicate = false; |
| 106 | r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4]; |
Christian König | 16557f1 | 2011-10-24 14:59:17 +0200 | [diff] [blame] | 107 | for (j = 0; j < i; j++) { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 108 | if (r->handle == p->relocs[j].handle) { |
| 109 | p->relocs_ptr[i] = &p->relocs[j]; |
| 110 | duplicate = true; |
| 111 | break; |
| 112 | } |
| 113 | } |
Christian König | 4474f3a | 2013-04-08 12:41:28 +0200 | [diff] [blame] | 114 | if (duplicate) { |
Christian König | 16557f1 | 2011-10-24 14:59:17 +0200 | [diff] [blame] | 115 | p->relocs[i].handle = 0; |
Christian König | 4474f3a | 2013-04-08 12:41:28 +0200 | [diff] [blame] | 116 | continue; |
| 117 | } |
| 118 | |
| 119 | p->relocs[i].gobj = drm_gem_object_lookup(ddev, p->filp, |
| 120 | r->handle); |
| 121 | if (p->relocs[i].gobj == NULL) { |
| 122 | DRM_ERROR("gem object lookup failed 0x%x\n", |
| 123 | r->handle); |
| 124 | return -ENOENT; |
| 125 | } |
| 126 | p->relocs_ptr[i] = &p->relocs[i]; |
| 127 | p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj); |
| 128 | p->relocs[i].lobj.bo = p->relocs[i].robj; |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 129 | |
| 130 | /* The userspace buffer priorities are from 0 to 15. A higher |
| 131 | * number means the buffer is more important. |
| 132 | * Also, the buffers used for write have a higher priority than |
| 133 | * the buffers used for read only, which doubles the range |
| 134 | * to 0 to 31. 32 is reserved for the kernel driver. |
| 135 | */ |
| 136 | priority = (r->flags & 0xf) * 2 + !!r->write_domain; |
Christian König | 4474f3a | 2013-04-08 12:41:28 +0200 | [diff] [blame] | 137 | |
Christian König | 4f66c59 | 2013-09-15 13:31:28 +0200 | [diff] [blame] | 138 | /* the first reloc of an UVD job is the msg and that must be in |
| 139 | VRAM, also but everything into VRAM on AGP cards to avoid |
| 140 | image corruptions */ |
| 141 | if (p->ring == R600_RING_TYPE_UVD_INDEX && |
Alex Deucher | 4ca5a6c | 2013-09-15 23:23:07 -0400 | [diff] [blame] | 142 | (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) { |
Christian König | bcf6f1e | 2013-10-15 20:12:03 +0200 | [diff] [blame] | 143 | /* TODO: is this still needed for NI+ ? */ |
Christian König | f2ba57b | 2013-04-08 12:41:29 +0200 | [diff] [blame] | 144 | p->relocs[i].lobj.domain = |
| 145 | RADEON_GEM_DOMAIN_VRAM; |
| 146 | |
| 147 | p->relocs[i].lobj.alt_domain = |
| 148 | RADEON_GEM_DOMAIN_VRAM; |
| 149 | |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 150 | /* prioritize this over any other relocation */ |
| 151 | priority = RADEON_CS_MAX_PRIORITY; |
Christian König | f2ba57b | 2013-04-08 12:41:29 +0200 | [diff] [blame] | 152 | } else { |
| 153 | uint32_t domain = r->write_domain ? |
| 154 | r->write_domain : r->read_domains; |
| 155 | |
| 156 | p->relocs[i].lobj.domain = domain; |
| 157 | if (domain == RADEON_GEM_DOMAIN_VRAM) |
| 158 | domain |= RADEON_GEM_DOMAIN_GTT; |
| 159 | p->relocs[i].lobj.alt_domain = domain; |
| 160 | } |
Christian König | 4474f3a | 2013-04-08 12:41:28 +0200 | [diff] [blame] | 161 | |
| 162 | p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo; |
| 163 | p->relocs[i].handle = r->handle; |
| 164 | |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 165 | radeon_cs_buckets_add(&buckets, &p->relocs[i].lobj.tv.head, |
| 166 | priority); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 167 | } |
Marek Olšák | c9b7654 | 2014-03-02 00:56:21 +0100 | [diff] [blame] | 168 | |
| 169 | radeon_cs_buckets_get_list(&buckets, &p->validated); |
| 170 | |
Marek Olšák | 19dff56 | 2014-03-02 00:56:22 +0100 | [diff] [blame] | 171 | return radeon_bo_list_validate(p->rdev, &p->ticket, &p->validated, p->ring); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 172 | } |
| 173 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 174 | static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority) |
| 175 | { |
| 176 | p->priority = priority; |
| 177 | |
| 178 | switch (ring) { |
| 179 | default: |
| 180 | DRM_ERROR("unknown ring id: %d\n", ring); |
| 181 | return -EINVAL; |
| 182 | case RADEON_CS_RING_GFX: |
| 183 | p->ring = RADEON_RING_TYPE_GFX_INDEX; |
| 184 | break; |
| 185 | case RADEON_CS_RING_COMPUTE: |
Alex Deucher | 963e81f | 2013-06-26 17:37:11 -0400 | [diff] [blame] | 186 | if (p->rdev->family >= CHIP_TAHITI) { |
Alex Deucher | 8d5ef7b | 2012-03-20 17:18:24 -0400 | [diff] [blame] | 187 | if (p->priority > 0) |
| 188 | p->ring = CAYMAN_RING_TYPE_CP1_INDEX; |
| 189 | else |
| 190 | p->ring = CAYMAN_RING_TYPE_CP2_INDEX; |
| 191 | } else |
| 192 | p->ring = RADEON_RING_TYPE_GFX_INDEX; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 193 | break; |
Alex Deucher | 278a334 | 2012-12-13 12:27:28 -0500 | [diff] [blame] | 194 | case RADEON_CS_RING_DMA: |
| 195 | if (p->rdev->family >= CHIP_CAYMAN) { |
| 196 | if (p->priority > 0) |
| 197 | p->ring = R600_RING_TYPE_DMA_INDEX; |
| 198 | else |
| 199 | p->ring = CAYMAN_RING_TYPE_DMA1_INDEX; |
Alex Deucher | b9ace36 | 2014-01-27 10:59:51 -0500 | [diff] [blame] | 200 | } else if (p->rdev->family >= CHIP_RV770) { |
Alex Deucher | 278a334 | 2012-12-13 12:27:28 -0500 | [diff] [blame] | 201 | p->ring = R600_RING_TYPE_DMA_INDEX; |
| 202 | } else { |
| 203 | return -EINVAL; |
| 204 | } |
| 205 | break; |
Christian König | f2ba57b | 2013-04-08 12:41:29 +0200 | [diff] [blame] | 206 | case RADEON_CS_RING_UVD: |
| 207 | p->ring = R600_RING_TYPE_UVD_INDEX; |
| 208 | break; |
Christian König | d93f793 | 2013-05-23 12:10:04 +0200 | [diff] [blame] | 209 | case RADEON_CS_RING_VCE: |
| 210 | /* TODO: only use the low priority ring for now */ |
| 211 | p->ring = TN_RING_TYPE_VCE1_INDEX; |
| 212 | break; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 213 | } |
| 214 | return 0; |
| 215 | } |
| 216 | |
Christian König | 220907d | 2012-05-10 16:46:43 +0200 | [diff] [blame] | 217 | static void radeon_cs_sync_rings(struct radeon_cs_parser *p) |
Christian König | 93504fc | 2012-01-05 22:11:06 -0500 | [diff] [blame] | 218 | { |
Christian König | 220907d | 2012-05-10 16:46:43 +0200 | [diff] [blame] | 219 | int i; |
Christian König | 93504fc | 2012-01-05 22:11:06 -0500 | [diff] [blame] | 220 | |
Christian König | cdac550 | 2012-02-23 15:18:42 +0100 | [diff] [blame] | 221 | for (i = 0; i < p->nrelocs; i++) { |
Christian König | f82cbdd | 2012-08-09 16:35:36 +0200 | [diff] [blame] | 222 | if (!p->relocs[i].robj) |
Christian König | cdac550 | 2012-02-23 15:18:42 +0100 | [diff] [blame] | 223 | continue; |
| 224 | |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 225 | radeon_semaphore_sync_to(p->ib.semaphore, |
| 226 | p->relocs[i].robj->tbo.sync_obj); |
Christian König | cdac550 | 2012-02-23 15:18:42 +0100 | [diff] [blame] | 227 | } |
Christian König | 93504fc | 2012-01-05 22:11:06 -0500 | [diff] [blame] | 228 | } |
| 229 | |
Alex Deucher | 9b00147 | 2012-05-30 10:09:30 -0400 | [diff] [blame] | 230 | /* XXX: note that this is called from the legacy UMS CS ioctl as well */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 231 | int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) |
| 232 | { |
| 233 | struct drm_radeon_cs *cs = data; |
| 234 | uint64_t *chunk_array_ptr; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 235 | unsigned size, i; |
| 236 | u32 ring = RADEON_CS_RING_GFX; |
| 237 | s32 priority = 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 238 | |
| 239 | if (!cs->num_chunks) { |
| 240 | return 0; |
| 241 | } |
| 242 | /* get chunks */ |
| 243 | INIT_LIST_HEAD(&p->validated); |
| 244 | p->idx = 0; |
Jerome Glisse | f2e3922 | 2012-05-09 15:35:02 +0200 | [diff] [blame] | 245 | p->ib.sa_bo = NULL; |
| 246 | p->ib.semaphore = NULL; |
| 247 | p->const_ib.sa_bo = NULL; |
| 248 | p->const_ib.semaphore = NULL; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 249 | p->chunk_ib_idx = -1; |
| 250 | p->chunk_relocs_idx = -1; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 251 | p->chunk_flags_idx = -1; |
Alex Deucher | dfcf5f3 | 2012-03-20 17:18:14 -0400 | [diff] [blame] | 252 | p->chunk_const_ib_idx = -1; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 253 | p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL); |
| 254 | if (p->chunks_array == NULL) { |
| 255 | return -ENOMEM; |
| 256 | } |
| 257 | chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks); |
Daniel Vetter | 1d6ac18 | 2013-12-11 11:34:44 +0100 | [diff] [blame] | 258 | if (copy_from_user(p->chunks_array, chunk_array_ptr, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 259 | sizeof(uint64_t)*cs->num_chunks)) { |
| 260 | return -EFAULT; |
| 261 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 262 | p->cs_flags = 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 263 | p->nchunks = cs->num_chunks; |
| 264 | p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL); |
| 265 | if (p->chunks == NULL) { |
| 266 | return -ENOMEM; |
| 267 | } |
| 268 | for (i = 0; i < p->nchunks; i++) { |
| 269 | struct drm_radeon_cs_chunk __user **chunk_ptr = NULL; |
| 270 | struct drm_radeon_cs_chunk user_chunk; |
| 271 | uint32_t __user *cdata; |
| 272 | |
| 273 | chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i]; |
Daniel Vetter | 1d6ac18 | 2013-12-11 11:34:44 +0100 | [diff] [blame] | 274 | if (copy_from_user(&user_chunk, chunk_ptr, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 275 | sizeof(struct drm_radeon_cs_chunk))) { |
| 276 | return -EFAULT; |
| 277 | } |
Dave Airlie | 5176fdc | 2009-06-30 11:47:14 +1000 | [diff] [blame] | 278 | p->chunks[i].length_dw = user_chunk.length_dw; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 279 | p->chunks[i].chunk_id = user_chunk.chunk_id; |
| 280 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) { |
| 281 | p->chunk_relocs_idx = i; |
| 282 | } |
| 283 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) { |
| 284 | p->chunk_ib_idx = i; |
Dave Airlie | 5176fdc | 2009-06-30 11:47:14 +1000 | [diff] [blame] | 285 | /* zero length IB isn't useful */ |
| 286 | if (p->chunks[i].length_dw == 0) |
| 287 | return -EINVAL; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 288 | } |
Alex Deucher | dfcf5f3 | 2012-03-20 17:18:14 -0400 | [diff] [blame] | 289 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) { |
| 290 | p->chunk_const_ib_idx = i; |
| 291 | /* zero length CONST IB isn't useful */ |
| 292 | if (p->chunks[i].length_dw == 0) |
| 293 | return -EINVAL; |
| 294 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 295 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) { |
| 296 | p->chunk_flags_idx = i; |
| 297 | /* zero length flags aren't useful */ |
| 298 | if (p->chunks[i].length_dw == 0) |
| 299 | return -EINVAL; |
Marek Olšák | e70f224 | 2011-10-25 01:38:45 +0200 | [diff] [blame] | 300 | } |
Dave Airlie | 5176fdc | 2009-06-30 11:47:14 +1000 | [diff] [blame] | 301 | |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 302 | size = p->chunks[i].length_dw; |
| 303 | cdata = (void __user *)(unsigned long)user_chunk.chunk_data; |
| 304 | p->chunks[i].user_ptr = cdata; |
| 305 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) |
| 306 | continue; |
| 307 | |
| 308 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) { |
| 309 | if (!p->rdev || !(p->rdev->flags & RADEON_IS_AGP)) |
| 310 | continue; |
| 311 | } |
| 312 | |
| 313 | p->chunks[i].kdata = drm_malloc_ab(size, sizeof(uint32_t)); |
| 314 | size *= sizeof(uint32_t); |
| 315 | if (p->chunks[i].kdata == NULL) { |
| 316 | return -ENOMEM; |
| 317 | } |
Daniel Vetter | 1d6ac18 | 2013-12-11 11:34:44 +0100 | [diff] [blame] | 318 | if (copy_from_user(p->chunks[i].kdata, cdata, size)) { |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 319 | return -EFAULT; |
| 320 | } |
| 321 | if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) { |
| 322 | p->cs_flags = p->chunks[i].kdata[0]; |
| 323 | if (p->chunks[i].length_dw > 1) |
| 324 | ring = p->chunks[i].kdata[1]; |
| 325 | if (p->chunks[i].length_dw > 2) |
| 326 | priority = (s32)p->chunks[i].kdata[2]; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 327 | } |
| 328 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 329 | |
Alex Deucher | 9b00147 | 2012-05-30 10:09:30 -0400 | [diff] [blame] | 330 | /* these are KMS only */ |
| 331 | if (p->rdev) { |
| 332 | if ((p->cs_flags & RADEON_CS_USE_VM) && |
| 333 | !p->rdev->vm_manager.enabled) { |
| 334 | DRM_ERROR("VM not active on asic!\n"); |
| 335 | return -EINVAL; |
| 336 | } |
| 337 | |
Alex Deucher | 9b00147 | 2012-05-30 10:09:30 -0400 | [diff] [blame] | 338 | if (radeon_cs_get_ring(p, ring, priority)) |
| 339 | return -EINVAL; |
Christian König | 5744904 | 2013-04-08 12:41:27 +0200 | [diff] [blame] | 340 | |
| 341 | /* we only support VM on some SI+ rings */ |
Christian König | 76a0df8 | 2013-08-13 11:56:50 +0200 | [diff] [blame] | 342 | if ((p->rdev->asic->ring[p->ring]->cs_parse == NULL) && |
Christian König | 5744904 | 2013-04-08 12:41:27 +0200 | [diff] [blame] | 343 | ((p->cs_flags & RADEON_CS_USE_VM) == 0)) { |
| 344 | DRM_ERROR("Ring %d requires VM!\n", p->ring); |
| 345 | return -EINVAL; |
| 346 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 347 | } |
Marek Olšák | e70f224 | 2011-10-25 01:38:45 +0200 | [diff] [blame] | 348 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 349 | return 0; |
| 350 | } |
| 351 | |
Marek Olšák | 4330441 | 2014-03-02 00:56:20 +0100 | [diff] [blame] | 352 | static int cmp_size_smaller_first(void *priv, struct list_head *a, |
| 353 | struct list_head *b) |
| 354 | { |
| 355 | struct radeon_bo_list *la = list_entry(a, struct radeon_bo_list, tv.head); |
| 356 | struct radeon_bo_list *lb = list_entry(b, struct radeon_bo_list, tv.head); |
| 357 | |
| 358 | /* Sort A before B if A is smaller. */ |
| 359 | return (int)la->bo->tbo.num_pages - (int)lb->bo->tbo.num_pages; |
| 360 | } |
| 361 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 362 | /** |
| 363 | * cs_parser_fini() - clean parser states |
| 364 | * @parser: parser structure holding parsing context. |
| 365 | * @error: error number |
| 366 | * |
| 367 | * If error is set than unvalidate buffer, otherwise just free memory |
| 368 | * used by parsing context. |
| 369 | **/ |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 370 | static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error, bool backoff) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 371 | { |
| 372 | unsigned i; |
| 373 | |
Jerome Glisse | e43b5ec | 2012-08-06 12:32:21 -0400 | [diff] [blame] | 374 | if (!error) { |
Marek Olšák | 4330441 | 2014-03-02 00:56:20 +0100 | [diff] [blame] | 375 | /* Sort the buffer list from the smallest to largest buffer, |
| 376 | * which affects the order of buffers in the LRU list. |
| 377 | * This assures that the smallest buffers are added first |
| 378 | * to the LRU list, so they are likely to be later evicted |
| 379 | * first, instead of large buffers whose eviction is more |
| 380 | * expensive. |
| 381 | * |
| 382 | * This slightly lowers the number of bytes moved by TTM |
| 383 | * per frame under memory pressure. |
| 384 | */ |
| 385 | list_sort(NULL, &parser->validated, cmp_size_smaller_first); |
| 386 | |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 387 | ttm_eu_fence_buffer_objects(&parser->ticket, |
| 388 | &parser->validated, |
Jerome Glisse | f2e3922 | 2012-05-09 15:35:02 +0200 | [diff] [blame] | 389 | parser->ib.fence); |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 390 | } else if (backoff) { |
| 391 | ttm_eu_backoff_reservation(&parser->ticket, |
| 392 | &parser->validated); |
Jerome Glisse | e43b5ec | 2012-08-06 12:32:21 -0400 | [diff] [blame] | 393 | } |
Thomas Hellstrom | 147666f | 2010-11-17 12:38:32 +0000 | [diff] [blame] | 394 | |
Pauli Nieminen | fcbc451 | 2010-03-19 07:44:33 +0000 | [diff] [blame] | 395 | if (parser->relocs != NULL) { |
| 396 | for (i = 0; i < parser->nrelocs; i++) { |
| 397 | if (parser->relocs[i].gobj) |
| 398 | drm_gem_object_unreference_unlocked(parser->relocs[i].gobj); |
| 399 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 400 | } |
Michel Dänzer | 48e113e | 2009-09-15 17:09:32 +0200 | [diff] [blame] | 401 | kfree(parser->track); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 402 | kfree(parser->relocs); |
| 403 | kfree(parser->relocs_ptr); |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 404 | for (i = 0; i < parser->nchunks; i++) |
| 405 | drm_free_large(parser->chunks[i].kdata); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 406 | kfree(parser->chunks); |
| 407 | kfree(parser->chunks_array); |
| 408 | radeon_ib_free(parser->rdev, &parser->ib); |
Jerome Glisse | f2e3922 | 2012-05-09 15:35:02 +0200 | [diff] [blame] | 409 | radeon_ib_free(parser->rdev, &parser->const_ib); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 410 | } |
| 411 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 412 | static int radeon_cs_ib_chunk(struct radeon_device *rdev, |
| 413 | struct radeon_cs_parser *parser) |
| 414 | { |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 415 | int r; |
| 416 | |
| 417 | if (parser->chunk_ib_idx == -1) |
| 418 | return 0; |
| 419 | |
| 420 | if (parser->cs_flags & RADEON_CS_USE_VM) |
| 421 | return 0; |
| 422 | |
Christian König | eb0c19c | 2012-02-23 15:18:44 +0100 | [diff] [blame] | 423 | r = radeon_cs_parse(rdev, parser->ring, parser); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 424 | if (r || parser->parser_error) { |
| 425 | DRM_ERROR("Invalid command stream !\n"); |
| 426 | return r; |
| 427 | } |
Alex Deucher | ce3537d | 2013-07-24 12:12:49 -0400 | [diff] [blame] | 428 | |
| 429 | if (parser->ring == R600_RING_TYPE_UVD_INDEX) |
| 430 | radeon_uvd_note_usage(rdev); |
Alex Deucher | 03afe6f | 2013-08-23 11:56:26 -0400 | [diff] [blame] | 431 | else if ((parser->ring == TN_RING_TYPE_VCE1_INDEX) || |
| 432 | (parser->ring == TN_RING_TYPE_VCE2_INDEX)) |
| 433 | radeon_vce_note_usage(rdev); |
Alex Deucher | ce3537d | 2013-07-24 12:12:49 -0400 | [diff] [blame] | 434 | |
Christian König | 220907d | 2012-05-10 16:46:43 +0200 | [diff] [blame] | 435 | radeon_cs_sync_rings(parser); |
Christian König | 4ef7256 | 2012-07-13 13:06:00 +0200 | [diff] [blame] | 436 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 437 | if (r) { |
| 438 | DRM_ERROR("Failed to schedule IB !\n"); |
| 439 | } |
Christian König | 93bf888 | 2012-07-03 14:05:41 +0200 | [diff] [blame] | 440 | return r; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser, |
| 444 | struct radeon_vm *vm) |
| 445 | { |
Jerome Glisse | 3e8970f | 2012-08-13 12:07:33 -0400 | [diff] [blame] | 446 | struct radeon_device *rdev = parser->rdev; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 447 | struct radeon_bo_list *lobj; |
| 448 | struct radeon_bo *bo; |
| 449 | int r; |
| 450 | |
Christian König | 9c57a6b | 2013-11-25 15:42:11 +0100 | [diff] [blame] | 451 | r = radeon_vm_bo_update(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem); |
Jerome Glisse | 3e8970f | 2012-08-13 12:07:33 -0400 | [diff] [blame] | 452 | if (r) { |
| 453 | return r; |
| 454 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 455 | list_for_each_entry(lobj, &parser->validated, tv.head) { |
| 456 | bo = lobj->bo; |
Christian König | 9c57a6b | 2013-11-25 15:42:11 +0100 | [diff] [blame] | 457 | r = radeon_vm_bo_update(parser->rdev, vm, bo, &bo->tbo.mem); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 458 | if (r) { |
| 459 | return r; |
| 460 | } |
| 461 | } |
| 462 | return 0; |
| 463 | } |
| 464 | |
| 465 | static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev, |
| 466 | struct radeon_cs_parser *parser) |
| 467 | { |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 468 | struct radeon_fpriv *fpriv = parser->filp->driver_priv; |
| 469 | struct radeon_vm *vm = &fpriv->vm; |
| 470 | int r; |
| 471 | |
| 472 | if (parser->chunk_ib_idx == -1) |
| 473 | return 0; |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 474 | if ((parser->cs_flags & RADEON_CS_USE_VM) == 0) |
| 475 | return 0; |
| 476 | |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 477 | if (parser->const_ib.length_dw) { |
Jerome Glisse | f2e3922 | 2012-05-09 15:35:02 +0200 | [diff] [blame] | 478 | r = radeon_ring_ib_parse(rdev, parser->ring, &parser->const_ib); |
Alex Deucher | dfcf5f3 | 2012-03-20 17:18:14 -0400 | [diff] [blame] | 479 | if (r) { |
| 480 | return r; |
| 481 | } |
| 482 | } |
| 483 | |
Jerome Glisse | f2e3922 | 2012-05-09 15:35:02 +0200 | [diff] [blame] | 484 | r = radeon_ring_ib_parse(rdev, parser->ring, &parser->ib); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 485 | if (r) { |
| 486 | return r; |
| 487 | } |
| 488 | |
Alex Deucher | ce3537d | 2013-07-24 12:12:49 -0400 | [diff] [blame] | 489 | if (parser->ring == R600_RING_TYPE_UVD_INDEX) |
| 490 | radeon_uvd_note_usage(rdev); |
| 491 | |
Christian König | 36ff39c | 2012-05-09 10:07:08 +0200 | [diff] [blame] | 492 | mutex_lock(&rdev->vm_manager.lock); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 493 | mutex_lock(&vm->mutex); |
Christian König | ddf03f5 | 2012-08-09 20:02:28 +0200 | [diff] [blame] | 494 | r = radeon_vm_alloc_pt(rdev, vm); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 495 | if (r) { |
| 496 | goto out; |
| 497 | } |
| 498 | r = radeon_bo_vm_update_pte(parser, vm); |
| 499 | if (r) { |
| 500 | goto out; |
| 501 | } |
Christian König | 220907d | 2012-05-10 16:46:43 +0200 | [diff] [blame] | 502 | radeon_cs_sync_rings(parser); |
Christian König | 1654b81 | 2013-11-12 12:58:05 +0100 | [diff] [blame] | 503 | radeon_semaphore_sync_to(parser->ib.semaphore, vm->fence); |
| 504 | radeon_semaphore_sync_to(parser->ib.semaphore, |
| 505 | radeon_vm_grab_id(rdev, vm, parser->ring)); |
Christian König | 4ef7256 | 2012-07-13 13:06:00 +0200 | [diff] [blame] | 506 | |
Alex Deucher | dfcf5f3 | 2012-03-20 17:18:14 -0400 | [diff] [blame] | 507 | if ((rdev->family >= CHIP_TAHITI) && |
| 508 | (parser->chunk_const_ib_idx != -1)) { |
Christian König | 4ef7256 | 2012-07-13 13:06:00 +0200 | [diff] [blame] | 509 | r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib); |
| 510 | } else { |
| 511 | r = radeon_ib_schedule(rdev, &parser->ib, NULL); |
Alex Deucher | dfcf5f3 | 2012-03-20 17:18:14 -0400 | [diff] [blame] | 512 | } |
| 513 | |
Christian König | ee60e29 | 2012-08-09 16:21:08 +0200 | [diff] [blame] | 514 | out: |
Christian König | 13e55c3 | 2012-10-09 13:31:19 +0200 | [diff] [blame] | 515 | radeon_vm_add_to_lru(rdev, vm); |
Christian König | 36ff39c | 2012-05-09 10:07:08 +0200 | [diff] [blame] | 516 | mutex_unlock(&vm->mutex); |
| 517 | mutex_unlock(&rdev->vm_manager.lock); |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 518 | return r; |
| 519 | } |
| 520 | |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 521 | static int radeon_cs_handle_lockup(struct radeon_device *rdev, int r) |
| 522 | { |
| 523 | if (r == -EDEADLK) { |
| 524 | r = radeon_gpu_reset(rdev); |
| 525 | if (!r) |
| 526 | r = -EAGAIN; |
| 527 | } |
| 528 | return r; |
| 529 | } |
| 530 | |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 531 | static int radeon_cs_ib_fill(struct radeon_device *rdev, struct radeon_cs_parser *parser) |
| 532 | { |
| 533 | struct radeon_cs_chunk *ib_chunk; |
| 534 | struct radeon_vm *vm = NULL; |
| 535 | int r; |
| 536 | |
| 537 | if (parser->chunk_ib_idx == -1) |
| 538 | return 0; |
| 539 | |
| 540 | if (parser->cs_flags & RADEON_CS_USE_VM) { |
| 541 | struct radeon_fpriv *fpriv = parser->filp->driver_priv; |
| 542 | vm = &fpriv->vm; |
| 543 | |
| 544 | if ((rdev->family >= CHIP_TAHITI) && |
| 545 | (parser->chunk_const_ib_idx != -1)) { |
| 546 | ib_chunk = &parser->chunks[parser->chunk_const_ib_idx]; |
| 547 | if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) { |
| 548 | DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw); |
| 549 | return -EINVAL; |
| 550 | } |
| 551 | r = radeon_ib_get(rdev, parser->ring, &parser->const_ib, |
| 552 | vm, ib_chunk->length_dw * 4); |
| 553 | if (r) { |
| 554 | DRM_ERROR("Failed to get const ib !\n"); |
| 555 | return r; |
| 556 | } |
| 557 | parser->const_ib.is_const_ib = true; |
| 558 | parser->const_ib.length_dw = ib_chunk->length_dw; |
Daniel Vetter | 1d6ac18 | 2013-12-11 11:34:44 +0100 | [diff] [blame] | 559 | if (copy_from_user(parser->const_ib.ptr, |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 560 | ib_chunk->user_ptr, |
| 561 | ib_chunk->length_dw * 4)) |
| 562 | return -EFAULT; |
| 563 | } |
| 564 | |
| 565 | ib_chunk = &parser->chunks[parser->chunk_ib_idx]; |
| 566 | if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) { |
| 567 | DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw); |
| 568 | return -EINVAL; |
| 569 | } |
| 570 | } |
| 571 | ib_chunk = &parser->chunks[parser->chunk_ib_idx]; |
| 572 | |
| 573 | r = radeon_ib_get(rdev, parser->ring, &parser->ib, |
| 574 | vm, ib_chunk->length_dw * 4); |
| 575 | if (r) { |
| 576 | DRM_ERROR("Failed to get ib !\n"); |
| 577 | return r; |
| 578 | } |
| 579 | parser->ib.length_dw = ib_chunk->length_dw; |
| 580 | if (ib_chunk->kdata) |
| 581 | memcpy(parser->ib.ptr, ib_chunk->kdata, ib_chunk->length_dw * 4); |
Daniel Vetter | 1d6ac18 | 2013-12-11 11:34:44 +0100 | [diff] [blame] | 582 | else if (copy_from_user(parser->ib.ptr, ib_chunk->user_ptr, ib_chunk->length_dw * 4)) |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 583 | return -EFAULT; |
| 584 | return 0; |
| 585 | } |
| 586 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 587 | int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) |
| 588 | { |
| 589 | struct radeon_device *rdev = dev->dev_private; |
| 590 | struct radeon_cs_parser parser; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 591 | int r; |
| 592 | |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 593 | down_read(&rdev->exclusive_lock); |
Jerome Glisse | 6b7746e | 2012-02-20 17:57:20 -0500 | [diff] [blame] | 594 | if (!rdev->accel_working) { |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 595 | up_read(&rdev->exclusive_lock); |
Jerome Glisse | 6b7746e | 2012-02-20 17:57:20 -0500 | [diff] [blame] | 596 | return -EBUSY; |
| 597 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 598 | /* initialize parser */ |
| 599 | memset(&parser, 0, sizeof(struct radeon_cs_parser)); |
| 600 | parser.filp = filp; |
| 601 | parser.rdev = rdev; |
Jerome Glisse | c8c15ff | 2010-01-18 13:01:36 +0100 | [diff] [blame] | 602 | parser.dev = rdev->dev; |
Dave Airlie | 428c6e3 | 2011-06-08 19:58:29 +1000 | [diff] [blame] | 603 | parser.family = rdev->family; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 604 | r = radeon_cs_parser_init(&parser, data); |
| 605 | if (r) { |
| 606 | DRM_ERROR("Failed to initialize parser !\n"); |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 607 | radeon_cs_parser_fini(&parser, r, false); |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 608 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 609 | r = radeon_cs_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 610 | return r; |
| 611 | } |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 612 | |
| 613 | r = radeon_cs_ib_fill(rdev, &parser); |
| 614 | if (!r) { |
| 615 | r = radeon_cs_parser_relocs(&parser); |
| 616 | if (r && r != -ERESTARTSYS) |
Dave Airlie | 97f23b3 | 2010-03-19 10:33:44 +1000 | [diff] [blame] | 617 | DRM_ERROR("Failed to parse relocation %d!\n", r); |
Maarten Lankhorst | 28a326c | 2013-10-09 14:36:57 +0200 | [diff] [blame] | 618 | } |
| 619 | |
| 620 | if (r) { |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 621 | radeon_cs_parser_fini(&parser, r, false); |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 622 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 623 | r = radeon_cs_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 624 | return r; |
| 625 | } |
Christian König | 55b51c8 | 2013-04-18 15:25:59 +0200 | [diff] [blame] | 626 | |
Christian König | 860024e | 2013-09-07 18:29:01 +0200 | [diff] [blame] | 627 | trace_radeon_cs(&parser); |
| 628 | |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 629 | r = radeon_cs_ib_chunk(rdev, &parser); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 630 | if (r) { |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 631 | goto out; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 632 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 633 | r = radeon_cs_ib_vm_chunk(rdev, &parser); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 634 | if (r) { |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 635 | goto out; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 636 | } |
Jerome Glisse | 721604a | 2012-01-05 22:11:05 -0500 | [diff] [blame] | 637 | out: |
Maarten Lankhorst | ecff665 | 2013-06-27 13:48:17 +0200 | [diff] [blame] | 638 | radeon_cs_parser_fini(&parser, r, true); |
Jerome Glisse | dee53e7 | 2012-07-02 12:45:19 -0400 | [diff] [blame] | 639 | up_read(&rdev->exclusive_lock); |
Christian König | 6c6f478 | 2012-05-02 15:11:19 +0200 | [diff] [blame] | 640 | r = radeon_cs_handle_lockup(rdev, r); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 641 | return r; |
| 642 | } |
Dave Airlie | 513bcb4 | 2009-09-23 16:56:27 +1000 | [diff] [blame] | 643 | |
Ilija Hadzic | 4db0131 | 2013-01-02 18:27:40 -0500 | [diff] [blame] | 644 | /** |
| 645 | * radeon_cs_packet_parse() - parse cp packet and point ib index to next packet |
| 646 | * @parser: parser structure holding parsing context. |
| 647 | * @pkt: where to store packet information |
| 648 | * |
| 649 | * Assume that chunk_ib_index is properly set. Will return -EINVAL |
| 650 | * if packet is bigger than remaining ib size. or if packets is unknown. |
| 651 | **/ |
| 652 | int radeon_cs_packet_parse(struct radeon_cs_parser *p, |
| 653 | struct radeon_cs_packet *pkt, |
| 654 | unsigned idx) |
| 655 | { |
| 656 | struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx]; |
| 657 | struct radeon_device *rdev = p->rdev; |
| 658 | uint32_t header; |
| 659 | |
| 660 | if (idx >= ib_chunk->length_dw) { |
| 661 | DRM_ERROR("Can not parse packet at %d after CS end %d !\n", |
| 662 | idx, ib_chunk->length_dw); |
| 663 | return -EINVAL; |
| 664 | } |
| 665 | header = radeon_get_ib_value(p, idx); |
| 666 | pkt->idx = idx; |
| 667 | pkt->type = RADEON_CP_PACKET_GET_TYPE(header); |
| 668 | pkt->count = RADEON_CP_PACKET_GET_COUNT(header); |
| 669 | pkt->one_reg_wr = 0; |
| 670 | switch (pkt->type) { |
| 671 | case RADEON_PACKET_TYPE0: |
| 672 | if (rdev->family < CHIP_R600) { |
| 673 | pkt->reg = R100_CP_PACKET0_GET_REG(header); |
| 674 | pkt->one_reg_wr = |
| 675 | RADEON_CP_PACKET0_GET_ONE_REG_WR(header); |
| 676 | } else |
| 677 | pkt->reg = R600_CP_PACKET0_GET_REG(header); |
| 678 | break; |
| 679 | case RADEON_PACKET_TYPE3: |
| 680 | pkt->opcode = RADEON_CP_PACKET3_GET_OPCODE(header); |
| 681 | break; |
| 682 | case RADEON_PACKET_TYPE2: |
| 683 | pkt->count = -1; |
| 684 | break; |
| 685 | default: |
| 686 | DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx); |
| 687 | return -EINVAL; |
| 688 | } |
| 689 | if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) { |
| 690 | DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n", |
| 691 | pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw); |
| 692 | return -EINVAL; |
| 693 | } |
| 694 | return 0; |
| 695 | } |
Ilija Hadzic | 9ffb7a6 | 2013-01-02 18:27:42 -0500 | [diff] [blame] | 696 | |
| 697 | /** |
| 698 | * radeon_cs_packet_next_is_pkt3_nop() - test if the next packet is P3 NOP |
| 699 | * @p: structure holding the parser context. |
| 700 | * |
| 701 | * Check if the next packet is NOP relocation packet3. |
| 702 | **/ |
| 703 | bool radeon_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p) |
| 704 | { |
| 705 | struct radeon_cs_packet p3reloc; |
| 706 | int r; |
| 707 | |
| 708 | r = radeon_cs_packet_parse(p, &p3reloc, p->idx); |
| 709 | if (r) |
| 710 | return false; |
| 711 | if (p3reloc.type != RADEON_PACKET_TYPE3) |
| 712 | return false; |
| 713 | if (p3reloc.opcode != RADEON_PACKET3_NOP) |
| 714 | return false; |
| 715 | return true; |
| 716 | } |
Ilija Hadzic | c3ad63a | 2013-01-02 18:27:45 -0500 | [diff] [blame] | 717 | |
| 718 | /** |
| 719 | * radeon_cs_dump_packet() - dump raw packet context |
| 720 | * @p: structure holding the parser context. |
| 721 | * @pkt: structure holding the packet. |
| 722 | * |
| 723 | * Used mostly for debugging and error reporting. |
| 724 | **/ |
| 725 | void radeon_cs_dump_packet(struct radeon_cs_parser *p, |
| 726 | struct radeon_cs_packet *pkt) |
| 727 | { |
| 728 | volatile uint32_t *ib; |
| 729 | unsigned i; |
| 730 | unsigned idx; |
| 731 | |
| 732 | ib = p->ib.ptr; |
| 733 | idx = pkt->idx; |
| 734 | for (i = 0; i <= (pkt->count + 1); i++, idx++) |
| 735 | DRM_INFO("ib[%d]=0x%08X\n", idx, ib[idx]); |
| 736 | } |
| 737 | |
Ilija Hadzic | e971699 | 2013-01-02 18:27:46 -0500 | [diff] [blame] | 738 | /** |
| 739 | * radeon_cs_packet_next_reloc() - parse next (should be reloc) packet |
| 740 | * @parser: parser structure holding parsing context. |
| 741 | * @data: pointer to relocation data |
| 742 | * @offset_start: starting offset |
| 743 | * @offset_mask: offset mask (to align start offset on) |
| 744 | * @reloc: reloc informations |
| 745 | * |
| 746 | * Check if next packet is relocation packet3, do bo validation and compute |
| 747 | * GPU offset using the provided start. |
| 748 | **/ |
| 749 | int radeon_cs_packet_next_reloc(struct radeon_cs_parser *p, |
| 750 | struct radeon_cs_reloc **cs_reloc, |
| 751 | int nomm) |
| 752 | { |
| 753 | struct radeon_cs_chunk *relocs_chunk; |
| 754 | struct radeon_cs_packet p3reloc; |
| 755 | unsigned idx; |
| 756 | int r; |
| 757 | |
| 758 | if (p->chunk_relocs_idx == -1) { |
| 759 | DRM_ERROR("No relocation chunk !\n"); |
| 760 | return -EINVAL; |
| 761 | } |
| 762 | *cs_reloc = NULL; |
| 763 | relocs_chunk = &p->chunks[p->chunk_relocs_idx]; |
| 764 | r = radeon_cs_packet_parse(p, &p3reloc, p->idx); |
| 765 | if (r) |
| 766 | return r; |
| 767 | p->idx += p3reloc.count + 2; |
| 768 | if (p3reloc.type != RADEON_PACKET_TYPE3 || |
| 769 | p3reloc.opcode != RADEON_PACKET3_NOP) { |
| 770 | DRM_ERROR("No packet3 for relocation for packet at %d.\n", |
| 771 | p3reloc.idx); |
| 772 | radeon_cs_dump_packet(p, &p3reloc); |
| 773 | return -EINVAL; |
| 774 | } |
| 775 | idx = radeon_get_ib_value(p, p3reloc.idx + 1); |
| 776 | if (idx >= relocs_chunk->length_dw) { |
| 777 | DRM_ERROR("Relocs at %d after relocations chunk end %d !\n", |
| 778 | idx, relocs_chunk->length_dw); |
| 779 | radeon_cs_dump_packet(p, &p3reloc); |
| 780 | return -EINVAL; |
| 781 | } |
| 782 | /* FIXME: we assume reloc size is 4 dwords */ |
| 783 | if (nomm) { |
| 784 | *cs_reloc = p->relocs; |
| 785 | (*cs_reloc)->lobj.gpu_offset = |
| 786 | (u64)relocs_chunk->kdata[idx + 3] << 32; |
| 787 | (*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0]; |
| 788 | } else |
| 789 | *cs_reloc = p->relocs_ptr[(idx / 4)]; |
| 790 | return 0; |
| 791 | } |