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Peter Ujfalusi3f187f82012-07-26 17:01:32 +03001/*
2 * Device Tree Source for OMAP243x SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
Florian Vaussard98ef79572013-05-31 14:32:55 +020011#include "omap2.dtsi"
Peter Ujfalusi3f187f82012-07-26 17:01:32 +030012
13/ {
14 compatible = "ti,omap2430", "ti,omap2";
15
16 ocp {
Jon Hunter510c0ff2012-10-25 14:24:14 -050017 counter32k: counter@49020000 {
18 compatible = "ti,omap-counter32k";
19 reg = <0x49020000 0x20>;
20 ti,hwmods = "counter_32k";
21 };
22
Tony Lindgren679e3312012-09-10 10:34:51 -070023 omap2430_pmx: pinmux@49002030 {
24 compatible = "ti,omap2430-padconf", "pinctrl-single";
25 reg = <0x49002030 0x0154>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 pinctrl-single,register-width = <8>;
29 pinctrl-single,function-mask = <0x3f>;
30 };
31
Jon Hunter423182e2013-02-28 15:32:00 -060032 gpio1: gpio@4900c000 {
33 compatible = "ti,omap2-gpio";
34 reg = <0x4900c000 0x200>;
35 interrupts = <29>;
36 ti,hwmods = "gpio1";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050037 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060038 #gpio-cells = <2>;
39 gpio-controller;
40 #interrupt-cells = <2>;
41 interrupt-controller;
42 };
43
44 gpio2: gpio@4900e000 {
45 compatible = "ti,omap2-gpio";
46 reg = <0x4900e000 0x200>;
47 interrupts = <30>;
48 ti,hwmods = "gpio2";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050049 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060050 #gpio-cells = <2>;
51 gpio-controller;
52 #interrupt-cells = <2>;
53 interrupt-controller;
54 };
55
56 gpio3: gpio@49010000 {
57 compatible = "ti,omap2-gpio";
58 reg = <0x49010000 0x200>;
59 interrupts = <31>;
60 ti,hwmods = "gpio3";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050061 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060062 #gpio-cells = <2>;
63 gpio-controller;
64 #interrupt-cells = <2>;
65 interrupt-controller;
66 };
67
68 gpio4: gpio@49012000 {
69 compatible = "ti,omap2-gpio";
70 reg = <0x49012000 0x200>;
71 interrupts = <32>;
72 ti,hwmods = "gpio4";
Jon Huntere4b9b9f2013-04-04 15:16:16 -050073 ti,gpio-always-on;
Jon Hunter423182e2013-02-28 15:32:00 -060074 #gpio-cells = <2>;
75 gpio-controller;
76 #interrupt-cells = <2>;
77 interrupt-controller;
78 };
79
80 gpio5: gpio@480b6000 {
81 compatible = "ti,omap2-gpio";
82 reg = <0x480b6000 0x200>;
83 interrupts = <33>;
84 ti,hwmods = "gpio5";
85 #gpio-cells = <2>;
86 gpio-controller;
87 #interrupt-cells = <2>;
88 interrupt-controller;
89 };
90
Jon Hunter1c7dbb52013-02-22 15:33:31 -060091 gpmc: gpmc@6e000000 {
92 compatible = "ti,omap2430-gpmc";
93 reg = <0x6e000000 0x1000>;
94 #address-cells = <2>;
95 #size-cells = <1>;
96 interrupts = <20>;
97 gpmc,num-cs = <8>;
98 gpmc,num-waitpins = <4>;
99 ti,hwmods = "gpmc";
100 };
101
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300102 mcbsp1: mcbsp@48074000 {
103 compatible = "ti,omap2430-mcbsp";
104 reg = <0x48074000 0xff>;
105 reg-names = "mpu";
106 interrupts = <64>, /* OCP compliant interrupt */
107 <59>, /* TX interrupt */
108 <60>, /* RX interrupt */
109 <61>; /* RX overflow interrupt */
110 interrupt-names = "common", "tx", "rx", "rx_overflow";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300111 ti,buffer-size = <128>;
112 ti,hwmods = "mcbsp1";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100113 dmas = <&sdma 31>,
114 <&sdma 32>;
115 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200116 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300117 };
118
119 mcbsp2: mcbsp@48076000 {
120 compatible = "ti,omap2430-mcbsp";
121 reg = <0x48076000 0xff>;
122 reg-names = "mpu";
123 interrupts = <16>, /* OCP compliant interrupt */
124 <62>, /* TX interrupt */
125 <63>; /* RX interrupt */
126 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300127 ti,buffer-size = <128>;
128 ti,hwmods = "mcbsp2";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100129 dmas = <&sdma 33>,
130 <&sdma 34>;
131 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200132 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300133 };
134
135 mcbsp3: mcbsp@4808c000 {
136 compatible = "ti,omap2430-mcbsp";
137 reg = <0x4808c000 0xff>;
138 reg-names = "mpu";
139 interrupts = <17>, /* OCP compliant interrupt */
140 <89>, /* TX interrupt */
141 <90>; /* RX interrupt */
142 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300143 ti,buffer-size = <128>;
144 ti,hwmods = "mcbsp3";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100145 dmas = <&sdma 17>,
146 <&sdma 18>;
147 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200148 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300149 };
150
151 mcbsp4: mcbsp@4808e000 {
152 compatible = "ti,omap2430-mcbsp";
153 reg = <0x4808e000 0xff>;
154 reg-names = "mpu";
155 interrupts = <18>, /* OCP compliant interrupt */
156 <54>, /* TX interrupt */
157 <55>; /* RX interrupt */
158 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300159 ti,buffer-size = <128>;
160 ti,hwmods = "mcbsp4";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100161 dmas = <&sdma 19>,
162 <&sdma 20>;
163 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200164 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300165 };
166
167 mcbsp5: mcbsp@48096000 {
168 compatible = "ti,omap2430-mcbsp";
169 reg = <0x48096000 0xff>;
170 reg-names = "mpu";
171 interrupts = <19>, /* OCP compliant interrupt */
172 <81>, /* TX interrupt */
173 <82>; /* RX interrupt */
174 interrupt-names = "common", "tx", "rx";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300175 ti,buffer-size = <128>;
176 ti,hwmods = "mcbsp5";
Sebastien Guiriec4e4ead72013-03-11 08:50:21 +0100177 dmas = <&sdma 21>,
178 <&sdma 22>;
179 dma-names = "tx", "rx";
Peter Ujfalusifaa00de2014-01-24 10:19:06 +0200180 status = "disabled";
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300181 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500182
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800183 mmc1: mmc@4809c000 {
184 compatible = "ti,omap2-hsmmc";
185 reg = <0x4809c000 0x200>;
186 interrupts = <83>;
187 ti,hwmods = "mmc1";
188 ti,dual-volt;
189 dmas = <&sdma 61>, <&sdma 62>;
190 dma-names = "tx", "rx";
191 };
192
193 mmc2: mmc@480b4000 {
194 compatible = "ti,omap2-hsmmc";
195 reg = <0x480b4000 0x200>;
196 interrupts = <86>;
197 ti,hwmods = "mmc2";
198 dmas = <&sdma 47>, <&sdma 48>;
199 dma-names = "tx", "rx";
200 };
201
Jon Hunterfab8ad02012-10-19 09:59:00 -0500202 timer1: timer@49018000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500203 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500204 reg = <0x49018000 0x400>;
205 interrupts = <37>;
206 ti,hwmods = "timer1";
207 ti,timer-alwon;
208 };
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800209
210 mcspi3: mcspi@480b8000 {
211 compatible = "ti,omap2-mcspi";
212 ti,hwmods = "mcspi3";
213 reg = <0x480b8000 0x100>;
214 interrupts = <91>;
215 dmas = <&sdma 15 &sdma 16 &sdma 23 &sdma 24>;
216 dma-names = "tx0", "rx0", "tx1", "rx1";
217 };
218
219 usb_otg_hs: usb_otg_hs@480ac000 {
220 compatible = "ti,omap2-musb";
221 ti,hwmods = "usb_otg_hs";
222 reg = <0x480ac000 0x1000>;
223 interrupts = <93>;
224 };
225
226 wd_timer2: wdt@49016000 {
227 compatible = "ti,omap2-wdt";
228 ti,hwmods = "wd_timer2";
229 reg = <0x49016000 0x80>;
230 };
Peter Ujfalusi3f187f82012-07-26 17:01:32 +0300231 };
232};
Tony Lindgren467f4bd2013-11-14 15:25:09 -0800233
234&i2c1 {
235 compatible = "ti,omap2430-i2c";
236};
237
238&i2c2 {
239 compatible = "ti,omap2430-i2c";
240};