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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it would be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
11 *
12 * Further, this software is distributed without any warranty that it is
13 * free of the rightful claim of any third person regarding infringement
14 * or the like. Any license provided herein, whether implied or
15 * otherwise, applies only to this software file. Patent licenses, if
16 * any, provided herein do not apply to combinations of this program with
17 * other software, or any other product whatsoever.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this program; if not, write the Free Software
21 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 *
23 * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
24 * Mountain View, CA 94043, or:
25 *
26 * http://www.sgi.com
27 *
28 * For further information regarding this notice, see:
29 *
30 * http://oss.sgi.com/projects/GenInfo/NoticeExplan
31 */
32
33#ifndef _ASM_IA64_MACHVEC_SN2_H
34#define _ASM_IA64_MACHVEC_SN2_H
35
36extern ia64_mv_setup_t sn_setup;
37extern ia64_mv_cpu_init_t sn_cpu_init;
38extern ia64_mv_irq_init_t sn_irq_init;
39extern ia64_mv_send_ipi_t sn2_send_IPI;
40extern ia64_mv_timer_interrupt_t sn_timer_interrupt;
41extern ia64_mv_global_tlb_purge_t sn2_global_tlb_purge;
42extern ia64_mv_tlb_migrate_finish_t sn_tlb_migrate_finish;
43extern ia64_mv_local_vector_to_irq sn_local_vector_to_irq;
44extern ia64_mv_pci_get_legacy_mem_t sn_pci_get_legacy_mem;
45extern ia64_mv_pci_legacy_read_t sn_pci_legacy_read;
46extern ia64_mv_pci_legacy_write_t sn_pci_legacy_write;
47extern ia64_mv_inb_t __sn_inb;
48extern ia64_mv_inw_t __sn_inw;
49extern ia64_mv_inl_t __sn_inl;
50extern ia64_mv_outb_t __sn_outb;
51extern ia64_mv_outw_t __sn_outw;
52extern ia64_mv_outl_t __sn_outl;
53extern ia64_mv_mmiowb_t __sn_mmiowb;
54extern ia64_mv_readb_t __sn_readb;
55extern ia64_mv_readw_t __sn_readw;
56extern ia64_mv_readl_t __sn_readl;
57extern ia64_mv_readq_t __sn_readq;
58extern ia64_mv_readb_t __sn_readb_relaxed;
59extern ia64_mv_readw_t __sn_readw_relaxed;
60extern ia64_mv_readl_t __sn_readl_relaxed;
61extern ia64_mv_readq_t __sn_readq_relaxed;
62extern ia64_mv_dma_alloc_coherent sn_dma_alloc_coherent;
63extern ia64_mv_dma_free_coherent sn_dma_free_coherent;
64extern ia64_mv_dma_map_single sn_dma_map_single;
65extern ia64_mv_dma_unmap_single sn_dma_unmap_single;
66extern ia64_mv_dma_map_sg sn_dma_map_sg;
67extern ia64_mv_dma_unmap_sg sn_dma_unmap_sg;
68extern ia64_mv_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu;
69extern ia64_mv_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu;
70extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device;
71extern ia64_mv_dma_sync_sg_for_device sn_dma_sync_sg_for_device;
72extern ia64_mv_dma_mapping_error sn_dma_mapping_error;
73extern ia64_mv_dma_supported sn_dma_supported;
74
75/*
76 * This stuff has dual use!
77 *
78 * For a generic kernel, the macros are used to initialize the
79 * platform's machvec structure. When compiling a non-generic kernel,
80 * the macros are used directly.
81 */
82#define platform_name "sn2"
83#define platform_setup sn_setup
84#define platform_cpu_init sn_cpu_init
85#define platform_irq_init sn_irq_init
86#define platform_send_ipi sn2_send_IPI
87#define platform_timer_interrupt sn_timer_interrupt
88#define platform_global_tlb_purge sn2_global_tlb_purge
89#define platform_tlb_migrate_finish sn_tlb_migrate_finish
90#define platform_pci_fixup sn_pci_fixup
91#define platform_inb __sn_inb
92#define platform_inw __sn_inw
93#define platform_inl __sn_inl
94#define platform_outb __sn_outb
95#define platform_outw __sn_outw
96#define platform_outl __sn_outl
97#define platform_mmiowb __sn_mmiowb
98#define platform_readb __sn_readb
99#define platform_readw __sn_readw
100#define platform_readl __sn_readl
101#define platform_readq __sn_readq
102#define platform_readb_relaxed __sn_readb_relaxed
103#define platform_readw_relaxed __sn_readw_relaxed
104#define platform_readl_relaxed __sn_readl_relaxed
105#define platform_readq_relaxed __sn_readq_relaxed
106#define platform_local_vector_to_irq sn_local_vector_to_irq
107#define platform_pci_get_legacy_mem sn_pci_get_legacy_mem
108#define platform_pci_legacy_read sn_pci_legacy_read
109#define platform_pci_legacy_write sn_pci_legacy_write
110#define platform_dma_init machvec_noop
111#define platform_dma_alloc_coherent sn_dma_alloc_coherent
112#define platform_dma_free_coherent sn_dma_free_coherent
113#define platform_dma_map_single sn_dma_map_single
114#define platform_dma_unmap_single sn_dma_unmap_single
115#define platform_dma_map_sg sn_dma_map_sg
116#define platform_dma_unmap_sg sn_dma_unmap_sg
117#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu
118#define platform_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu
119#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device
120#define platform_dma_sync_sg_for_device sn_dma_sync_sg_for_device
121#define platform_dma_mapping_error sn_dma_mapping_error
122#define platform_dma_supported sn_dma_supported
123
124#include <asm/sn/io.h>
125
126#endif /* _ASM_IA64_MACHVEC_SN2_H */