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Mark Browne1a3c742011-05-06 09:45:13 +09001/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
2 *
3 * Copyright 2011 Wolfson Microelectronics plc
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * Copyright 2011 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/serial_core.h>
17#include <linux/platform_device.h>
18#include <linux/fb.h>
19#include <linux/io.h>
20#include <linux/init.h>
21#include <linux/gpio.h>
Mark Brown66211f92011-12-29 18:05:29 +090022#include <linux/leds.h>
Mark Browne1a3c742011-05-06 09:45:13 +090023#include <linux/delay.h>
Mark Brownfb7f60f2011-12-30 13:44:31 +090024#include <linux/mmc/host.h>
Mark Browne1a3c742011-05-06 09:45:13 +090025#include <linux/regulator/machine.h>
Mark Brownae24c262011-06-22 13:08:13 +090026#include <linux/regulator/fixed.h>
Mark Browne1a3c742011-05-06 09:45:13 +090027#include <linux/pwm_backlight.h>
28#include <linux/dm9000.h>
29#include <linux/gpio_keys.h>
30#include <linux/basic_mmio_gpio.h>
31#include <linux/spi/spi.h>
32
33#include <linux/i2c/pca953x.h>
34
35#include <video/platform_lcd.h>
36
37#include <linux/mfd/wm831x/core.h>
38#include <linux/mfd/wm831x/pdata.h>
Mark Brownae24c262011-06-22 13:08:13 +090039#include <linux/mfd/wm831x/irq.h>
Mark Browne1a3c742011-05-06 09:45:13 +090040#include <linux/mfd/wm831x/gpio.h>
41
Mark Brown8504a3c2011-12-02 14:29:07 +090042#include <sound/wm1250-ev1.h>
43
Jamie Iles774b51f2011-11-04 01:10:04 +000044#include <asm/hardware/vic.h>
Mark Browne1a3c742011-05-06 09:45:13 +090045#include <asm/mach/arch.h>
46#include <asm/mach-types.h>
47
48#include <mach/hardware.h>
49#include <mach/map.h>
50
Mark Browne1a3c742011-05-06 09:45:13 +090051#include <mach/regs-sys.h>
52#include <mach/regs-gpio.h>
53#include <mach/regs-modem.h>
Mark Brownd0f0b432011-08-19 22:40:07 +090054#include <mach/crag6410.h>
Mark Browne1a3c742011-05-06 09:45:13 +090055
Mark Browne1a3c742011-05-06 09:45:13 +090056#include <mach/regs-gpio-memport.h>
57
58#include <plat/regs-serial.h>
59#include <plat/regs-fb-v4.h>
60#include <plat/fb.h>
61#include <plat/sdhci.h>
62#include <plat/gpio-cfg.h>
63#include <plat/s3c64xx-spi.h>
64
65#include <plat/keypad.h>
66#include <plat/clock.h>
67#include <plat/devs.h>
68#include <plat/cpu.h>
69#include <plat/adc.h>
70#include <plat/iic.h>
71#include <plat/pm.h>
72
Kukjin Kimb024043b2011-12-22 23:27:42 +010073#include "common.h"
74
Mark Browne1a3c742011-05-06 09:45:13 +090075/* serial port setup */
76
77#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
78#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
79#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
80
81static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
82 [0] = {
Mark Brownae24c262011-06-22 13:08:13 +090083 .hwport = 0,
84 .flags = 0,
85 .ucon = UCON,
86 .ulcon = ULCON,
87 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090088 },
89 [1] = {
Mark Brownae24c262011-06-22 13:08:13 +090090 .hwport = 1,
91 .flags = 0,
92 .ucon = UCON,
93 .ulcon = ULCON,
94 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +090095 },
96 [2] = {
Mark Brownae24c262011-06-22 13:08:13 +090097 .hwport = 2,
98 .flags = 0,
99 .ucon = UCON,
100 .ulcon = ULCON,
101 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900102 },
103 [3] = {
Mark Brownae24c262011-06-22 13:08:13 +0900104 .hwport = 3,
105 .flags = 0,
106 .ucon = UCON,
107 .ulcon = ULCON,
108 .ufcon = UFCON,
Mark Browne1a3c742011-05-06 09:45:13 +0900109 },
110};
111
112static struct platform_pwm_backlight_data crag6410_backlight_data = {
113 .pwm_id = 0,
114 .max_brightness = 1000,
115 .dft_brightness = 600,
116 .pwm_period_ns = 100000, /* about 1kHz */
117};
118
119static struct platform_device crag6410_backlight_device = {
120 .name = "pwm-backlight",
121 .id = -1,
122 .dev = {
123 .parent = &s3c_device_timer[0].dev,
124 .platform_data = &crag6410_backlight_data,
125 },
126};
127
128static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
129{
130 pr_debug("%s: setting power %d\n", __func__, power);
131
132 if (power) {
133 gpio_set_value(S3C64XX_GPB(0), 1);
134 msleep(1);
135 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
136 } else {
137 gpio_direction_output(S3C64XX_GPF(14), 0);
138 gpio_set_value(S3C64XX_GPB(0), 0);
139 }
140}
141
142static struct platform_device crag6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .id = -1,
145 .dev.parent = &s3c_device_fb.dev,
146 .dev.platform_data = &(struct plat_lcd_data) {
147 .set_power = crag6410_lcd_power_set,
148 },
149};
150
151/* 640x480 URT */
152static struct s3c_fb_pd_win crag6410_fb_win0 = {
153 /* this is to ensure we use win0 */
154 .win_mode = {
155 .left_margin = 150,
156 .right_margin = 80,
157 .upper_margin = 40,
158 .lower_margin = 5,
159 .hsync_len = 40,
160 .vsync_len = 5,
161 .xres = 640,
162 .yres = 480,
163 },
164 .max_bpp = 32,
165 .default_bpp = 16,
166 .virtual_y = 480 * 2,
167 .virtual_x = 640,
168};
169
170/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
171static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
172 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
173 .win[0] = &crag6410_fb_win0,
174 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
175 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
176};
177
178/* 2x6 keypad */
179
180static uint32_t crag6410_keymap[] __initdata = {
181 /* KEY(row, col, keycode) */
182 KEY(0, 0, KEY_VOLUMEUP),
183 KEY(0, 1, KEY_HOME),
184 KEY(0, 2, KEY_VOLUMEDOWN),
185 KEY(0, 3, KEY_HELP),
186 KEY(0, 4, KEY_MENU),
187 KEY(0, 5, KEY_MEDIA),
188 KEY(1, 0, 232),
189 KEY(1, 1, KEY_DOWN),
190 KEY(1, 2, KEY_LEFT),
191 KEY(1, 3, KEY_UP),
192 KEY(1, 4, KEY_RIGHT),
193 KEY(1, 5, KEY_CAMERA),
194};
195
196static struct matrix_keymap_data crag6410_keymap_data __initdata = {
197 .keymap = crag6410_keymap,
198 .keymap_size = ARRAY_SIZE(crag6410_keymap),
199};
200
201static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
202 .keymap_data = &crag6410_keymap_data,
203 .rows = 2,
204 .cols = 6,
205};
206
207static struct gpio_keys_button crag6410_gpio_keys[] = {
208 [0] = {
209 .code = KEY_SUSPEND,
210 .gpio = S3C64XX_GPL(10), /* EINT 18 */
Mark Brownae24c262011-06-22 13:08:13 +0900211 .type = EV_KEY,
Mark Browne1a3c742011-05-06 09:45:13 +0900212 .wakeup = 1,
213 .active_low = 1,
214 },
Mark Brownae24c262011-06-22 13:08:13 +0900215 [1] = {
216 .code = SW_FRONT_PROXIMITY,
217 .gpio = S3C64XX_GPN(11), /* EINT 11 */
218 .type = EV_SW,
219 },
Mark Browne1a3c742011-05-06 09:45:13 +0900220};
221
222static struct gpio_keys_platform_data crag6410_gpio_keydata = {
223 .buttons = crag6410_gpio_keys,
224 .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
225};
226
227static struct platform_device crag6410_gpio_keydev = {
228 .name = "gpio-keys",
229 .id = 0,
230 .dev.platform_data = &crag6410_gpio_keydata,
231};
232
233static struct resource crag6410_dm9k_resource[] = {
234 [0] = {
235 .start = S3C64XX_PA_XM0CSN5,
236 .end = S3C64XX_PA_XM0CSN5 + 1,
237 .flags = IORESOURCE_MEM,
238 },
239 [1] = {
240 .start = S3C64XX_PA_XM0CSN5 + (1 << 8),
241 .end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
242 .flags = IORESOURCE_MEM,
243 },
244 [2] = {
245 .start = S3C_EINT(17),
246 .end = S3C_EINT(17),
247 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
248 },
249};
250
251static struct dm9000_plat_data mini6410_dm9k_pdata = {
252 .flags = DM9000_PLATF_16BITONLY,
253};
254
255static struct platform_device crag6410_dm9k_device = {
256 .name = "dm9000",
257 .id = -1,
258 .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
259 .resource = crag6410_dm9k_resource,
260 .dev.platform_data = &mini6410_dm9k_pdata,
261};
262
263static struct resource crag6410_mmgpio_resource[] = {
264 [0] = {
Mark Brown91b60b12011-12-29 18:02:39 +0900265 .name = "dat",
Mark Browne1a3c742011-05-06 09:45:13 +0900266 .start = S3C64XX_PA_XM0CSN4 + 1,
267 .end = S3C64XX_PA_XM0CSN4 + 1,
268 .flags = IORESOURCE_MEM,
269 },
270};
271
272static struct platform_device crag6410_mmgpio = {
273 .name = "basic-mmio-gpio",
274 .id = -1,
275 .resource = crag6410_mmgpio_resource,
276 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
277 .dev.platform_data = &(struct bgpio_pdata) {
Mark Brown91b60b12011-12-29 18:02:39 +0900278 .base = MMGPIO_GPIO_BASE,
Mark Browne1a3c742011-05-06 09:45:13 +0900279 },
280};
281
Mark Brownae24c262011-06-22 13:08:13 +0900282static struct platform_device speyside_device = {
283 .name = "speyside",
284 .id = -1,
285};
286
Mark Brown8c051ab2011-09-05 14:50:02 +0900287static struct platform_device lowland_device = {
288 .name = "lowland",
289 .id = -1,
290};
291
Mark Brown64142612011-11-30 13:30:27 +0000292static struct platform_device tobermory_device = {
293 .name = "tobermory",
Mark Brownae24c262011-06-22 13:08:13 +0900294 .id = -1,
295};
296
Mark Brownc5c32c92011-12-02 14:32:32 +0900297static struct platform_device littlemill_device = {
298 .name = "littlemill",
299 .id = -1,
300};
301
Mark Brownae24c262011-06-22 13:08:13 +0900302static struct regulator_consumer_supply wallvdd_consumers[] = {
303 REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
304 REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900305 REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
306 REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900307};
308
309static struct regulator_init_data wallvdd_data = {
310 .constraints = {
311 .always_on = 1,
312 },
313 .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
314 .consumer_supplies = wallvdd_consumers,
315};
316
317static struct fixed_voltage_config wallvdd_pdata = {
318 .supply_name = "WALLVDD",
319 .microvolts = 5000000,
320 .init_data = &wallvdd_data,
321 .gpio = -EINVAL,
322};
323
324static struct platform_device wallvdd_device = {
325 .name = "reg-fixed-voltage",
326 .id = -1,
327 .dev = {
328 .platform_data = &wallvdd_pdata,
329 },
330};
331
Mark Browne1a3c742011-05-06 09:45:13 +0900332static struct platform_device *crag6410_devices[] __initdata = {
333 &s3c_device_hsmmc0,
Mark Browne1a3c742011-05-06 09:45:13 +0900334 &s3c_device_hsmmc2,
335 &s3c_device_i2c0,
336 &s3c_device_i2c1,
337 &s3c_device_fb,
338 &s3c_device_ohci,
339 &s3c_device_usb_hsotg,
Mark Browne1a3c742011-05-06 09:45:13 +0900340 &s3c_device_timer[0],
341 &s3c64xx_device_iis0,
342 &s3c64xx_device_iis1,
343 &samsung_asoc_dma,
344 &samsung_device_keypad,
345 &crag6410_gpio_keydev,
346 &crag6410_dm9k_device,
347 &s3c64xx_device_spi0,
348 &crag6410_mmgpio,
349 &crag6410_lcd_powerdev,
350 &crag6410_backlight_device,
Mark Brownae24c262011-06-22 13:08:13 +0900351 &speyside_device,
Mark Brown64142612011-11-30 13:30:27 +0000352 &tobermory_device,
Mark Brownc5c32c92011-12-02 14:32:32 +0900353 &littlemill_device,
Mark Brown8c051ab2011-09-05 14:50:02 +0900354 &lowland_device,
Mark Brownae24c262011-06-22 13:08:13 +0900355 &wallvdd_device,
Mark Browne1a3c742011-05-06 09:45:13 +0900356};
357
358static struct pca953x_platform_data crag6410_pca_data = {
359 .gpio_base = PCA935X_GPIO_BASE,
Mark Brown6e11e0b2011-12-30 09:46:40 +0900360 .irq_base = -1,
Mark Browne1a3c742011-05-06 09:45:13 +0900361};
362
Mark Brown986afc92011-08-12 18:08:17 +0900363/* VDDARM is controlled by DVS1 connected to GPK(0) */
364static struct wm831x_buckv_pdata vddarm_pdata = {
365 .dvs_control_src = 1,
366 .dvs_gpio = S3C64XX_GPK(0),
367};
368
Mark Browne1a3c742011-05-06 09:45:13 +0900369static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
370 REGULATOR_SUPPLY("vddarm", NULL),
371};
372
373static struct regulator_init_data vddarm __initdata = {
374 .constraints = {
375 .name = "VDDARM",
376 .min_uV = 1000000,
377 .max_uV = 1300000,
378 .always_on = 1,
379 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
380 },
381 .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
382 .consumer_supplies = vddarm_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900383 .supply_regulator = "WALLVDD",
Mark Brown986afc92011-08-12 18:08:17 +0900384 .driver_data = &vddarm_pdata,
Mark Browne1a3c742011-05-06 09:45:13 +0900385};
386
Mark Brown39cb2632011-12-08 10:52:19 +0900387static struct regulator_consumer_supply vddint_consumers[] __initdata = {
388 REGULATOR_SUPPLY("vddint", NULL),
389};
390
Mark Browne1a3c742011-05-06 09:45:13 +0900391static struct regulator_init_data vddint __initdata = {
392 .constraints = {
393 .name = "VDDINT",
394 .min_uV = 1000000,
395 .max_uV = 1200000,
396 .always_on = 1,
397 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
398 },
Mark Brown39cb2632011-12-08 10:52:19 +0900399 .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
400 .consumer_supplies = vddint_consumers,
401 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900402};
403
404static struct regulator_init_data vddmem __initdata = {
405 .constraints = {
406 .name = "VDDMEM",
407 .always_on = 1,
408 },
409};
410
411static struct regulator_init_data vddsys __initdata = {
412 .constraints = {
413 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
414 .always_on = 1,
415 },
416};
417
418static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
419 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
420 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
421 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
422};
423
424static struct regulator_init_data vddmmc __initdata = {
425 .constraints = {
426 .name = "VDDMMC,UH",
427 .always_on = 1,
428 },
429 .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
430 .consumer_supplies = vddmmc_consumers,
Mark Brown35127292011-06-22 13:08:17 +0900431 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900432};
433
434static struct regulator_init_data vddotgi __initdata = {
435 .constraints = {
436 .name = "VDDOTGi",
437 .always_on = 1,
438 },
Mark Brown35127292011-06-22 13:08:17 +0900439 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900440};
441
442static struct regulator_init_data vddotg __initdata = {
443 .constraints = {
444 .name = "VDDOTG",
445 .always_on = 1,
446 },
Mark Brown35127292011-06-22 13:08:17 +0900447 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900448};
449
450static struct regulator_init_data vddhi __initdata = {
451 .constraints = {
452 .name = "VDDHI",
453 .always_on = 1,
454 },
Mark Brown35127292011-06-22 13:08:17 +0900455 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900456};
457
458static struct regulator_init_data vddadc __initdata = {
459 .constraints = {
460 .name = "VDDADC,VDDDAC",
461 .always_on = 1,
462 },
Mark Brown35127292011-06-22 13:08:17 +0900463 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900464};
465
466static struct regulator_init_data vddmem0 __initdata = {
467 .constraints = {
468 .name = "VDDMEM0",
469 .always_on = 1,
470 },
Mark Brown35127292011-06-22 13:08:17 +0900471 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900472};
473
474static struct regulator_init_data vddpll __initdata = {
475 .constraints = {
476 .name = "VDDPLL",
477 .always_on = 1,
478 },
Mark Brown35127292011-06-22 13:08:17 +0900479 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900480};
481
482static struct regulator_init_data vddlcd __initdata = {
483 .constraints = {
484 .name = "VDDLCD",
485 .always_on = 1,
486 },
Mark Brown35127292011-06-22 13:08:17 +0900487 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900488};
489
490static struct regulator_init_data vddalive __initdata = {
491 .constraints = {
492 .name = "VDDALIVE",
493 .always_on = 1,
494 },
Mark Brown35127292011-06-22 13:08:17 +0900495 .supply_regulator = "WALLVDD",
Mark Browne1a3c742011-05-06 09:45:13 +0900496};
497
Mark Brown89e1c3d2011-07-21 01:26:24 +0900498static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
499 .charger_enable = 1,
500 .vlim = 2500, /* mV */
501 .ilim = 200, /* uA */
502};
503
Mark Browne1a3c742011-05-06 09:45:13 +0900504static struct wm831x_status_pdata banff_red_led __initdata = {
505 .name = "banff:red:",
506 .default_src = WM831X_STATUS_MANUAL,
507};
508
509static struct wm831x_status_pdata banff_green_led __initdata = {
510 .name = "banff:green:",
511 .default_src = WM831X_STATUS_MANUAL,
512};
513
514static struct wm831x_touch_pdata touch_pdata __initdata = {
515 .data_irq = S3C_EINT(26),
Mark Brownae24c262011-06-22 13:08:13 +0900516 .pd_irq = S3C_EINT(27),
Mark Browne1a3c742011-05-06 09:45:13 +0900517};
518
Mark Browne1a3c742011-05-06 09:45:13 +0900519static struct wm831x_pdata crag_pmic_pdata __initdata = {
Mark Brownae24c262011-06-22 13:08:13 +0900520 .wm831x_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900521 .irq_base = BANFF_PMIC_IRQ_BASE,
Mark Brownaaed44e2011-11-03 16:28:15 +0900522 .gpio_base = BANFF_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900523 .soft_shutdown = true,
Mark Browne1a3c742011-05-06 09:45:13 +0900524
Mark Brown89e1c3d2011-07-21 01:26:24 +0900525 .backup = &banff_backup_pdata,
526
Mark Brownae24c262011-06-22 13:08:13 +0900527 .gpio_defaults = {
Mark Brown986afc92011-08-12 18:08:17 +0900528 /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
529 [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
Mark Brownae24c262011-06-22 13:08:13 +0900530 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
531 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
532 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
533 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
534 },
535
Mark Browne1a3c742011-05-06 09:45:13 +0900536 .dcdc = {
537 &vddarm, /* DCDC1 */
538 &vddint, /* DCDC2 */
539 &vddmem, /* DCDC3 */
540 },
541
542 .ldo = {
543 &vddsys, /* LDO1 */
544 &vddmmc, /* LDO2 */
545 NULL, /* LDO3 */
546 &vddotgi, /* LDO4 */
547 &vddotg, /* LDO5 */
548 &vddhi, /* LDO6 */
549 &vddadc, /* LDO7 */
550 &vddmem0, /* LDO8 */
551 &vddpll, /* LDO9 */
552 &vddlcd, /* LDO10 */
553 &vddalive, /* LDO11 */
554 },
555
556 .status = {
557 &banff_green_led,
558 &banff_red_led,
559 },
560
561 .touch = &touch_pdata,
562};
563
564static struct i2c_board_info i2c_devs0[] __initdata = {
565 { I2C_BOARD_INFO("24c08", 0x50), },
566 { I2C_BOARD_INFO("tca6408", 0x20),
567 .platform_data = &crag6410_pca_data,
568 },
569 { I2C_BOARD_INFO("wm8312", 0x34),
570 .platform_data = &crag_pmic_pdata,
571 .irq = S3C_EINT(23),
572 },
573};
574
575static struct s3c2410_platform_i2c i2c0_pdata = {
576 .frequency = 400000,
577};
578
Mark Brownae24c262011-06-22 13:08:13 +0900579static struct regulator_init_data pvdd_1v2 __initdata = {
580 .constraints = {
581 .name = "PVDD_1V2",
582 .always_on = 1,
583 },
584};
585
586static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
Mark Brownd5160ec2011-09-26 13:18:28 +0900587 REGULATOR_SUPPLY("LDOVDD", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900588 REGULATOR_SUPPLY("PLLVDD", "1-001a"),
589 REGULATOR_SUPPLY("DBVDD", "1-001a"),
Mark Brown4ed12b52011-08-31 08:03:11 +0900590 REGULATOR_SUPPLY("DBVDD1", "1-001a"),
591 REGULATOR_SUPPLY("DBVDD2", "1-001a"),
592 REGULATOR_SUPPLY("DBVDD3", "1-001a"),
Mark Brownae24c262011-06-22 13:08:13 +0900593 REGULATOR_SUPPLY("CPVDD", "1-001a"),
594 REGULATOR_SUPPLY("AVDD2", "1-001a"),
595 REGULATOR_SUPPLY("DCVDD", "1-001a"),
596 REGULATOR_SUPPLY("AVDD", "1-001a"),
597};
598
599static struct regulator_init_data pvdd_1v8 __initdata = {
600 .constraints = {
601 .name = "PVDD_1V8",
602 .always_on = 1,
603 },
604
605 .consumer_supplies = pvdd_1v8_consumers,
606 .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
607};
608
609static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
610 REGULATOR_SUPPLY("MICVDD", "1-001a"),
611 REGULATOR_SUPPLY("AVDD1", "1-001a"),
612};
613
614static struct regulator_init_data pvdd_3v3 __initdata = {
615 .constraints = {
616 .name = "PVDD_3V3",
617 .always_on = 1,
618 },
619
620 .consumer_supplies = pvdd_3v3_consumers,
621 .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
622};
623
624static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
625 .wm831x_num = 2,
626 .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
627 .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
Mark Browndcf35802011-12-02 14:29:07 +0900628 .soft_shutdown = true,
Mark Brownae24c262011-06-22 13:08:13 +0900629
630 .gpio_defaults = {
631 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
632 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
633 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
634 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
635 },
636
637 .dcdc = {
638 &pvdd_1v2, /* DCDC1 */
639 &pvdd_1v8, /* DCDC2 */
640 &pvdd_3v3, /* DCDC3 */
641 },
642
643 .disable_touch = true,
644};
645
Mark Brown8504a3c2011-12-02 14:29:07 +0900646static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
647 .gpios = {
648 [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
649 [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
650 [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
651 [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
652 [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
653 },
654};
655
Mark Browne1a3c742011-05-06 09:45:13 +0900656static struct i2c_board_info i2c_devs1[] __initdata = {
657 { I2C_BOARD_INFO("wm8311", 0x34),
Mark Brownae24c262011-06-22 13:08:13 +0900658 .irq = S3C_EINT(0),
659 .platform_data = &glenfarclas_pmic_pdata },
660
Mark Brownd0f0b432011-08-19 22:40:07 +0900661 { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
662 { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
663 { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
664
Mark Brown8504a3c2011-12-02 14:29:07 +0900665 { I2C_BOARD_INFO("wm1250-ev1", 0x27),
666 .platform_data = &wm1250_ev1_pdata },
Mark Browne1a3c742011-05-06 09:45:13 +0900667};
668
Mark Brown8351c7a2011-12-02 14:29:07 +0900669static struct s3c2410_platform_i2c i2c1_pdata = {
670 .frequency = 400000,
671 .bus_num = 1,
Mark Browne1a3c742011-05-06 09:45:13 +0900672};
673
674static void __init crag6410_map_io(void)
675{
676 s3c64xx_init_io(NULL, 0);
677 s3c24xx_init_clocks(12000000);
678 s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
679
680 /* LCD type and Bypass set by bootloader */
681}
682
683static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
684 .max_width = 4,
685 .cd_type = S3C_SDHCI_CD_PERMANENT,
686};
687
Mark Browne1a3c742011-05-06 09:45:13 +0900688static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
689{
690 /* Set all the necessary GPG pins to special-function 2 */
691 s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
692
693 /* force card-detected for prototype 0 */
694 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
695}
696
697static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
698 .max_width = 4,
699 .cd_type = S3C_SDHCI_CD_INTERNAL,
700 .cfg_gpio = crag6410_cfg_sdhci0,
Mark Brownfb7f60f2011-12-30 13:44:31 +0900701 .host_caps = MMC_CAP_POWER_OFF_CARD,
Mark Browne1a3c742011-05-06 09:45:13 +0900702};
703
Mark Brown66211f92011-12-29 18:05:29 +0900704static const struct gpio_led gpio_leds[] = {
705 {
706 .name = "d13:green:",
707 .gpio = MMGPIO_GPIO_BASE + 0,
708 .default_state = LEDS_GPIO_DEFSTATE_ON,
709 },
710 {
711 .name = "d14:green:",
712 .gpio = MMGPIO_GPIO_BASE + 1,
713 .default_state = LEDS_GPIO_DEFSTATE_ON,
714 },
715 {
716 .name = "d15:green:",
717 .gpio = MMGPIO_GPIO_BASE + 2,
718 .default_state = LEDS_GPIO_DEFSTATE_ON,
719 },
720 {
721 .name = "d16:green:",
722 .gpio = MMGPIO_GPIO_BASE + 3,
723 .default_state = LEDS_GPIO_DEFSTATE_ON,
724 },
725 {
726 .name = "d17:green:",
727 .gpio = MMGPIO_GPIO_BASE + 4,
728 .default_state = LEDS_GPIO_DEFSTATE_ON,
729 },
730 {
731 .name = "d18:green:",
732 .gpio = MMGPIO_GPIO_BASE + 5,
733 .default_state = LEDS_GPIO_DEFSTATE_ON,
734 },
735 {
736 .name = "d19:green:",
737 .gpio = MMGPIO_GPIO_BASE + 6,
738 .default_state = LEDS_GPIO_DEFSTATE_ON,
739 },
740 {
741 .name = "d20:green:",
742 .gpio = MMGPIO_GPIO_BASE + 7,
743 .default_state = LEDS_GPIO_DEFSTATE_ON,
744 },
745};
746
747static const struct gpio_led_platform_data gpio_leds_pdata = {
748 .leds = gpio_leds,
749 .num_leds = ARRAY_SIZE(gpio_leds),
750};
751
Mark Browne1a3c742011-05-06 09:45:13 +0900752static void __init crag6410_machine_init(void)
753{
754 /* Open drain IRQs need pullups */
755 s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
756 s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
757
758 gpio_request(S3C64XX_GPB(0), "LCD power");
759 gpio_direction_output(S3C64XX_GPB(0), 0);
760
761 gpio_request(S3C64XX_GPF(14), "LCD PWM");
762 gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
763
764 gpio_request(S3C64XX_GPB(1), "SD power");
765 gpio_direction_output(S3C64XX_GPB(1), 0);
766
767 gpio_request(S3C64XX_GPF(10), "nRESETSEL");
768 gpio_direction_output(S3C64XX_GPF(10), 1);
769
770 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900771 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
772
773 s3c_i2c0_set_platdata(&i2c0_pdata);
Mark Brown8351c7a2011-12-02 14:29:07 +0900774 s3c_i2c1_set_platdata(&i2c1_pdata);
Mark Browne1a3c742011-05-06 09:45:13 +0900775 s3c_fb_set_platdata(&crag6410_lcd_pdata);
776
777 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
778 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
779
780 samsung_keypad_set_platdata(&crag6410_keypad_data);
Mark Brown6e2f2b42011-12-30 10:00:07 +0900781 s3c64xx_spi0_set_platdata(NULL, 0, 1);
Mark Browne1a3c742011-05-06 09:45:13 +0900782
783 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
784
Mark Brown66211f92011-12-29 18:05:29 +0900785 gpio_led_register_device(-1, &gpio_leds_pdata);
786
Mark Brownae24c262011-06-22 13:08:13 +0900787 regulator_has_full_constraints();
788
Mark Brownc656c302011-12-08 23:27:48 +0100789 s3c64xx_pm_init();
Mark Browne1a3c742011-05-06 09:45:13 +0900790}
791
792MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
793 /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400794 .atag_offset = 0x100,
Mark Browne1a3c742011-05-06 09:45:13 +0900795 .init_irq = s3c6410_init_irq,
Jamie Iles774b51f2011-11-04 01:10:04 +0000796 .handle_irq = vic_handle_irq,
Mark Browne1a3c742011-05-06 09:45:13 +0900797 .map_io = crag6410_map_io,
798 .init_machine = crag6410_machine_init,
799 .timer = &s3c24xx_timer,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100800 .restart = s3c64xx_restart,
Mark Browne1a3c742011-05-06 09:45:13 +0900801MACHINE_END