blob: 5df58d1aba06661cd706522f86b5e7a88407a350 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#include "drmP.h"
Dave Airlieeb1f8e42010-05-07 06:42:51 +000029#include "drm_crtc_helper.h"
Jerome Glisse771fe6b2009-06-05 14:42:42 +020030#include "radeon_drm.h"
31#include "radeon_reg.h"
Jerome Glisse771fe6b2009-06-05 14:42:42 +020032#include "radeon.h"
33#include "atom.h"
34
Jerome Glisse771fe6b2009-06-05 14:42:42 +020035irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
36{
37 struct drm_device *dev = (struct drm_device *) arg;
38 struct radeon_device *rdev = dev->dev_private;
39
40 return radeon_irq_process(rdev);
41}
42
Alex Deucherd4877cf2009-12-04 16:56:37 -050043/*
44 * Handle hotplug events outside the interrupt handler proper.
45 */
46static void radeon_hotplug_work_func(struct work_struct *work)
47{
48 struct radeon_device *rdev = container_of(work, struct radeon_device,
49 hotplug_work);
50 struct drm_device *dev = rdev->ddev;
51 struct drm_mode_config *mode_config = &dev->mode_config;
52 struct drm_connector *connector;
53
54 if (mode_config->num_connector) {
55 list_for_each_entry(connector, &mode_config->connector_list, head)
56 radeon_connector_hotplug(connector);
57 }
58 /* Just fire off a uevent and let userspace tell us what to do */
Dave Airlieeb1f8e42010-05-07 06:42:51 +000059 drm_helper_hpd_irq_event(dev);
Alex Deucherd4877cf2009-12-04 16:56:37 -050060}
61
Jerome Glisse771fe6b2009-06-05 14:42:42 +020062void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
63{
64 struct radeon_device *rdev = dev->dev_private;
65 unsigned i;
66
67 /* Disable *all* interrupts */
Alex Deucher1b370782011-11-17 20:13:28 -050068 for (i = 0; i < RADEON_NUM_RINGS; i++)
69 rdev->irq.sw_int[i] = false;
Alex Deucher2031f772010-04-22 12:52:11 -040070 rdev->irq.gui_idle = false;
Ilija Hadzic54bd52062011-10-26 15:43:58 -040071 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
Alex Deucher9e7b4142010-03-16 17:08:06 -040072 rdev->irq.hpd[i] = false;
Ilija Hadzic54bd52062011-10-26 15:43:58 -040073 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
74 rdev->irq.crtc_vblank_int[i] = false;
Alex Deucher6f34be52010-11-21 10:59:01 -050075 rdev->irq.pflip[i] = false;
Alex Deucherf122c612012-03-30 08:59:57 -040076 rdev->irq.afmt[i] = false;
Alex Deucher6f34be52010-11-21 10:59:01 -050077 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +020078 radeon_irq_set(rdev);
79 /* Clear bits */
80 radeon_irq_process(rdev);
81}
82
83int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
84{
85 struct radeon_device *rdev = dev->dev_private;
Alex Deucher1b370782011-11-17 20:13:28 -050086 unsigned i;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020087
88 dev->max_vblank_count = 0x001fffff;
Alex Deucher1b370782011-11-17 20:13:28 -050089 for (i = 0; i < RADEON_NUM_RINGS; i++)
90 rdev->irq.sw_int[i] = true;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020091 radeon_irq_set(rdev);
92 return 0;
93}
94
95void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
96{
97 struct radeon_device *rdev = dev->dev_private;
98 unsigned i;
99
100 if (rdev == NULL) {
101 return;
102 }
103 /* Disable *all* interrupts */
Alex Deucher1b370782011-11-17 20:13:28 -0500104 for (i = 0; i < RADEON_NUM_RINGS; i++)
105 rdev->irq.sw_int[i] = false;
Alex Deucher2031f772010-04-22 12:52:11 -0400106 rdev->irq.gui_idle = false;
Ilija Hadzic54bd52062011-10-26 15:43:58 -0400107 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
Jerome Glisse003e69f2010-01-07 15:39:14 +0100108 rdev->irq.hpd[i] = false;
Ilija Hadzic54bd52062011-10-26 15:43:58 -0400109 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
110 rdev->irq.crtc_vblank_int[i] = false;
Alex Deucher6f34be52010-11-21 10:59:01 -0500111 rdev->irq.pflip[i] = false;
Alex Deucherf122c612012-03-30 08:59:57 -0400112 rdev->irq.afmt[i] = false;
Alex Deucher6f34be52010-11-21 10:59:01 -0500113 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200114 radeon_irq_set(rdev);
115}
116
Alex Deucher8f6c25c2011-10-25 14:58:49 -0400117static bool radeon_msi_ok(struct radeon_device *rdev)
118{
119 /* RV370/RV380 was first asic with MSI support */
120 if (rdev->family < CHIP_RV380)
121 return false;
122
123 /* MSIs don't work on AGP */
124 if (rdev->flags & RADEON_IS_AGP)
125 return false;
126
Alex Deuchera18cee12011-11-01 14:20:30 -0400127 /* force MSI on */
128 if (radeon_msi == 1)
129 return true;
130 else if (radeon_msi == 0)
131 return false;
132
Alex Deucherb3621052011-10-25 15:11:08 -0400133 /* Quirks */
134 /* HP RS690 only seems to work with MSIs. */
135 if ((rdev->pdev->device == 0x791f) &&
136 (rdev->pdev->subsystem_vendor == 0x103c) &&
137 (rdev->pdev->subsystem_device == 0x30c2))
138 return true;
139
Alex Deucher01e718e2011-11-01 14:14:18 -0400140 /* Dell RS690 only seems to work with MSIs. */
141 if ((rdev->pdev->device == 0x791f) &&
142 (rdev->pdev->subsystem_vendor == 0x1028) &&
Alex Deucher44517c42012-01-15 08:51:12 -0500143 (rdev->pdev->subsystem_device == 0x01fc))
144 return true;
145
146 /* Dell RS690 only seems to work with MSIs. */
147 if ((rdev->pdev->device == 0x791f) &&
148 (rdev->pdev->subsystem_vendor == 0x1028) &&
Alex Deucher01e718e2011-11-01 14:14:18 -0400149 (rdev->pdev->subsystem_device == 0x01fd))
150 return true;
151
Dave Airlie16a5e322012-04-13 11:14:50 +0100152 /* RV515 seems to have MSI issues where it loses
153 * MSI rearms occasionally. This leads to lockups and freezes.
154 * disable it by default.
155 */
156 if (rdev->family == CHIP_RV515)
157 return false;
Alex Deucher8f6c25c2011-10-25 14:58:49 -0400158 if (rdev->flags & RADEON_IS_IGP) {
159 /* APUs work fine with MSIs */
160 if (rdev->family >= CHIP_PALM)
161 return true;
162 /* lots of IGPs have problems with MSIs */
163 return false;
164 }
165
166 return true;
167}
168
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200169int radeon_irq_kms_init(struct radeon_device *rdev)
170{
Michel Dänzer29d9ebc2011-01-11 10:44:54 +0100171 int i;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200172 int r = 0;
173
Tejun Heo32c87fc2011-01-03 14:49:32 +0100174 INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
Alex Deucherf122c612012-03-30 08:59:57 -0400175 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
Tejun Heo32c87fc2011-01-03 14:49:32 +0100176
Dave Airlie1614f8b2009-12-01 16:04:56 +1000177 spin_lock_init(&rdev->irq.sw_lock);
Michel Dänzer29d9ebc2011-01-11 10:44:54 +0100178 for (i = 0; i < rdev->num_crtc; i++)
179 spin_lock_init(&rdev->irq.pflip_lock[i]);
Alex Deucher9e7b4142010-03-16 17:08:06 -0400180 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200181 if (r) {
182 return r;
183 }
Alex Deucher3e5cb982009-10-16 12:21:24 -0400184 /* enable msi */
185 rdev->msi_enabled = 0;
Alex Deucher8f6c25c2011-10-25 14:58:49 -0400186
187 if (radeon_msi_ok(rdev)) {
Alex Deucher3e5cb982009-10-16 12:21:24 -0400188 int ret = pci_enable_msi(rdev->pdev);
Alex Deucherd8f60cf2009-12-01 13:43:46 -0500189 if (!ret) {
Alex Deucher3e5cb982009-10-16 12:21:24 -0400190 rdev->msi_enabled = 1;
Alex Deucherda7be682010-08-12 18:05:34 -0400191 dev_info(rdev->dev, "radeon: using MSI.\n");
Alex Deucherd8f60cf2009-12-01 13:43:46 -0500192 }
Alex Deucher3e5cb982009-10-16 12:21:24 -0400193 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200194 rdev->irq.installed = true;
Jerome Glisse003e69f2010-01-07 15:39:14 +0100195 r = drm_irq_install(rdev->ddev);
196 if (r) {
197 rdev->irq.installed = false;
198 return r;
199 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200200 DRM_INFO("radeon: irq initialized.\n");
201 return 0;
202}
203
204void radeon_irq_kms_fini(struct radeon_device *rdev)
205{
Jerome Glisse003e69f2010-01-07 15:39:14 +0100206 drm_vblank_cleanup(rdev->ddev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200207 if (rdev->irq.installed) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200208 drm_irq_uninstall(rdev->ddev);
Jerome Glisse003e69f2010-01-07 15:39:14 +0100209 rdev->irq.installed = false;
Alex Deucher3e5cb982009-10-16 12:21:24 -0400210 if (rdev->msi_enabled)
211 pci_disable_msi(rdev->pdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200212 }
Tejun Heo32c87fc2011-01-03 14:49:32 +0100213 flush_work_sync(&rdev->hotplug_work);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200214}
Dave Airlie1614f8b2009-12-01 16:04:56 +1000215
Alex Deucher1b370782011-11-17 20:13:28 -0500216void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
Dave Airlie1614f8b2009-12-01 16:04:56 +1000217{
218 unsigned long irqflags;
219
220 spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
Alex Deucher1b370782011-11-17 20:13:28 -0500221 if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount[ring] == 1)) {
222 rdev->irq.sw_int[ring] = true;
Dave Airlie1614f8b2009-12-01 16:04:56 +1000223 radeon_irq_set(rdev);
224 }
225 spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
226}
227
Alex Deucher1b370782011-11-17 20:13:28 -0500228void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
Dave Airlie1614f8b2009-12-01 16:04:56 +1000229{
230 unsigned long irqflags;
231
232 spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
Alex Deucher1b370782011-11-17 20:13:28 -0500233 BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount[ring] <= 0);
234 if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount[ring] == 0)) {
235 rdev->irq.sw_int[ring] = false;
Dave Airlie1614f8b2009-12-01 16:04:56 +1000236 radeon_irq_set(rdev);
237 }
238 spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
239}
240
Alex Deucher6f34be52010-11-21 10:59:01 -0500241void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
242{
243 unsigned long irqflags;
244
245 if (crtc < 0 || crtc >= rdev->num_crtc)
246 return;
247
248 spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
249 if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
250 rdev->irq.pflip[crtc] = true;
251 radeon_irq_set(rdev);
252 }
253 spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
254}
255
256void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
257{
258 unsigned long irqflags;
259
260 if (crtc < 0 || crtc >= rdev->num_crtc)
261 return;
262
263 spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
264 BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
265 if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
266 rdev->irq.pflip[crtc] = false;
267 radeon_irq_set(rdev);
268 }
269 spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
270}
271