blob: 9a60fde32b02c286d2c845300de326284041d5ff [file] [log] [blame]
Stephen Boydcc4f2fe2014-01-15 10:47:33 -08001Qualcomm Global Clock & Reset Controller Binding
2------------------------------------------------
3
4Required properties :
5- compatible : shall contain only one of the following:
6
Kumar Gala2d85a712014-04-04 11:31:29 -05007 "qcom,gcc-apq8064"
Georgi Djakov56097d8d2014-06-03 17:24:08 +03008 "qcom,gcc-apq8084"
Kumar Gala24d8fba2014-06-17 14:46:51 -05009 "qcom,gcc-ipq8064"
Varadarajan Narayanan6971e862015-11-19 17:19:29 -060010 "qcom,gcc-ipq4019"
Stephen Boydcc4f2fe2014-01-15 10:47:33 -080011 "qcom,gcc-msm8660"
Georgi Djakova5408ec2015-03-18 16:08:21 +020012 "qcom,gcc-msm8916"
Stephen Boydcc4f2fe2014-01-15 10:47:33 -080013 "qcom,gcc-msm8960"
14 "qcom,gcc-msm8974"
Stephen Boydc6858412014-05-16 16:07:13 -070015 "qcom,gcc-msm8974pro"
16 "qcom,gcc-msm8974pro-ac"
Stephen Boydb1e010c2015-11-30 17:31:40 -080017 "qcom,gcc-msm8996"
Stephen Boydcc4f2fe2014-01-15 10:47:33 -080018
19- reg : shall contain base register location and length
20- #clock-cells : shall contain 1
21- #reset-cells : shall contain 1
22
Rajendra Nayak89c7e672015-10-01 14:56:02 +053023Optional properties :
24- #power-domain-cells : shall contain 1
25
Stephen Boydcc4f2fe2014-01-15 10:47:33 -080026Example:
27 clock-controller@900000 {
28 compatible = "qcom,gcc-msm8960";
29 reg = <0x900000 0x4000>;
30 #clock-cells = <1>;
31 #reset-cells = <1>;
Rajendra Nayak89c7e672015-10-01 14:56:02 +053032 #power-domain-cells = <1>;
Stephen Boydcc4f2fe2014-01-15 10:47:33 -080033 };