Maxime Coquelin | 936516b | 2016-01-14 13:16:28 +0100 | [diff] [blame] | 1 | * STM32 GPIO and Pin Mux/Config controller |
| 2 | |
| 3 | STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware |
| 4 | controller. It controls the input/output settings on the available pins and |
| 5 | also provides ability to multiplex and configure the output of various on-chip |
| 6 | controllers onto these pads. |
| 7 | |
| 8 | Pin controller node: |
| 9 | Required properies: |
| 10 | - compatible: value should be one of the following: |
| 11 | (a) "st,stm32f429-pinctrl" |
Alexandre TORGUE | 8e40439 | 2016-07-05 15:40:17 +0200 | [diff] [blame] | 12 | (b) "st,stm32f746-pinctrl" |
Maxime Coquelin | 936516b | 2016-01-14 13:16:28 +0100 | [diff] [blame] | 13 | - #address-cells: The value of this property must be 1 |
| 14 | - #size-cells : The value of this property must be 1 |
| 15 | - ranges : defines mapping between pin controller node (parent) to |
| 16 | gpio-bank node (children). |
| 17 | - pins-are-numbered: Specify the subnodes are using numbered pinmux to |
| 18 | specify pins. |
| 19 | |
| 20 | GPIO controller/bank node: |
| 21 | Required properties: |
| 22 | - gpio-controller : Indicates this device is a GPIO controller |
| 23 | - #gpio-cells : Should be two. |
| 24 | The first cell is the pin number |
| 25 | The second one is the polarity: |
| 26 | - 0 for active high |
| 27 | - 1 for active low |
| 28 | - reg : The gpio address range, relative to the pinctrl range |
| 29 | - clocks : clock that drives this bank |
| 30 | - st,bank-name : Should be a name string for this bank as specified in |
| 31 | the datasheet |
| 32 | |
| 33 | Optional properties: |
| 34 | - reset: : Reference to the reset controller |
| 35 | |
| 36 | Example: |
| 37 | #include <dt-bindings/pinctrl/stm32f429-pinfunc.h> |
| 38 | ... |
| 39 | |
| 40 | pin-controller { |
| 41 | #address-cells = <1>; |
| 42 | #size-cells = <1>; |
| 43 | compatible = "st,stm32f429-pinctrl"; |
| 44 | ranges = <0 0x40020000 0x3000>; |
| 45 | pins-are-numbered; |
| 46 | |
| 47 | gpioa: gpio@40020000 { |
| 48 | gpio-controller; |
| 49 | #gpio-cells = <2>; |
| 50 | reg = <0x0 0x400>; |
| 51 | resets = <&reset_ahb1 0>; |
| 52 | st,bank-name = "GPIOA"; |
| 53 | }; |
| 54 | ... |
| 55 | pin-functions nodes follow... |
| 56 | }; |
| 57 | |
| 58 | Contents of function subnode node: |
| 59 | ---------------------------------- |
| 60 | Subnode format |
| 61 | A pinctrl node should contain at least one subnode representing the |
| 62 | pinctrl group available on the machine. Each subnode will list the |
| 63 | pins it needs, and how they should be configured, with regard to muxer |
| 64 | configuration, pullups, drive, output high/low and output speed. |
| 65 | |
| 66 | node { |
| 67 | pinmux = <PIN_NUMBER_PINMUX>; |
| 68 | GENERIC_PINCONFIG; |
| 69 | }; |
| 70 | |
| 71 | Required properties: |
| 72 | - pinmux: integer array, represents gpio pin number and mux setting. |
| 73 | Supported pin number and mux varies for different SoCs, and are defined in |
| 74 | dt-bindings/pinctrl/<soc>-pinfunc.h directly. |
| 75 | These defines are calculated as: |
| 76 | ((port * 16 + line) << 8) | function |
| 77 | With: |
| 78 | - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11) |
| 79 | - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15) |
| 80 | - function: The function number, can be: |
| 81 | * 0 : GPIO |
| 82 | * 1 : Alternate Function 0 |
| 83 | * 2 : Alternate Function 1 |
| 84 | * 3 : Alternate Function 2 |
| 85 | * ... |
| 86 | * 16 : Alternate Function 15 |
| 87 | * 17 : Analog |
| 88 | |
| 89 | Optional properties: |
| 90 | - GENERIC_PINCONFIG: is the generic pinconfig options to use. |
| 91 | Available options are: |
| 92 | - bias-disable, |
| 93 | - bias-pull-down, |
| 94 | - bias-pull-up, |
| 95 | - drive-push-pull, |
| 96 | - drive-open-drain, |
| 97 | - output-low |
| 98 | - output-high |
| 99 | - slew-rate = <x>, with x being: |
| 100 | < 0 > : Low speed |
| 101 | < 1 > : Medium speed |
| 102 | < 2 > : Fast speed |
| 103 | < 3 > : High speed |
| 104 | |
| 105 | Example: |
| 106 | |
| 107 | pin-controller { |
| 108 | ... |
| 109 | usart1_pins_a: usart1@0 { |
| 110 | pins1 { |
| 111 | pinmux = <STM32F429_PA9_FUNC_USART1_TX>; |
| 112 | bias-disable; |
| 113 | drive-push-pull; |
| 114 | slew-rate = <0>; |
| 115 | }; |
| 116 | pins2 { |
| 117 | pinmux = <STM32F429_PA10_FUNC_USART1_RX>; |
| 118 | bias-disable; |
| 119 | }; |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | &usart1 { |
| 124 | pinctrl-0 = <&usart1_pins_a>; |
| 125 | pinctrl-names = "default"; |
| 126 | status = "okay"; |
| 127 | }; |