Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SMP initialisation and IPI support |
| 3 | * Based on arch/arm/kernel/smp.c |
| 4 | * |
| 5 | * Copyright (C) 2012 ARM Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 20 | #include <linux/acpi.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 21 | #include <linux/delay.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/spinlock.h> |
| 24 | #include <linux/sched.h> |
| 25 | #include <linux/interrupt.h> |
| 26 | #include <linux/cache.h> |
| 27 | #include <linux/profile.h> |
| 28 | #include <linux/errno.h> |
| 29 | #include <linux/mm.h> |
| 30 | #include <linux/err.h> |
| 31 | #include <linux/cpu.h> |
| 32 | #include <linux/smp.h> |
| 33 | #include <linux/seq_file.h> |
| 34 | #include <linux/irq.h> |
| 35 | #include <linux/percpu.h> |
| 36 | #include <linux/clockchips.h> |
| 37 | #include <linux/completion.h> |
| 38 | #include <linux/of.h> |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 39 | #include <linux/irq_work.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 40 | |
Andre Przywara | e039ee4 | 2014-11-14 15:54:08 +0000 | [diff] [blame] | 41 | #include <asm/alternative.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 42 | #include <asm/atomic.h> |
| 43 | #include <asm/cacheflush.h> |
Mark Rutland | df85741 | 2014-07-16 16:32:44 +0100 | [diff] [blame] | 44 | #include <asm/cpu.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 45 | #include <asm/cputype.h> |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 46 | #include <asm/cpu_ops.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 47 | #include <asm/mmu_context.h> |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 48 | #include <asm/numa.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 49 | #include <asm/pgtable.h> |
| 50 | #include <asm/pgalloc.h> |
| 51 | #include <asm/processor.h> |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 52 | #include <asm/smp_plat.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 53 | #include <asm/sections.h> |
| 54 | #include <asm/tlbflush.h> |
| 55 | #include <asm/ptrace.h> |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 56 | #include <asm/virt.h> |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 57 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 58 | #define CREATE_TRACE_POINTS |
| 59 | #include <trace/events/ipi.h> |
| 60 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 61 | /* |
| 62 | * as from 2.5, kernels no longer have an init_tasks structure |
| 63 | * so we need some other way of telling a new secondary core |
| 64 | * where to place its SVC stack |
| 65 | */ |
| 66 | struct secondary_data secondary_data; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 67 | /* Number of CPUs which aren't online, but looping in kernel text. */ |
| 68 | int cpus_stuck_in_kernel; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 69 | |
| 70 | enum ipi_msg_type { |
| 71 | IPI_RESCHEDULE, |
| 72 | IPI_CALL_FUNC, |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 73 | IPI_CPU_STOP, |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 74 | IPI_TIMER, |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 75 | IPI_IRQ_WORK, |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 76 | IPI_WAKEUP |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 77 | }; |
| 78 | |
Suzuki K Poulose | ac1ad20 | 2016-04-13 14:41:33 +0100 | [diff] [blame] | 79 | #ifdef CONFIG_ARM64_VHE |
| 80 | |
| 81 | /* Whether the boot CPU is running in HYP mode or not*/ |
| 82 | static bool boot_cpu_hyp_mode; |
| 83 | |
| 84 | static inline void save_boot_cpu_run_el(void) |
| 85 | { |
| 86 | boot_cpu_hyp_mode = is_kernel_in_hyp_mode(); |
| 87 | } |
| 88 | |
| 89 | static inline bool is_boot_cpu_in_hyp_mode(void) |
| 90 | { |
| 91 | return boot_cpu_hyp_mode; |
| 92 | } |
| 93 | |
| 94 | /* |
| 95 | * Verify that a secondary CPU is running the kernel at the same |
| 96 | * EL as that of the boot CPU. |
| 97 | */ |
| 98 | void verify_cpu_run_el(void) |
| 99 | { |
| 100 | bool in_el2 = is_kernel_in_hyp_mode(); |
| 101 | bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode(); |
| 102 | |
| 103 | if (in_el2 ^ boot_cpu_el2) { |
| 104 | pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n", |
| 105 | smp_processor_id(), |
| 106 | in_el2 ? 2 : 1, |
| 107 | boot_cpu_el2 ? 2 : 1); |
| 108 | cpu_panic_kernel(); |
| 109 | } |
| 110 | } |
| 111 | |
| 112 | #else |
| 113 | static inline void save_boot_cpu_run_el(void) {} |
| 114 | #endif |
| 115 | |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 116 | #ifdef CONFIG_HOTPLUG_CPU |
| 117 | static int op_cpu_kill(unsigned int cpu); |
| 118 | #else |
| 119 | static inline int op_cpu_kill(unsigned int cpu) |
| 120 | { |
| 121 | return -ENOSYS; |
| 122 | } |
| 123 | #endif |
| 124 | |
| 125 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 126 | /* |
| 127 | * Boot a secondary CPU, and assign it the specified idle task. |
| 128 | * This also gives us the initial stack to use for this CPU. |
| 129 | */ |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 130 | static int boot_secondary(unsigned int cpu, struct task_struct *idle) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 131 | { |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 132 | if (cpu_ops[cpu]->cpu_boot) |
| 133 | return cpu_ops[cpu]->cpu_boot(cpu); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 134 | |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 135 | return -EOPNOTSUPP; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | static DECLARE_COMPLETION(cpu_running); |
| 139 | |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 140 | int __cpu_up(unsigned int cpu, struct task_struct *idle) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 141 | { |
| 142 | int ret; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 143 | long status; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 144 | |
| 145 | /* |
| 146 | * We need to tell the secondary core where to find its stack and the |
| 147 | * page tables. |
| 148 | */ |
| 149 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 150 | update_cpu_boot_status(CPU_MMU_OFF); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 151 | __flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
| 152 | |
| 153 | /* |
| 154 | * Now bring the CPU into our world. |
| 155 | */ |
| 156 | ret = boot_secondary(cpu, idle); |
| 157 | if (ret == 0) { |
| 158 | /* |
| 159 | * CPU was successfully started, wait for it to come online or |
| 160 | * time out. |
| 161 | */ |
| 162 | wait_for_completion_timeout(&cpu_running, |
| 163 | msecs_to_jiffies(1000)); |
| 164 | |
| 165 | if (!cpu_online(cpu)) { |
| 166 | pr_crit("CPU%u: failed to come online\n", cpu); |
| 167 | ret = -EIO; |
| 168 | } |
| 169 | } else { |
| 170 | pr_err("CPU%u: failed to boot: %d\n", cpu, ret); |
| 171 | } |
| 172 | |
| 173 | secondary_data.stack = NULL; |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 174 | status = READ_ONCE(secondary_data.status); |
| 175 | if (ret && status) { |
| 176 | |
| 177 | if (status == CPU_MMU_OFF) |
| 178 | status = READ_ONCE(__early_cpu_boot_status); |
| 179 | |
| 180 | switch (status) { |
| 181 | default: |
| 182 | pr_err("CPU%u: failed in unknown state : 0x%lx\n", |
| 183 | cpu, status); |
| 184 | break; |
| 185 | case CPU_KILL_ME: |
| 186 | if (!op_cpu_kill(cpu)) { |
| 187 | pr_crit("CPU%u: died during early boot\n", cpu); |
| 188 | break; |
| 189 | } |
| 190 | /* Fall through */ |
| 191 | pr_crit("CPU%u: may not have shut down cleanly\n", cpu); |
| 192 | case CPU_STUCK_IN_KERNEL: |
| 193 | pr_crit("CPU%u: is stuck in kernel\n", cpu); |
| 194 | cpus_stuck_in_kernel++; |
| 195 | break; |
| 196 | case CPU_PANIC_KERNEL: |
| 197 | panic("CPU%u detected unsupported configuration\n", cpu); |
| 198 | } |
| 199 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 200 | |
| 201 | return ret; |
| 202 | } |
| 203 | |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 204 | static void smp_store_cpu_info(unsigned int cpuid) |
| 205 | { |
| 206 | store_cpu_topology(cpuid); |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 207 | numa_store_cpu_info(cpuid); |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 208 | } |
| 209 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 210 | /* |
| 211 | * This is the secondary CPU boot entry. We're using this CPUs |
| 212 | * idle thread stack, but a set of temporary page tables. |
| 213 | */ |
Paul Gortmaker | b8c6453 | 2013-06-18 10:18:31 -0400 | [diff] [blame] | 214 | asmlinkage void secondary_start_kernel(void) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 215 | { |
| 216 | struct mm_struct *mm = &init_mm; |
| 217 | unsigned int cpu = smp_processor_id(); |
| 218 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 219 | /* |
| 220 | * All kernel threads share the same mm context; grab a |
| 221 | * reference and switch to it. |
| 222 | */ |
| 223 | atomic_inc(&mm->mm_count); |
| 224 | current->active_mm = mm; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 225 | |
Will Deacon | 7158627 | 2013-11-05 18:10:47 +0000 | [diff] [blame] | 226 | set_my_cpu_offset(per_cpu_offset(smp_processor_id())); |
Will Deacon | 7158627 | 2013-11-05 18:10:47 +0000 | [diff] [blame] | 227 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 228 | /* |
| 229 | * TTBR0 is only used for the identity mapping at this stage. Make it |
| 230 | * point to zero page to avoid speculatively fetching new entries. |
| 231 | */ |
Mark Rutland | 9e8e865 | 2016-01-25 11:44:58 +0000 | [diff] [blame] | 232 | cpu_uninstall_idmap(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 233 | |
| 234 | preempt_disable(); |
| 235 | trace_hardirqs_off(); |
| 236 | |
Suzuki K. Poulose | dbb4e15 | 2015-10-19 14:24:50 +0100 | [diff] [blame] | 237 | /* |
| 238 | * If the system has established the capabilities, make sure |
| 239 | * this CPU ticks all of those. If it doesn't, the CPU will |
| 240 | * fail to come online. |
| 241 | */ |
| 242 | verify_local_cpu_capabilities(); |
| 243 | |
Mark Rutland | 652af89 | 2013-10-24 20:30:16 +0100 | [diff] [blame] | 244 | if (cpu_ops[cpu]->cpu_postboot) |
| 245 | cpu_ops[cpu]->cpu_postboot(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 246 | |
| 247 | /* |
Mark Rutland | df85741 | 2014-07-16 16:32:44 +0100 | [diff] [blame] | 248 | * Log the CPU info before it is marked online and might get read. |
| 249 | */ |
| 250 | cpuinfo_store_cpu(); |
| 251 | |
| 252 | /* |
Marc Zyngier | 7ade67b | 2013-11-04 16:55:22 +0000 | [diff] [blame] | 253 | * Enable GIC and timers. |
| 254 | */ |
| 255 | notify_cpu_starting(cpu); |
| 256 | |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 257 | smp_store_cpu_info(cpu); |
| 258 | |
Marc Zyngier | 7ade67b | 2013-11-04 16:55:22 +0000 | [diff] [blame] | 259 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 260 | * OK, now it's safe to let the boot CPU continue. Wait for |
| 261 | * the CPU migration code to notice that the CPU is online |
| 262 | * before we continue. |
| 263 | */ |
Suzuki K. Poulose | 64f1781 | 2015-10-19 14:24:38 +0100 | [diff] [blame] | 264 | pr_info("CPU%u: Booted secondary processor [%08x]\n", |
| 265 | cpu, read_cpuid_id()); |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 266 | update_cpu_boot_status(CPU_BOOT_SUCCESS); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 267 | set_cpu_online(cpu, true); |
Will Deacon | b3770b3 | 2012-11-07 17:00:05 +0000 | [diff] [blame] | 268 | complete(&cpu_running); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 269 | |
Catalin Marinas | 53ae3ac | 2013-07-19 15:08:15 +0100 | [diff] [blame] | 270 | local_irq_enable(); |
Catalin Marinas | b3bf6aa | 2013-11-21 14:46:17 +0000 | [diff] [blame] | 271 | local_async_enable(); |
Catalin Marinas | 53ae3ac | 2013-07-19 15:08:15 +0100 | [diff] [blame] | 272 | |
| 273 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 274 | * OK, it's off to the idle thread for us |
| 275 | */ |
Thomas Gleixner | fc6d73d | 2016-02-26 18:43:40 +0000 | [diff] [blame] | 276 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 277 | } |
| 278 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 279 | #ifdef CONFIG_HOTPLUG_CPU |
| 280 | static int op_cpu_disable(unsigned int cpu) |
| 281 | { |
| 282 | /* |
| 283 | * If we don't have a cpu_die method, abort before we reach the point |
| 284 | * of no return. CPU0 may not have an cpu_ops, so test for it. |
| 285 | */ |
| 286 | if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die) |
| 287 | return -EOPNOTSUPP; |
| 288 | |
| 289 | /* |
| 290 | * We may need to abort a hot unplug for some other mechanism-specific |
| 291 | * reason. |
| 292 | */ |
| 293 | if (cpu_ops[cpu]->cpu_disable) |
| 294 | return cpu_ops[cpu]->cpu_disable(cpu); |
| 295 | |
| 296 | return 0; |
| 297 | } |
| 298 | |
| 299 | /* |
| 300 | * __cpu_disable runs on the processor to be shutdown. |
| 301 | */ |
| 302 | int __cpu_disable(void) |
| 303 | { |
| 304 | unsigned int cpu = smp_processor_id(); |
| 305 | int ret; |
| 306 | |
| 307 | ret = op_cpu_disable(cpu); |
| 308 | if (ret) |
| 309 | return ret; |
| 310 | |
| 311 | /* |
| 312 | * Take this CPU offline. Once we clear this, we can't return, |
| 313 | * and we must not schedule until we're ready to give up the cpu. |
| 314 | */ |
| 315 | set_cpu_online(cpu, false); |
| 316 | |
| 317 | /* |
| 318 | * OK - migrate IRQs away from this CPU |
| 319 | */ |
Yang Yingliang | 217d453 | 2015-09-24 17:32:14 +0800 | [diff] [blame] | 320 | irq_migrate_all_off_this_cpu(); |
| 321 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 322 | return 0; |
| 323 | } |
| 324 | |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 325 | static int op_cpu_kill(unsigned int cpu) |
| 326 | { |
| 327 | /* |
| 328 | * If we have no means of synchronising with the dying CPU, then assume |
| 329 | * that it is really dead. We can only wait for an arbitrary length of |
| 330 | * time and hope that it's dead, so let's skip the wait and just hope. |
| 331 | */ |
| 332 | if (!cpu_ops[cpu]->cpu_kill) |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 333 | return 0; |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 334 | |
| 335 | return cpu_ops[cpu]->cpu_kill(cpu); |
| 336 | } |
| 337 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 338 | /* |
| 339 | * called on the thread which is asking for a CPU to be shutdown - |
| 340 | * waits until shutdown has completed, or it is timed out. |
| 341 | */ |
| 342 | void __cpu_die(unsigned int cpu) |
| 343 | { |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 344 | int err; |
| 345 | |
Paul E. McKenney | 0598127 | 2015-05-12 14:50:05 -0700 | [diff] [blame] | 346 | if (!cpu_wait_death(cpu, 5)) { |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 347 | pr_crit("CPU%u: cpu didn't die\n", cpu); |
| 348 | return; |
| 349 | } |
| 350 | pr_notice("CPU%u: shutdown\n", cpu); |
Ashwin Chaugule | c814ca0 | 2014-05-07 10:18:36 -0400 | [diff] [blame] | 351 | |
| 352 | /* |
| 353 | * Now that the dying CPU is beyond the point of no return w.r.t. |
| 354 | * in-kernel synchronisation, try to get the firwmare to help us to |
| 355 | * verify that it has really left the kernel before we consider |
| 356 | * clobbering anything it might still be using. |
| 357 | */ |
Mark Rutland | 6b99c68c | 2015-04-20 17:55:30 +0100 | [diff] [blame] | 358 | err = op_cpu_kill(cpu); |
| 359 | if (err) |
| 360 | pr_warn("CPU%d may not have shut down cleanly: %d\n", |
| 361 | cpu, err); |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 362 | } |
| 363 | |
| 364 | /* |
| 365 | * Called from the idle thread for the CPU which has been shutdown. |
| 366 | * |
| 367 | * Note that we disable IRQs here, but do not re-enable them |
| 368 | * before returning to the caller. This is also the behaviour |
| 369 | * of the other hotplug-cpu capable cores, so presumably coming |
| 370 | * out of idle fixes this. |
| 371 | */ |
| 372 | void cpu_die(void) |
| 373 | { |
| 374 | unsigned int cpu = smp_processor_id(); |
| 375 | |
| 376 | idle_task_exit(); |
| 377 | |
| 378 | local_irq_disable(); |
| 379 | |
| 380 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ |
Paul E. McKenney | 0598127 | 2015-05-12 14:50:05 -0700 | [diff] [blame] | 381 | (void)cpu_report_death(); |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 382 | |
| 383 | /* |
| 384 | * Actually shutdown the CPU. This must never fail. The specific hotplug |
| 385 | * mechanism must perform all required cache maintenance to ensure that |
| 386 | * no dirty lines are lost in the process of shutting down the CPU. |
| 387 | */ |
| 388 | cpu_ops[cpu]->cpu_die(cpu); |
| 389 | |
| 390 | BUG(); |
| 391 | } |
| 392 | #endif |
| 393 | |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 394 | /* |
| 395 | * Kill the calling secondary CPU, early in bringup before it is turned |
| 396 | * online. |
| 397 | */ |
| 398 | void cpu_die_early(void) |
| 399 | { |
| 400 | int cpu = smp_processor_id(); |
| 401 | |
| 402 | pr_crit("CPU%d: will not boot\n", cpu); |
| 403 | |
| 404 | /* Mark this CPU absent */ |
| 405 | set_cpu_present(cpu, 0); |
| 406 | |
| 407 | #ifdef CONFIG_HOTPLUG_CPU |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 408 | update_cpu_boot_status(CPU_KILL_ME); |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 409 | /* Check if we can park ourselves */ |
| 410 | if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die) |
| 411 | cpu_ops[cpu]->cpu_die(cpu); |
| 412 | #endif |
Suzuki K Poulose | bb90527 | 2016-02-23 10:31:42 +0000 | [diff] [blame] | 413 | update_cpu_boot_status(CPU_STUCK_IN_KERNEL); |
Suzuki K Poulose | fce6361 | 2016-02-23 10:31:41 +0000 | [diff] [blame] | 414 | |
| 415 | cpu_park_loop(); |
| 416 | } |
| 417 | |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 418 | static void __init hyp_mode_check(void) |
| 419 | { |
| 420 | if (is_hyp_mode_available()) |
| 421 | pr_info("CPU: All CPU(s) started at EL2\n"); |
| 422 | else if (is_hyp_mode_mismatched()) |
| 423 | WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC, |
| 424 | "CPU: CPUs started in inconsistent modes"); |
| 425 | else |
| 426 | pr_info("CPU: All CPU(s) started at EL1\n"); |
| 427 | } |
| 428 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 429 | void __init smp_cpus_done(unsigned int max_cpus) |
| 430 | { |
Will Deacon | 326b16d | 2013-08-30 18:06:48 +0100 | [diff] [blame] | 431 | pr_info("SMP: Total of %d processors activated.\n", num_online_cpus()); |
Suzuki K. Poulose | 3a75578 | 2015-10-19 14:24:39 +0100 | [diff] [blame] | 432 | setup_cpu_features(); |
Jonas Rabenstein | 377bcff | 2015-07-29 12:07:57 +0100 | [diff] [blame] | 433 | hyp_mode_check(); |
| 434 | apply_alternatives_all(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 435 | } |
| 436 | |
| 437 | void __init smp_prepare_boot_cpu(void) |
| 438 | { |
Suzuki K Poulose | 9113c2a | 2016-07-21 11:12:55 +0100 | [diff] [blame] | 439 | set_my_cpu_offset(per_cpu_offset(smp_processor_id())); |
Suzuki K. Poulose | 4b998ff | 2015-10-19 14:24:40 +0100 | [diff] [blame] | 440 | cpuinfo_store_boot_cpu(); |
Suzuki K Poulose | ac1ad20 | 2016-04-13 14:41:33 +0100 | [diff] [blame] | 441 | save_boot_cpu_run_el(); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 442 | } |
| 443 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 444 | static u64 __init of_get_cpu_mpidr(struct device_node *dn) |
| 445 | { |
| 446 | const __be32 *cell; |
| 447 | u64 hwid; |
| 448 | |
| 449 | /* |
| 450 | * A cpu node with missing "reg" property is |
| 451 | * considered invalid to build a cpu_logical_map |
| 452 | * entry. |
| 453 | */ |
| 454 | cell = of_get_property(dn, "reg", NULL); |
| 455 | if (!cell) { |
| 456 | pr_err("%s: missing reg property\n", dn->full_name); |
| 457 | return INVALID_HWID; |
| 458 | } |
| 459 | |
| 460 | hwid = of_read_number(cell, of_n_addr_cells(dn)); |
| 461 | /* |
| 462 | * Non affinity bits must be set to 0 in the DT |
| 463 | */ |
| 464 | if (hwid & ~MPIDR_HWID_BITMASK) { |
| 465 | pr_err("%s: invalid reg property\n", dn->full_name); |
| 466 | return INVALID_HWID; |
| 467 | } |
| 468 | return hwid; |
| 469 | } |
| 470 | |
| 471 | /* |
| 472 | * Duplicate MPIDRs are a recipe for disaster. Scan all initialized |
| 473 | * entries and check for duplicates. If any is found just ignore the |
| 474 | * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid |
| 475 | * matching valid MPIDR values. |
| 476 | */ |
| 477 | static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid) |
| 478 | { |
| 479 | unsigned int i; |
| 480 | |
| 481 | for (i = 1; (i < cpu) && (i < NR_CPUS); i++) |
| 482 | if (cpu_logical_map(i) == hwid) |
| 483 | return true; |
| 484 | return false; |
| 485 | } |
| 486 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 487 | /* |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 488 | * Initialize cpu operations for a logical cpu and |
| 489 | * set it in the possible mask on success |
| 490 | */ |
| 491 | static int __init smp_cpu_setup(int cpu) |
| 492 | { |
| 493 | if (cpu_read_ops(cpu)) |
| 494 | return -ENODEV; |
| 495 | |
| 496 | if (cpu_ops[cpu]->cpu_init(cpu)) |
| 497 | return -ENODEV; |
| 498 | |
| 499 | set_cpu_possible(cpu, true); |
| 500 | |
| 501 | return 0; |
| 502 | } |
| 503 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 504 | static bool bootcpu_valid __initdata; |
| 505 | static unsigned int cpu_count = 1; |
| 506 | |
| 507 | #ifdef CONFIG_ACPI |
| 508 | /* |
| 509 | * acpi_map_gic_cpu_interface - parse processor MADT entry |
| 510 | * |
| 511 | * Carry out sanity checks on MADT processor entry and initialize |
| 512 | * cpu_logical_map on success |
| 513 | */ |
| 514 | static void __init |
| 515 | acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor) |
| 516 | { |
| 517 | u64 hwid = processor->arm_mpidr; |
| 518 | |
Hanjun Guo | f905892 | 2015-07-03 15:29:06 +0800 | [diff] [blame] | 519 | if (!(processor->flags & ACPI_MADT_ENABLED)) { |
| 520 | pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 521 | return; |
| 522 | } |
| 523 | |
Hanjun Guo | f905892 | 2015-07-03 15:29:06 +0800 | [diff] [blame] | 524 | if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) { |
| 525 | pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 526 | return; |
| 527 | } |
| 528 | |
| 529 | if (is_mpidr_duplicate(cpu_count, hwid)) { |
| 530 | pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid); |
| 531 | return; |
| 532 | } |
| 533 | |
| 534 | /* Check if GICC structure of boot CPU is available in the MADT */ |
| 535 | if (cpu_logical_map(0) == hwid) { |
| 536 | if (bootcpu_valid) { |
| 537 | pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n", |
| 538 | hwid); |
| 539 | return; |
| 540 | } |
| 541 | bootcpu_valid = true; |
| 542 | return; |
| 543 | } |
| 544 | |
| 545 | if (cpu_count >= NR_CPUS) |
| 546 | return; |
| 547 | |
| 548 | /* map the logical cpu id to cpu MPIDR */ |
| 549 | cpu_logical_map(cpu_count) = hwid; |
| 550 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 551 | /* |
| 552 | * Set-up the ACPI parking protocol cpu entries |
| 553 | * while initializing the cpu_logical_map to |
| 554 | * avoid parsing MADT entries multiple times for |
| 555 | * nothing (ie a valid cpu_logical_map entry should |
| 556 | * contain a valid parking protocol data set to |
| 557 | * initialize the cpu if the parking protocol is |
| 558 | * the only available enable method). |
| 559 | */ |
| 560 | acpi_set_mailbox_entry(cpu_count, processor); |
| 561 | |
Hanjun Guo | d8b47fc | 2016-05-24 15:35:44 -0700 | [diff] [blame] | 562 | early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid)); |
| 563 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 564 | cpu_count++; |
| 565 | } |
| 566 | |
| 567 | static int __init |
| 568 | acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header, |
| 569 | const unsigned long end) |
| 570 | { |
| 571 | struct acpi_madt_generic_interrupt *processor; |
| 572 | |
| 573 | processor = (struct acpi_madt_generic_interrupt *)header; |
Al Stone | 99e3e3a | 2015-07-06 17:16:48 -0600 | [diff] [blame] | 574 | if (BAD_MADT_GICC_ENTRY(processor, end)) |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 575 | return -EINVAL; |
| 576 | |
| 577 | acpi_table_print_madt_entry(header); |
| 578 | |
| 579 | acpi_map_gic_cpu_interface(processor); |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | #else |
| 584 | #define acpi_table_parse_madt(...) do { } while (0) |
| 585 | #endif |
| 586 | |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 587 | /* |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 588 | * Enumerate the possible CPU set from the device tree and build the |
| 589 | * cpu logical map array containing MPIDR values related to logical |
| 590 | * cpus. Assumes that cpu_logical_map(0) has already been initialized. |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 591 | */ |
Jisheng Zhang | 29b8302 | 2015-11-12 20:04:42 +0800 | [diff] [blame] | 592 | static void __init of_parse_and_init_cpus(void) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 593 | { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 594 | struct device_node *dn = NULL; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 595 | |
| 596 | while ((dn = of_find_node_by_type(dn, "cpu"))) { |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 597 | u64 hwid = of_get_cpu_mpidr(dn); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 598 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 599 | if (hwid == INVALID_HWID) |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 600 | goto next; |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 601 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 602 | if (is_mpidr_duplicate(cpu_count, hwid)) { |
| 603 | pr_err("%s: duplicate cpu reg properties in the DT\n", |
| 604 | dn->full_name); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 605 | goto next; |
| 606 | } |
| 607 | |
| 608 | /* |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 609 | * The numbering scheme requires that the boot CPU |
| 610 | * must be assigned logical id 0. Record it so that |
| 611 | * the logical map built from DT is validated and can |
| 612 | * be used. |
| 613 | */ |
| 614 | if (hwid == cpu_logical_map(0)) { |
| 615 | if (bootcpu_valid) { |
| 616 | pr_err("%s: duplicate boot cpu reg property in DT\n", |
| 617 | dn->full_name); |
| 618 | goto next; |
| 619 | } |
| 620 | |
| 621 | bootcpu_valid = true; |
| 622 | |
| 623 | /* |
| 624 | * cpu_logical_map has already been |
| 625 | * initialized and the boot cpu doesn't need |
| 626 | * the enable-method so continue without |
| 627 | * incrementing cpu. |
| 628 | */ |
| 629 | continue; |
| 630 | } |
| 631 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 632 | if (cpu_count >= NR_CPUS) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 633 | goto next; |
| 634 | |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 635 | pr_debug("cpu logical map 0x%llx\n", hwid); |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 636 | cpu_logical_map(cpu_count) = hwid; |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 637 | |
| 638 | early_map_cpu_to_node(cpu_count, of_node_to_nid(dn)); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 639 | next: |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 640 | cpu_count++; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 641 | } |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 642 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 643 | |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 644 | /* |
| 645 | * Enumerate the possible CPU set from the device tree or ACPI and build the |
| 646 | * cpu logical map array containing MPIDR values related to logical |
| 647 | * cpus. Assumes that cpu_logical_map(0) has already been initialized. |
| 648 | */ |
| 649 | void __init smp_init_cpus(void) |
| 650 | { |
| 651 | int i; |
| 652 | |
| 653 | if (acpi_disabled) |
| 654 | of_parse_and_init_cpus(); |
| 655 | else |
| 656 | /* |
| 657 | * do a walk of MADT to determine how many CPUs |
| 658 | * we have including disabled CPUs, and get information |
| 659 | * we need for SMP init |
| 660 | */ |
| 661 | acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, |
| 662 | acpi_parse_gic_cpu_interface, 0); |
| 663 | |
Kefeng Wang | 50ee91b | 2016-08-09 10:30:49 +0800 | [diff] [blame] | 664 | if (cpu_count > nr_cpu_ids) |
| 665 | pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n", |
| 666 | cpu_count, nr_cpu_ids); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 667 | |
| 668 | if (!bootcpu_valid) { |
Lorenzo Pieralisi | 0f07833 | 2015-05-13 14:12:47 +0100 | [diff] [blame] | 669 | pr_err("missing boot CPU MPIDR, not enabling secondaries\n"); |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 670 | return; |
| 671 | } |
| 672 | |
| 673 | /* |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 674 | * We need to set the cpu_logical_map entries before enabling |
| 675 | * the cpus so that cpu processor description entries (DT cpu nodes |
| 676 | * and ACPI MADT entries) can be retrieved by matching the cpu hwid |
| 677 | * with entries in cpu_logical_map while initializing the cpus. |
| 678 | * If the cpu set-up fails, invalidate the cpu_logical_map entry. |
Javi Merino | 4c7aa00 | 2012-08-29 09:47:19 +0100 | [diff] [blame] | 679 | */ |
Kefeng Wang | 50ee91b | 2016-08-09 10:30:49 +0800 | [diff] [blame] | 680 | for (i = 1; i < nr_cpu_ids; i++) { |
Lorenzo Pieralisi | 819a882 | 2015-05-13 14:12:46 +0100 | [diff] [blame] | 681 | if (cpu_logical_map(i) != INVALID_HWID) { |
| 682 | if (smp_cpu_setup(i)) |
| 683 | cpu_logical_map(i) = INVALID_HWID; |
| 684 | } |
| 685 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 686 | } |
| 687 | |
| 688 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 689 | { |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 690 | int err; |
Suzuki K Poulose | 44dbcc9 | 2016-04-22 12:25:35 +0100 | [diff] [blame] | 691 | unsigned int cpu; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 692 | |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 693 | init_cpu_topology(); |
| 694 | |
| 695 | smp_store_cpu_info(smp_processor_id()); |
| 696 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 697 | /* |
Suzuki K Poulose | e75118a | 2016-07-21 11:15:27 +0100 | [diff] [blame] | 698 | * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set |
| 699 | * secondary CPUs present. |
| 700 | */ |
| 701 | if (max_cpus == 0) |
| 702 | return; |
| 703 | |
| 704 | /* |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 705 | * Initialise the present map (which describes the set of CPUs |
| 706 | * actually populated at the present time) and release the |
| 707 | * secondaries from the bootloader. |
| 708 | */ |
| 709 | for_each_possible_cpu(cpu) { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 710 | |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 711 | if (cpu == smp_processor_id()) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 712 | continue; |
| 713 | |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 714 | if (!cpu_ops[cpu]) |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 715 | continue; |
| 716 | |
Mark Rutland | cd1aebf | 2013-10-24 20:30:15 +0100 | [diff] [blame] | 717 | err = cpu_ops[cpu]->cpu_prepare(cpu); |
Marc Zyngier | d329de3 | 2013-01-02 15:24:22 +0000 | [diff] [blame] | 718 | if (err) |
| 719 | continue; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 720 | |
| 721 | set_cpu_present(cpu, true); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 722 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 723 | } |
| 724 | |
Frederic Weisbecker | 3631073 | 2014-08-16 18:48:05 +0200 | [diff] [blame] | 725 | void (*__smp_cross_call)(const struct cpumask *, unsigned int); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 726 | |
| 727 | void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) |
| 728 | { |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 729 | __smp_cross_call = fn; |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 730 | } |
| 731 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 732 | static const char *ipi_types[NR_IPI] __tracepoint_string = { |
| 733 | #define S(x,s) [x] = s |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 734 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), |
| 735 | S(IPI_CALL_FUNC, "Function call interrupts"), |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 736 | S(IPI_CPU_STOP, "CPU stop interrupts"), |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 737 | S(IPI_TIMER, "Timer broadcast interrupts"), |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 738 | S(IPI_IRQ_WORK, "IRQ work interrupts"), |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 739 | S(IPI_WAKEUP, "CPU wake-up interrupts"), |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 740 | }; |
| 741 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 742 | static void smp_cross_call(const struct cpumask *target, unsigned int ipinr) |
| 743 | { |
| 744 | trace_ipi_raise(target, ipi_types[ipinr]); |
| 745 | __smp_cross_call(target, ipinr); |
| 746 | } |
| 747 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 748 | void show_ipi_list(struct seq_file *p, int prec) |
| 749 | { |
| 750 | unsigned int cpu, i; |
| 751 | |
| 752 | for (i = 0; i < NR_IPI; i++) { |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 753 | seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 754 | prec >= 4 ? " " : ""); |
Sudeep KarkadaNagesha | 67317c2 | 2013-11-07 15:25:44 +0000 | [diff] [blame] | 755 | for_each_online_cpu(cpu) |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 756 | seq_printf(p, "%10u ", |
| 757 | __get_irq_stat(cpu, ipi_irqs[i])); |
| 758 | seq_printf(p, " %s\n", ipi_types[i]); |
| 759 | } |
| 760 | } |
| 761 | |
| 762 | u64 smp_irq_stat_cpu(unsigned int cpu) |
| 763 | { |
| 764 | u64 sum = 0; |
| 765 | int i; |
| 766 | |
| 767 | for (i = 0; i < NR_IPI; i++) |
| 768 | sum += __get_irq_stat(cpu, ipi_irqs[i]); |
| 769 | |
| 770 | return sum; |
| 771 | } |
| 772 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 773 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
| 774 | { |
| 775 | smp_cross_call(mask, IPI_CALL_FUNC); |
| 776 | } |
| 777 | |
| 778 | void arch_send_call_function_single_ipi(int cpu) |
| 779 | { |
Jiang Liu | 0aaf0da | 2015-01-23 05:36:42 +0000 | [diff] [blame] | 780 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC); |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 781 | } |
| 782 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 783 | #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL |
| 784 | void arch_send_wakeup_ipi_mask(const struct cpumask *mask) |
| 785 | { |
| 786 | smp_cross_call(mask, IPI_WAKEUP); |
| 787 | } |
| 788 | #endif |
| 789 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 790 | #ifdef CONFIG_IRQ_WORK |
| 791 | void arch_irq_work_raise(void) |
| 792 | { |
| 793 | if (__smp_cross_call) |
| 794 | smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK); |
| 795 | } |
| 796 | #endif |
| 797 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 798 | /* |
| 799 | * ipi_cpu_stop - handle IPI from smp_send_stop() |
| 800 | */ |
| 801 | static void ipi_cpu_stop(unsigned int cpu) |
| 802 | { |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 803 | set_cpu_online(cpu, false); |
| 804 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 805 | local_irq_disable(); |
| 806 | |
| 807 | while (1) |
| 808 | cpu_relax(); |
| 809 | } |
| 810 | |
| 811 | /* |
| 812 | * Main handler for inter-processor interrupts |
| 813 | */ |
| 814 | void handle_IPI(int ipinr, struct pt_regs *regs) |
| 815 | { |
| 816 | unsigned int cpu = smp_processor_id(); |
| 817 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 818 | |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 819 | if ((unsigned)ipinr < NR_IPI) { |
Stephen Boyd | be081d9 | 2015-06-24 13:14:18 -0700 | [diff] [blame] | 820 | trace_ipi_entry_rcuidle(ipi_types[ipinr]); |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 821 | __inc_irq_stat(cpu, ipi_irqs[ipinr]); |
| 822 | } |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 823 | |
| 824 | switch (ipinr) { |
| 825 | case IPI_RESCHEDULE: |
| 826 | scheduler_ipi(); |
| 827 | break; |
| 828 | |
| 829 | case IPI_CALL_FUNC: |
| 830 | irq_enter(); |
| 831 | generic_smp_call_function_interrupt(); |
| 832 | irq_exit(); |
| 833 | break; |
| 834 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 835 | case IPI_CPU_STOP: |
| 836 | irq_enter(); |
| 837 | ipi_cpu_stop(cpu); |
| 838 | irq_exit(); |
| 839 | break; |
| 840 | |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 841 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
| 842 | case IPI_TIMER: |
| 843 | irq_enter(); |
| 844 | tick_receive_broadcast(); |
| 845 | irq_exit(); |
| 846 | break; |
| 847 | #endif |
| 848 | |
Larry Bassel | eb631bb | 2014-05-12 16:48:51 +0100 | [diff] [blame] | 849 | #ifdef CONFIG_IRQ_WORK |
| 850 | case IPI_IRQ_WORK: |
| 851 | irq_enter(); |
| 852 | irq_work_run(); |
| 853 | irq_exit(); |
| 854 | break; |
| 855 | #endif |
| 856 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 857 | #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL |
| 858 | case IPI_WAKEUP: |
| 859 | WARN_ONCE(!acpi_parking_protocol_valid(cpu), |
| 860 | "CPU%u: Wake-up IPI outside the ACPI parking protocol\n", |
| 861 | cpu); |
| 862 | break; |
| 863 | #endif |
| 864 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 865 | default: |
| 866 | pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); |
| 867 | break; |
| 868 | } |
Nicolas Pitre | 45ed695 | 2014-07-25 16:05:32 -0400 | [diff] [blame] | 869 | |
| 870 | if ((unsigned)ipinr < NR_IPI) |
Stephen Boyd | be081d9 | 2015-06-24 13:14:18 -0700 | [diff] [blame] | 871 | trace_ipi_exit_rcuidle(ipi_types[ipinr]); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 872 | set_irq_regs(old_regs); |
| 873 | } |
| 874 | |
| 875 | void smp_send_reschedule(int cpu) |
| 876 | { |
| 877 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
| 878 | } |
| 879 | |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 880 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
| 881 | void tick_broadcast(const struct cpumask *mask) |
| 882 | { |
| 883 | smp_cross_call(mask, IPI_TIMER); |
| 884 | } |
| 885 | #endif |
| 886 | |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 887 | void smp_send_stop(void) |
| 888 | { |
| 889 | unsigned long timeout; |
| 890 | |
| 891 | if (num_online_cpus() > 1) { |
| 892 | cpumask_t mask; |
| 893 | |
| 894 | cpumask_copy(&mask, cpu_online_mask); |
Rusty Russell | 434ed7f | 2015-03-05 10:49:18 +1030 | [diff] [blame] | 895 | cpumask_clear_cpu(smp_processor_id(), &mask); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 896 | |
Jan Glauber | 82611c1 | 2016-04-18 09:43:33 +0200 | [diff] [blame] | 897 | if (system_state == SYSTEM_BOOTING || |
| 898 | system_state == SYSTEM_RUNNING) |
| 899 | pr_crit("SMP: stopping secondary CPUs\n"); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 900 | smp_cross_call(&mask, IPI_CPU_STOP); |
| 901 | } |
| 902 | |
| 903 | /* Wait up to one second for other CPUs to stop */ |
| 904 | timeout = USEC_PER_SEC; |
| 905 | while (num_online_cpus() > 1 && timeout--) |
| 906 | udelay(1); |
| 907 | |
| 908 | if (num_online_cpus() > 1) |
Jan Glauber | 82611c1 | 2016-04-18 09:43:33 +0200 | [diff] [blame] | 909 | pr_warning("SMP: failed to stop secondary CPUs %*pbl\n", |
| 910 | cpumask_pr_args(cpu_online_mask)); |
Catalin Marinas | 08e875c | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 911 | } |
| 912 | |
| 913 | /* |
| 914 | * not supported here |
| 915 | */ |
| 916 | int setup_profiling_timer(unsigned int multiplier) |
| 917 | { |
| 918 | return -EINVAL; |
| 919 | } |
James Morse | 5c492c3 | 2016-06-22 10:06:12 +0100 | [diff] [blame] | 920 | |
| 921 | static bool have_cpu_die(void) |
| 922 | { |
| 923 | #ifdef CONFIG_HOTPLUG_CPU |
| 924 | int any_cpu = raw_smp_processor_id(); |
| 925 | |
| 926 | if (cpu_ops[any_cpu]->cpu_die) |
| 927 | return true; |
| 928 | #endif |
| 929 | return false; |
| 930 | } |
| 931 | |
| 932 | bool cpus_are_stuck_in_kernel(void) |
| 933 | { |
| 934 | bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die()); |
| 935 | |
| 936 | return !!cpus_stuck_in_kernel || smp_spin_tables; |
| 937 | } |