Yinghai Lu | f0fc4af | 2008-09-04 20:09:00 -0700 | [diff] [blame] | 1 | #include <linux/bootmem.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 2 | #include <linux/linkage.h> |
Yinghai Lu | f0fc4af | 2008-09-04 20:09:00 -0700 | [diff] [blame] | 3 | #include <linux/bitops.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 4 | #include <linux/kernel.h> |
Paul Gortmaker | 186f436 | 2016-07-13 20:18:56 -0400 | [diff] [blame] | 5 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <linux/percpu.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 7 | #include <linux/string.h> |
Borislav Petkov | ee098e1 | 2015-06-01 12:06:57 +0200 | [diff] [blame] | 8 | #include <linux/ctype.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 9 | #include <linux/delay.h> |
| 10 | #include <linux/sched.h> |
| 11 | #include <linux/init.h> |
Masami Hiramatsu | 0f46efeb | 2014-04-17 17:17:12 +0900 | [diff] [blame] | 12 | #include <linux/kprobes.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 13 | #include <linux/kgdb.h> |
| 14 | #include <linux/smp.h> |
| 15 | #include <linux/io.h> |
Laura Abbott | b51ef52 | 2015-07-20 14:47:58 -0700 | [diff] [blame] | 16 | #include <linux/syscore_ops.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 17 | |
| 18 | #include <asm/stackprotector.h> |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 19 | #include <asm/perf_event.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <asm/mmu_context.h> |
H. Peter Anvin | 49d859d | 2011-07-31 14:02:19 -0700 | [diff] [blame] | 21 | #include <asm/archrandom.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 22 | #include <asm/hypervisor.h> |
| 23 | #include <asm/processor.h> |
Andy Lutomirski | 1e02ce4 | 2014-10-24 15:58:08 -0700 | [diff] [blame] | 24 | #include <asm/tlbflush.h> |
Paul Gortmaker | f649e93 | 2012-01-20 16:24:09 -0500 | [diff] [blame] | 25 | #include <asm/debugreg.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 26 | #include <asm/sections.h> |
Andy Lutomirski | f40c330 | 2014-05-05 12:19:36 -0700 | [diff] [blame] | 27 | #include <asm/vsyscall.h> |
Alan Cox | 8bdbd96 | 2009-07-04 00:35:45 +0100 | [diff] [blame] | 28 | #include <linux/topology.h> |
| 29 | #include <linux/cpumask.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 30 | #include <asm/pgtable.h> |
Arun Sharma | 60063497 | 2011-07-26 16:09:06 -0700 | [diff] [blame] | 31 | #include <linux/atomic.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 32 | #include <asm/proto.h> |
| 33 | #include <asm/setup.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/apic.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 35 | #include <asm/desc.h> |
Ingo Molnar | 78f7f1e | 2015-04-24 02:54:44 +0200 | [diff] [blame] | 36 | #include <asm/fpu/internal.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 37 | #include <asm/mtrr.h> |
Alan Cox | 8bdbd96 | 2009-07-04 00:35:45 +0100 | [diff] [blame] | 38 | #include <linux/numa.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 39 | #include <asm/asm.h> |
Dave Hansen | 0f6ff2b | 2016-05-12 15:04:00 -0700 | [diff] [blame] | 40 | #include <asm/bugs.h> |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 41 | #include <asm/cpu.h> |
| 42 | #include <asm/mce.h> |
| 43 | #include <asm/msr.h> |
| 44 | #include <asm/pat.h> |
Fenghua Yu | d288e1c | 2012-12-20 23:44:23 -0800 | [diff] [blame] | 45 | #include <asm/microcode.h> |
| 46 | #include <asm/microcode_intel.h> |
Ingo Molnar | e641f5f | 2009-02-17 14:02:01 +0100 | [diff] [blame] | 47 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #ifdef CONFIG_X86_LOCAL_APIC |
Tejun Heo | bdbcdd4 | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 49 | #include <asm/uv/uv.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | #endif |
| 51 | |
| 52 | #include "cpu.h" |
| 53 | |
Mike Travis | c2d1cec | 2009-01-04 05:18:03 -0800 | [diff] [blame] | 54 | /* all of these masks are initialized in setup_cpu_local_masks() */ |
Mike Travis | c2d1cec | 2009-01-04 05:18:03 -0800 | [diff] [blame] | 55 | cpumask_var_t cpu_initialized_mask; |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 56 | cpumask_var_t cpu_callout_mask; |
| 57 | cpumask_var_t cpu_callin_mask; |
Mike Travis | c2d1cec | 2009-01-04 05:18:03 -0800 | [diff] [blame] | 58 | |
| 59 | /* representing cpus for which sibling maps can be computed */ |
| 60 | cpumask_var_t cpu_sibling_setup_mask; |
| 61 | |
Brian Gerst | 2f2f52b | 2009-01-27 12:56:47 +0900 | [diff] [blame] | 62 | /* correctly size the local cpu masks */ |
Ingo Molnar | 4369f1f | 2009-01-27 12:03:24 +0100 | [diff] [blame] | 63 | void __init setup_cpu_local_masks(void) |
Brian Gerst | 2f2f52b | 2009-01-27 12:56:47 +0900 | [diff] [blame] | 64 | { |
| 65 | alloc_bootmem_cpumask_var(&cpu_initialized_mask); |
| 66 | alloc_bootmem_cpumask_var(&cpu_callin_mask); |
| 67 | alloc_bootmem_cpumask_var(&cpu_callout_mask); |
| 68 | alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask); |
| 69 | } |
| 70 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 71 | static void default_init(struct cpuinfo_x86 *c) |
Ondrej Zary | e805513 | 2009-08-11 20:00:11 +0200 | [diff] [blame] | 72 | { |
| 73 | #ifdef CONFIG_X86_64 |
Borislav Petkov | 27c13ec | 2009-11-21 14:01:45 +0100 | [diff] [blame] | 74 | cpu_detect_cache_sizes(c); |
Ondrej Zary | e805513 | 2009-08-11 20:00:11 +0200 | [diff] [blame] | 75 | #else |
| 76 | /* Not much we can do here... */ |
| 77 | /* Check if at least it has cpuid */ |
| 78 | if (c->cpuid_level == -1) { |
| 79 | /* No cpuid. It must be an ancient CPU */ |
| 80 | if (c->x86 == 4) |
| 81 | strcpy(c->x86_model_id, "486"); |
| 82 | else if (c->x86 == 3) |
| 83 | strcpy(c->x86_model_id, "386"); |
| 84 | } |
| 85 | #endif |
| 86 | } |
| 87 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 88 | static const struct cpu_dev default_cpu = { |
Ondrej Zary | e805513 | 2009-08-11 20:00:11 +0200 | [diff] [blame] | 89 | .c_init = default_init, |
| 90 | .c_vendor = "Unknown", |
| 91 | .c_x86_vendor = X86_VENDOR_UNKNOWN, |
| 92 | }; |
| 93 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 94 | static const struct cpu_dev *this_cpu = &default_cpu; |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 95 | |
Brian Gerst | 06deef8 | 2009-01-21 17:26:05 +0900 | [diff] [blame] | 96 | DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { |
Yinghai Lu | 950ad7f | 2008-09-04 20:09:01 -0700 | [diff] [blame] | 97 | #ifdef CONFIG_X86_64 |
Brian Gerst | 06deef8 | 2009-01-21 17:26:05 +0900 | [diff] [blame] | 98 | /* |
| 99 | * We need valid kernel segments for data and code in long mode too |
| 100 | * IRET will check the segment types kkeil 2000/10/28 |
| 101 | * Also sysret mandates a special GDT layout |
| 102 | * |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 103 | * TLS descriptors are currently at a different place compared to i386. |
Brian Gerst | 06deef8 | 2009-01-21 17:26:05 +0900 | [diff] [blame] | 104 | * Hopefully nobody expects them at a fixed place (Wine?) |
| 105 | */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 106 | [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff), |
| 107 | [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff), |
| 108 | [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff), |
| 109 | [GDT_ENTRY_DEFAULT_USER32_CS] = GDT_ENTRY_INIT(0xc0fb, 0, 0xfffff), |
| 110 | [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f3, 0, 0xfffff), |
| 111 | [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xa0fb, 0, 0xfffff), |
Yinghai Lu | 950ad7f | 2008-09-04 20:09:01 -0700 | [diff] [blame] | 112 | #else |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 113 | [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xc09a, 0, 0xfffff), |
| 114 | [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff), |
| 115 | [GDT_ENTRY_DEFAULT_USER_CS] = GDT_ENTRY_INIT(0xc0fa, 0, 0xfffff), |
| 116 | [GDT_ENTRY_DEFAULT_USER_DS] = GDT_ENTRY_INIT(0xc0f2, 0, 0xfffff), |
Rusty Russell | bf504672 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 117 | /* |
| 118 | * Segments used for calling PnP BIOS have byte granularity. |
| 119 | * They code segments and data segments have fixed 64k limits, |
| 120 | * the transfer segment sizes are set at run time. |
| 121 | */ |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 122 | /* 32-bit code */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 123 | [GDT_ENTRY_PNPBIOS_CS32] = GDT_ENTRY_INIT(0x409a, 0, 0xffff), |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 124 | /* 16-bit code */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 125 | [GDT_ENTRY_PNPBIOS_CS16] = GDT_ENTRY_INIT(0x009a, 0, 0xffff), |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 126 | /* 16-bit data */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 127 | [GDT_ENTRY_PNPBIOS_DS] = GDT_ENTRY_INIT(0x0092, 0, 0xffff), |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 128 | /* 16-bit data */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 129 | [GDT_ENTRY_PNPBIOS_TS1] = GDT_ENTRY_INIT(0x0092, 0, 0), |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 130 | /* 16-bit data */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 131 | [GDT_ENTRY_PNPBIOS_TS2] = GDT_ENTRY_INIT(0x0092, 0, 0), |
Rusty Russell | bf504672 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 132 | /* |
| 133 | * The APM segments have byte granularity and their bases |
| 134 | * are set at run time. All have 64k limits. |
| 135 | */ |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 136 | /* 32-bit code */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 137 | [GDT_ENTRY_APMBIOS_BASE] = GDT_ENTRY_INIT(0x409a, 0, 0xffff), |
Rusty Russell | bf504672 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 138 | /* 16-bit code */ |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 139 | [GDT_ENTRY_APMBIOS_BASE+1] = GDT_ENTRY_INIT(0x009a, 0, 0xffff), |
Glauber de Oliveira Costa | 6842ef0 | 2008-01-30 13:31:11 +0100 | [diff] [blame] | 140 | /* data */ |
Ingo Molnar | 72c4d85 | 2009-08-03 08:47:07 +0200 | [diff] [blame] | 141 | [GDT_ENTRY_APMBIOS_BASE+2] = GDT_ENTRY_INIT(0x4092, 0, 0xffff), |
Rusty Russell | bf504672 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 142 | |
Akinobu Mita | 1e5de18 | 2009-07-19 00:12:20 +0900 | [diff] [blame] | 143 | [GDT_ENTRY_ESPFIX_SS] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff), |
| 144 | [GDT_ENTRY_PERCPU] = GDT_ENTRY_INIT(0xc092, 0, 0xfffff), |
Tejun Heo | 60a5317 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 145 | GDT_STACK_CANARY_INIT |
Yinghai Lu | 950ad7f | 2008-09-04 20:09:01 -0700 | [diff] [blame] | 146 | #endif |
Brian Gerst | 06deef8 | 2009-01-21 17:26:05 +0900 | [diff] [blame] | 147 | } }; |
Jeremy Fitzhardinge | 7a61d35 | 2007-05-02 19:27:15 +0200 | [diff] [blame] | 148 | EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); |
Rusty Russell | ae1ee11 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 149 | |
Dave Hansen | 8c3641e | 2015-06-07 11:37:02 -0700 | [diff] [blame] | 150 | static int __init x86_mpx_setup(char *s) |
Suresh Siddha | 0c752a9 | 2009-05-22 12:17:45 -0700 | [diff] [blame] | 151 | { |
Dave Hansen | 8c3641e | 2015-06-07 11:37:02 -0700 | [diff] [blame] | 152 | /* require an exact match without trailing characters */ |
Dave Hansen | 2cd3949 | 2014-11-11 14:01:33 -0800 | [diff] [blame] | 153 | if (strlen(s)) |
| 154 | return 0; |
Suresh Siddha | 0c752a9 | 2009-05-22 12:17:45 -0700 | [diff] [blame] | 155 | |
Dave Hansen | 8c3641e | 2015-06-07 11:37:02 -0700 | [diff] [blame] | 156 | /* do not emit a message if the feature is not present */ |
| 157 | if (!boot_cpu_has(X86_FEATURE_MPX)) |
| 158 | return 1; |
Suresh Siddha | 6bad06b | 2010-07-19 16:05:52 -0700 | [diff] [blame] | 159 | |
Dave Hansen | 8c3641e | 2015-06-07 11:37:02 -0700 | [diff] [blame] | 160 | setup_clear_cpu_cap(X86_FEATURE_MPX); |
| 161 | pr_info("nompx: Intel Memory Protection Extensions (MPX) disabled\n"); |
Fenghua Yu | b6f42a4 | 2014-05-29 11:12:31 -0700 | [diff] [blame] | 162 | return 1; |
| 163 | } |
Dave Hansen | 8c3641e | 2015-06-07 11:37:02 -0700 | [diff] [blame] | 164 | __setup("nompx", x86_mpx_setup); |
Fenghua Yu | b6f42a4 | 2014-05-29 11:12:31 -0700 | [diff] [blame] | 165 | |
Andy Lutomirski | d12a72b | 2016-01-29 11:42:58 -0800 | [diff] [blame] | 166 | static int __init x86_noinvpcid_setup(char *s) |
| 167 | { |
| 168 | /* noinvpcid doesn't accept parameters */ |
| 169 | if (s) |
| 170 | return -EINVAL; |
| 171 | |
| 172 | /* do not emit a message if the feature is not present */ |
| 173 | if (!boot_cpu_has(X86_FEATURE_INVPCID)) |
| 174 | return 0; |
| 175 | |
| 176 | setup_clear_cpu_cap(X86_FEATURE_INVPCID); |
| 177 | pr_info("noinvpcid: INVPCID feature disabled\n"); |
| 178 | return 0; |
| 179 | } |
| 180 | early_param("noinvpcid", x86_noinvpcid_setup); |
| 181 | |
Yinghai Lu | ba51dce | 2008-09-04 20:09:02 -0700 | [diff] [blame] | 182 | #ifdef CONFIG_X86_32 |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 183 | static int cachesize_override = -1; |
| 184 | static int disable_x86_serial_nr = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | static int __init cachesize_setup(char *str) |
| 187 | { |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 188 | get_option(&str, &cachesize_override); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | return 1; |
| 190 | } |
| 191 | __setup("cachesize=", cachesize_setup); |
| 192 | |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 193 | static int __init x86_sep_setup(char *s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | { |
Andi Kleen | 1353025 | 2008-01-30 13:33:20 +0100 | [diff] [blame] | 195 | setup_clear_cpu_cap(X86_FEATURE_SEP); |
Chuck Ebbert | 4f88651 | 2006-03-23 02:59:34 -0800 | [diff] [blame] | 196 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | } |
Chuck Ebbert | 4f88651 | 2006-03-23 02:59:34 -0800 | [diff] [blame] | 198 | __setup("nosep", x86_sep_setup); |
| 199 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | /* Standard macro to see if a specific flag is changeable */ |
| 201 | static inline int flag_is_changeable_p(u32 flag) |
| 202 | { |
| 203 | u32 f1, f2; |
| 204 | |
Krzysztof Helt | 94f6bac | 2008-09-30 23:17:51 +0200 | [diff] [blame] | 205 | /* |
| 206 | * Cyrix and IDT cpus allow disabling of CPUID |
| 207 | * so the code below may return different results |
| 208 | * when it is executed before and after enabling |
| 209 | * the CPUID. Add "volatile" to not allow gcc to |
| 210 | * optimize the subsequent calls to this function. |
| 211 | */ |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 212 | asm volatile ("pushfl \n\t" |
| 213 | "pushfl \n\t" |
| 214 | "popl %0 \n\t" |
| 215 | "movl %0, %1 \n\t" |
| 216 | "xorl %2, %0 \n\t" |
| 217 | "pushl %0 \n\t" |
| 218 | "popfl \n\t" |
| 219 | "pushfl \n\t" |
| 220 | "popl %0 \n\t" |
| 221 | "popfl \n\t" |
| 222 | |
Krzysztof Helt | 94f6bac | 2008-09-30 23:17:51 +0200 | [diff] [blame] | 223 | : "=&r" (f1), "=&r" (f2) |
| 224 | : "ir" (flag)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | |
| 226 | return ((f1^f2) & flag) != 0; |
| 227 | } |
| 228 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | /* Probe for the CPUID instruction */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 230 | int have_cpuid_p(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | { |
| 232 | return flag_is_changeable_p(X86_EFLAGS_ID); |
| 233 | } |
| 234 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 235 | static void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 236 | { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 237 | unsigned long lo, hi; |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 238 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 239 | if (!cpu_has(c, X86_FEATURE_PN) || !disable_x86_serial_nr) |
| 240 | return; |
| 241 | |
| 242 | /* Disable processor serial number: */ |
| 243 | |
| 244 | rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi); |
| 245 | lo |= 0x200000; |
| 246 | wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi); |
| 247 | |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 248 | pr_notice("CPU serial number disabled.\n"); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 249 | clear_cpu_cap(c, X86_FEATURE_PN); |
| 250 | |
| 251 | /* Disabling the serial number may affect the cpuid level */ |
| 252 | c->cpuid_level = cpuid_eax(0); |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 253 | } |
| 254 | |
| 255 | static int __init x86_serial_nr_setup(char *s) |
| 256 | { |
| 257 | disable_x86_serial_nr = 0; |
| 258 | return 1; |
| 259 | } |
| 260 | __setup("serialnumber", x86_serial_nr_setup); |
Yinghai Lu | ba51dce | 2008-09-04 20:09:02 -0700 | [diff] [blame] | 261 | #else |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 262 | static inline int flag_is_changeable_p(u32 flag) |
| 263 | { |
| 264 | return 1; |
| 265 | } |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 266 | static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c) |
| 267 | { |
| 268 | } |
Yinghai Lu | ba51dce | 2008-09-04 20:09:02 -0700 | [diff] [blame] | 269 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | |
Fenghua Yu | de5397a | 2011-05-11 16:51:05 -0700 | [diff] [blame] | 271 | static __init int setup_disable_smep(char *arg) |
| 272 | { |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 273 | setup_clear_cpu_cap(X86_FEATURE_SMEP); |
Dave Hansen | 0f6ff2b | 2016-05-12 15:04:00 -0700 | [diff] [blame] | 274 | /* Check for things that depend on SMEP being enabled: */ |
| 275 | check_mpx_erratum(&boot_cpu_data); |
Fenghua Yu | de5397a | 2011-05-11 16:51:05 -0700 | [diff] [blame] | 276 | return 1; |
| 277 | } |
| 278 | __setup("nosmep", setup_disable_smep); |
| 279 | |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 280 | static __always_inline void setup_smep(struct cpuinfo_x86 *c) |
Fenghua Yu | de5397a | 2011-05-11 16:51:05 -0700 | [diff] [blame] | 281 | { |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 282 | if (cpu_has(c, X86_FEATURE_SMEP)) |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 283 | cr4_set_bits(X86_CR4_SMEP); |
Fenghua Yu | de5397a | 2011-05-11 16:51:05 -0700 | [diff] [blame] | 284 | } |
| 285 | |
H. Peter Anvin | 52b6179 | 2012-09-21 12:43:13 -0700 | [diff] [blame] | 286 | static __init int setup_disable_smap(char *arg) |
| 287 | { |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 288 | setup_clear_cpu_cap(X86_FEATURE_SMAP); |
H. Peter Anvin | 52b6179 | 2012-09-21 12:43:13 -0700 | [diff] [blame] | 289 | return 1; |
| 290 | } |
| 291 | __setup("nosmap", setup_disable_smap); |
| 292 | |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 293 | static __always_inline void setup_smap(struct cpuinfo_x86 *c) |
H. Peter Anvin | 52b6179 | 2012-09-21 12:43:13 -0700 | [diff] [blame] | 294 | { |
Andrew Cooper | 581b7f15 | 2015-06-03 10:31:14 +0100 | [diff] [blame] | 295 | unsigned long eflags = native_save_fl(); |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 296 | |
| 297 | /* This should have been cleared long ago */ |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 298 | BUG_ON(eflags & X86_EFLAGS_AC); |
| 299 | |
H. Peter Anvin | 03bbd59 | 2014-02-13 07:34:30 -0800 | [diff] [blame] | 300 | if (cpu_has(c, X86_FEATURE_SMAP)) { |
| 301 | #ifdef CONFIG_X86_SMAP |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 302 | cr4_set_bits(X86_CR4_SMAP); |
H. Peter Anvin | 03bbd59 | 2014-02-13 07:34:30 -0800 | [diff] [blame] | 303 | #else |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 304 | cr4_clear_bits(X86_CR4_SMAP); |
H. Peter Anvin | 03bbd59 | 2014-02-13 07:34:30 -0800 | [diff] [blame] | 305 | #endif |
| 306 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | } |
| 308 | |
| 309 | /* |
Dave Hansen | 0697694 | 2016-02-12 13:02:29 -0800 | [diff] [blame] | 310 | * Protection Keys are not available in 32-bit mode. |
| 311 | */ |
| 312 | static bool pku_disabled; |
| 313 | |
| 314 | static __always_inline void setup_pku(struct cpuinfo_x86 *c) |
| 315 | { |
Dave Hansen | e8df1a95 | 2016-05-13 15:13:28 -0700 | [diff] [blame] | 316 | /* check the boot processor, plus compile options for PKU: */ |
| 317 | if (!cpu_feature_enabled(X86_FEATURE_PKU)) |
| 318 | return; |
| 319 | /* checks the actual processor's cpuid bits: */ |
Dave Hansen | 0697694 | 2016-02-12 13:02:29 -0800 | [diff] [blame] | 320 | if (!cpu_has(c, X86_FEATURE_PKU)) |
| 321 | return; |
| 322 | if (pku_disabled) |
| 323 | return; |
| 324 | |
| 325 | cr4_set_bits(X86_CR4_PKE); |
| 326 | /* |
| 327 | * Seting X86_CR4_PKE will cause the X86_FEATURE_OSPKE |
| 328 | * cpuid bit to be set. We need to ensure that we |
| 329 | * update that bit in this CPU's "cpu_info". |
| 330 | */ |
| 331 | get_cpu_cap(c); |
| 332 | } |
| 333 | |
| 334 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS |
| 335 | static __init int setup_disable_pku(char *arg) |
| 336 | { |
| 337 | /* |
| 338 | * Do not clear the X86_FEATURE_PKU bit. All of the |
| 339 | * runtime checks are against OSPKE so clearing the |
| 340 | * bit does nothing. |
| 341 | * |
| 342 | * This way, we will see "pku" in cpuinfo, but not |
| 343 | * "ospke", which is exactly what we want. It shows |
| 344 | * that the CPU has PKU, but the OS has not enabled it. |
| 345 | * This happens to be exactly how a system would look |
| 346 | * if we disabled the config option. |
| 347 | */ |
| 348 | pr_info("x86: 'nopku' specified, disabling Memory Protection Keys\n"); |
| 349 | pku_disabled = true; |
| 350 | return 1; |
| 351 | } |
| 352 | __setup("nopku", setup_disable_pku); |
| 353 | #endif /* CONFIG_X86_64 */ |
| 354 | |
| 355 | /* |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 356 | * Some CPU features depend on higher CPUID levels, which may not always |
| 357 | * be available due to CPUID level capping or broken virtualization |
| 358 | * software. Add those features to this table to auto-disable them. |
| 359 | */ |
| 360 | struct cpuid_dependent_feature { |
| 361 | u32 feature; |
| 362 | u32 level; |
| 363 | }; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 364 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 365 | static const struct cpuid_dependent_feature |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 366 | cpuid_dependent_features[] = { |
| 367 | { X86_FEATURE_MWAIT, 0x00000005 }, |
| 368 | { X86_FEATURE_DCA, 0x00000009 }, |
| 369 | { X86_FEATURE_XSAVE, 0x0000000d }, |
| 370 | { 0, 0 } |
| 371 | }; |
| 372 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 373 | static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 374 | { |
| 375 | const struct cpuid_dependent_feature *df; |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 376 | |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 377 | for (df = cpuid_dependent_features; df->feature; df++) { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 378 | |
| 379 | if (!cpu_has(c, df->feature)) |
| 380 | continue; |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 381 | /* |
| 382 | * Note: cpuid_level is set to -1 if unavailable, but |
| 383 | * extended_extended_level is set to 0 if unavailable |
| 384 | * and the legitimate extended levels are all negative |
| 385 | * when signed; hence the weird messing around with |
| 386 | * signs here... |
| 387 | */ |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 388 | if (!((s32)df->level < 0 ? |
Yinghai Lu | f6db44d | 2009-02-14 23:59:18 -0800 | [diff] [blame] | 389 | (u32)df->level > (u32)c->extended_cpuid_level : |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 390 | (s32)df->level > (s32)c->cpuid_level)) |
| 391 | continue; |
| 392 | |
| 393 | clear_cpu_cap(c, df->feature); |
| 394 | if (!warn) |
| 395 | continue; |
| 396 | |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 397 | pr_warn("CPU: CPU feature " X86_CAP_FMT " disabled, no CPUID level 0x%x\n", |
| 398 | x86_cap_flag(df->feature), df->level); |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 399 | } |
Yinghai Lu | f6db44d | 2009-02-14 23:59:18 -0800 | [diff] [blame] | 400 | } |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 401 | |
| 402 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | * Naming convention should be: <Name> [(<Codename>)] |
| 404 | * This table only is used unless init_<vendor>() below doesn't set it; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 405 | * in particular, if CPUID levels 0x80000002..4 are supported, this |
| 406 | * isn't used |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 407 | */ |
| 408 | |
| 409 | /* Look up CPU names by table lookup. */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 410 | static const char *table_lookup_model(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | { |
Jan Beulich | 09dc68d | 2013-10-21 09:35:20 +0100 | [diff] [blame] | 412 | #ifdef CONFIG_X86_32 |
| 413 | const struct legacy_cpu_model_info *info; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | |
| 415 | if (c->x86_model >= 16) |
| 416 | return NULL; /* Range check */ |
| 417 | |
| 418 | if (!this_cpu) |
| 419 | return NULL; |
| 420 | |
Jan Beulich | 09dc68d | 2013-10-21 09:35:20 +0100 | [diff] [blame] | 421 | info = this_cpu->legacy_models; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | |
Jan Beulich | 09dc68d | 2013-10-21 09:35:20 +0100 | [diff] [blame] | 423 | while (info->family) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 424 | if (info->family == c->x86) |
| 425 | return info->model_names[c->x86_model]; |
| 426 | info++; |
| 427 | } |
Jan Beulich | 09dc68d | 2013-10-21 09:35:20 +0100 | [diff] [blame] | 428 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | return NULL; /* Not found */ |
| 430 | } |
| 431 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 432 | __u32 cpu_caps_cleared[NCAPINTS]; |
| 433 | __u32 cpu_caps_set[NCAPINTS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | |
Jeremy Fitzhardinge | 11e3a84 | 2009-01-30 17:47:54 +0900 | [diff] [blame] | 435 | void load_percpu_segment(int cpu) |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 436 | { |
Yinghai Lu | fab334c | 2008-09-04 20:09:05 -0700 | [diff] [blame] | 437 | #ifdef CONFIG_X86_32 |
Brian Gerst | 2697fbd | 2009-01-27 12:56:48 +0900 | [diff] [blame] | 438 | loadsegment(fs, __KERNEL_PERCPU); |
| 439 | #else |
Andy Lutomirski | 45e876f | 2016-04-26 12:23:26 -0700 | [diff] [blame] | 440 | __loadsegment_simple(gs, 0); |
Brian Gerst | 2697fbd | 2009-01-27 12:56:48 +0900 | [diff] [blame] | 441 | wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu)); |
Yinghai Lu | fab334c | 2008-09-04 20:09:05 -0700 | [diff] [blame] | 442 | #endif |
Tejun Heo | 60a5317 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 443 | load_stack_canary_segment(); |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 444 | } |
| 445 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 446 | /* |
| 447 | * Current gdt points %fs at the "master" per-cpu area: after this, |
| 448 | * it's on the real one. |
| 449 | */ |
Brian Gerst | 552be87 | 2009-01-30 17:47:53 +0900 | [diff] [blame] | 450 | void switch_to_new_gdt(int cpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | { |
| 452 | struct desc_ptr gdt_descr; |
| 453 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | gdt_descr.address = (long)get_cpu_gdt_table(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | gdt_descr.size = GDT_SIZE - 1; |
| 456 | load_gdt(&gdt_descr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | /* Reload the per-cpu base */ |
Jeremy Fitzhardinge | 11e3a84 | 2009-01-30 17:47:54 +0900 | [diff] [blame] | 458 | |
| 459 | load_percpu_segment(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | } |
| 461 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 462 | static const struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 464 | static void get_model_name(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | { |
| 466 | unsigned int *v; |
Borislav Petkov | ee098e1 | 2015-06-01 12:06:57 +0200 | [diff] [blame] | 467 | char *p, *q, *s; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 469 | if (c->extended_cpuid_level < 0x80000004) |
Yinghai Lu | 1b05d60 | 2008-09-06 01:52:27 -0700 | [diff] [blame] | 470 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 472 | v = (unsigned int *)c->x86_model_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); |
| 474 | cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); |
| 475 | cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); |
| 476 | c->x86_model_id[48] = 0; |
| 477 | |
Borislav Petkov | ee098e1 | 2015-06-01 12:06:57 +0200 | [diff] [blame] | 478 | /* Trim whitespace */ |
| 479 | p = q = s = &c->x86_model_id[0]; |
| 480 | |
| 481 | while (*p == ' ') |
| 482 | p++; |
| 483 | |
| 484 | while (*p) { |
| 485 | /* Note the last non-whitespace index */ |
| 486 | if (!isspace(*p)) |
| 487 | s = q; |
| 488 | |
| 489 | *q++ = *p++; |
| 490 | } |
| 491 | |
| 492 | *(s + 1) = '\0'; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | } |
| 494 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 495 | void cpu_detect_cache_sizes(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | { |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 497 | unsigned int n, dummy, ebx, ecx, edx, l2size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 499 | n = c->extended_cpuid_level; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | |
| 501 | if (n >= 0x80000005) { |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 502 | cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 503 | c->x86_cache_size = (ecx>>24) + (edx>>24); |
Yinghai Lu | 140fc72 | 2008-09-04 20:09:07 -0700 | [diff] [blame] | 504 | #ifdef CONFIG_X86_64 |
| 505 | /* On K8 L1 TLB is inclusive, so don't count it */ |
| 506 | c->x86_tlbsize = 0; |
| 507 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | } |
| 509 | |
| 510 | if (n < 0x80000006) /* Some chips just has a large L1. */ |
| 511 | return; |
| 512 | |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 513 | cpuid(0x80000006, &dummy, &ebx, &ecx, &edx); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | l2size = ecx >> 16; |
| 515 | |
Yinghai Lu | 140fc72 | 2008-09-04 20:09:07 -0700 | [diff] [blame] | 516 | #ifdef CONFIG_X86_64 |
| 517 | c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff); |
| 518 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | /* do processor-specific cache resizing */ |
Jan Beulich | 09dc68d | 2013-10-21 09:35:20 +0100 | [diff] [blame] | 520 | if (this_cpu->legacy_cache_size) |
| 521 | l2size = this_cpu->legacy_cache_size(c, l2size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
| 523 | /* Allow user to override all this if necessary. */ |
| 524 | if (cachesize_override != -1) |
| 525 | l2size = cachesize_override; |
| 526 | |
| 527 | if (l2size == 0) |
| 528 | return; /* Again, no L2 cache is possible */ |
Yinghai Lu | 140fc72 | 2008-09-04 20:09:07 -0700 | [diff] [blame] | 529 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | |
| 531 | c->x86_cache_size = l2size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 532 | } |
| 533 | |
Alex Shi | e0ba94f | 2012-06-28 09:02:16 +0800 | [diff] [blame] | 534 | u16 __read_mostly tlb_lli_4k[NR_INFO]; |
| 535 | u16 __read_mostly tlb_lli_2m[NR_INFO]; |
| 536 | u16 __read_mostly tlb_lli_4m[NR_INFO]; |
| 537 | u16 __read_mostly tlb_lld_4k[NR_INFO]; |
| 538 | u16 __read_mostly tlb_lld_2m[NR_INFO]; |
| 539 | u16 __read_mostly tlb_lld_4m[NR_INFO]; |
Kirill A. Shutemov | dd36039 | 2013-12-23 14:16:58 +0200 | [diff] [blame] | 540 | u16 __read_mostly tlb_lld_1g[NR_INFO]; |
Alex Shi | e0ba94f | 2012-06-28 09:02:16 +0800 | [diff] [blame] | 541 | |
Steven Honeyman | f94fe11 | 2014-11-05 22:52:18 +0000 | [diff] [blame] | 542 | static void cpu_detect_tlb(struct cpuinfo_x86 *c) |
Alex Shi | e0ba94f | 2012-06-28 09:02:16 +0800 | [diff] [blame] | 543 | { |
| 544 | if (this_cpu->c_detect_tlb) |
| 545 | this_cpu->c_detect_tlb(c); |
| 546 | |
Steven Honeyman | f94fe11 | 2014-11-05 22:52:18 +0000 | [diff] [blame] | 547 | pr_info("Last level iTLB entries: 4KB %d, 2MB %d, 4MB %d\n", |
Alex Shi | e0ba94f | 2012-06-28 09:02:16 +0800 | [diff] [blame] | 548 | tlb_lli_4k[ENTRIES], tlb_lli_2m[ENTRIES], |
Steven Honeyman | f94fe11 | 2014-11-05 22:52:18 +0000 | [diff] [blame] | 549 | tlb_lli_4m[ENTRIES]); |
| 550 | |
| 551 | pr_info("Last level dTLB entries: 4KB %d, 2MB %d, 4MB %d, 1GB %d\n", |
| 552 | tlb_lld_4k[ENTRIES], tlb_lld_2m[ENTRIES], |
| 553 | tlb_lld_4m[ENTRIES], tlb_lld_1g[ENTRIES]); |
Alex Shi | e0ba94f | 2012-06-28 09:02:16 +0800 | [diff] [blame] | 554 | } |
| 555 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 556 | void detect_ht(struct cpuinfo_x86 *c) |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 557 | { |
Borislav Petkov | c8e56d2 | 2015-06-04 18:55:25 +0200 | [diff] [blame] | 558 | #ifdef CONFIG_SMP |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 559 | u32 eax, ebx, ecx, edx; |
| 560 | int index_msb, core_bits; |
Mike Travis | 2eaad1f | 2009-12-10 17:19:36 -0800 | [diff] [blame] | 561 | static bool printed; |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 562 | |
| 563 | if (!cpu_has(c, X86_FEATURE_HT)) |
| 564 | return; |
| 565 | |
| 566 | if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) |
| 567 | goto out; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 568 | |
Yinghai Lu | 1cd7877 | 2008-09-04 20:09:08 -0700 | [diff] [blame] | 569 | if (cpu_has(c, X86_FEATURE_XTOPOLOGY)) |
| 570 | return; |
| 571 | |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 572 | cpuid(1, &eax, &ebx, &ecx, &edx); |
| 573 | |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 574 | smp_num_siblings = (ebx & 0xff0000) >> 16; |
| 575 | |
| 576 | if (smp_num_siblings == 1) { |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 577 | pr_info_once("CPU0: Hyper-Threading is disabled\n"); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 578 | goto out; |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 579 | } |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 580 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 581 | if (smp_num_siblings <= 1) |
| 582 | goto out; |
| 583 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 584 | index_msb = get_count_order(smp_num_siblings); |
| 585 | c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb); |
| 586 | |
| 587 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
| 588 | |
| 589 | index_msb = get_count_order(smp_num_siblings); |
| 590 | |
| 591 | core_bits = get_count_order(c->x86_max_cores); |
| 592 | |
| 593 | c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) & |
| 594 | ((1 << core_bits) - 1); |
| 595 | |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 596 | out: |
Mike Travis | 2eaad1f | 2009-12-10 17:19:36 -0800 | [diff] [blame] | 597 | if (!printed && (c->x86_max_cores * smp_num_siblings) > 1) { |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 598 | pr_info("CPU: Physical Processor ID: %d\n", |
| 599 | c->phys_proc_id); |
| 600 | pr_info("CPU: Processor Core ID: %d\n", |
| 601 | c->cpu_core_id); |
Mike Travis | 2eaad1f | 2009-12-10 17:19:36 -0800 | [diff] [blame] | 602 | printed = 1; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 603 | } |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 604 | #endif |
Yinghai Lu | 97e4db7 | 2008-09-04 20:08:59 -0700 | [diff] [blame] | 605 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 607 | static void get_cpu_vendor(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | { |
| 609 | char *v = c->x86_vendor_id; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 610 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | |
| 612 | for (i = 0; i < X86_VENDOR_NUM; i++) { |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 613 | if (!cpu_devs[i]) |
| 614 | break; |
| 615 | |
| 616 | if (!strcmp(v, cpu_devs[i]->c_ident[0]) || |
| 617 | (cpu_devs[i]->c_ident[1] && |
| 618 | !strcmp(v, cpu_devs[i]->c_ident[1]))) { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 619 | |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 620 | this_cpu = cpu_devs[i]; |
| 621 | c->x86_vendor = this_cpu->c_x86_vendor; |
| 622 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | } |
| 624 | } |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 625 | |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 626 | pr_err_once("CPU: vendor_id '%s' unknown, using generic init.\n" \ |
| 627 | "CPU: Your system may be unstable.\n", v); |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 628 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | c->x86_vendor = X86_VENDOR_UNKNOWN; |
| 630 | this_cpu = &default_cpu; |
| 631 | } |
| 632 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 633 | void cpu_detect(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | /* Get vendor name */ |
Harvey Harrison | 4a14851 | 2008-02-01 17:49:43 +0100 | [diff] [blame] | 636 | cpuid(0x00000000, (unsigned int *)&c->cpuid_level, |
| 637 | (unsigned int *)&c->x86_vendor_id[0], |
| 638 | (unsigned int *)&c->x86_vendor_id[8], |
| 639 | (unsigned int *)&c->x86_vendor_id[4]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | c->x86 = 4; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 642 | /* Intel-defined flags: level 0x00000001 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 643 | if (c->cpuid_level >= 0x00000001) { |
| 644 | u32 junk, tfms, cap0, misc; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 645 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | cpuid(0x00000001, &tfms, &misc, &junk, &cap0); |
Borislav Petkov | 99f925c | 2015-11-23 11:12:21 +0100 | [diff] [blame] | 647 | c->x86 = x86_family(tfms); |
| 648 | c->x86_model = x86_model(tfms); |
| 649 | c->x86_mask = x86_stepping(tfms); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 650 | |
Huang, Ying | d4387bd | 2008-01-31 22:05:45 +0100 | [diff] [blame] | 651 | if (cap0 & (1<<19)) { |
Huang, Ying | d4387bd | 2008-01-31 22:05:45 +0100 | [diff] [blame] | 652 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 653 | c->x86_cache_alignment = c->x86_clflush_size; |
Huang, Ying | d4387bd | 2008-01-31 22:05:45 +0100 | [diff] [blame] | 654 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | } |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 657 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 658 | void get_cpu_cap(struct cpuinfo_x86 *c) |
Yinghai Lu | 093af8d | 2008-01-30 13:33:32 +0100 | [diff] [blame] | 659 | { |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 660 | u32 eax, ebx, ecx, edx; |
Yinghai Lu | 093af8d | 2008-01-30 13:33:32 +0100 | [diff] [blame] | 661 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 662 | /* Intel-defined flags: level 0x00000001 */ |
| 663 | if (c->cpuid_level >= 0x00000001) { |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 664 | cpuid(0x00000001, &eax, &ebx, &ecx, &edx); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 665 | |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 666 | c->x86_capability[CPUID_1_ECX] = ecx; |
| 667 | c->x86_capability[CPUID_1_EDX] = edx; |
Yinghai Lu | 093af8d | 2008-01-30 13:33:32 +0100 | [diff] [blame] | 668 | } |
| 669 | |
H. Peter Anvin | bdc802d | 2010-07-07 17:29:18 -0700 | [diff] [blame] | 670 | /* Additional Intel-defined flags: level 0x00000007 */ |
| 671 | if (c->cpuid_level >= 0x00000007) { |
H. Peter Anvin | bdc802d | 2010-07-07 17:29:18 -0700 | [diff] [blame] | 672 | cpuid_count(0x00000007, 0, &eax, &ebx, &ecx, &edx); |
| 673 | |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 674 | c->x86_capability[CPUID_7_0_EBX] = ebx; |
Borislav Petkov | 2ccd71f | 2015-12-07 10:39:39 +0100 | [diff] [blame] | 675 | |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 676 | c->x86_capability[CPUID_6_EAX] = cpuid_eax(0x00000006); |
Dave Hansen | dfb4a70 | 2016-02-12 13:02:01 -0800 | [diff] [blame] | 677 | c->x86_capability[CPUID_7_ECX] = ecx; |
H. Peter Anvin | bdc802d | 2010-07-07 17:29:18 -0700 | [diff] [blame] | 678 | } |
| 679 | |
Fenghua Yu | 6229ad2 | 2014-05-29 11:12:30 -0700 | [diff] [blame] | 680 | /* Extended state features: level 0x0000000d */ |
| 681 | if (c->cpuid_level >= 0x0000000d) { |
Fenghua Yu | 6229ad2 | 2014-05-29 11:12:30 -0700 | [diff] [blame] | 682 | cpuid_count(0x0000000d, 1, &eax, &ebx, &ecx, &edx); |
| 683 | |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 684 | c->x86_capability[CPUID_D_1_EAX] = eax; |
Fenghua Yu | 6229ad2 | 2014-05-29 11:12:30 -0700 | [diff] [blame] | 685 | } |
| 686 | |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 687 | /* Additional Intel-defined flags: level 0x0000000F */ |
| 688 | if (c->cpuid_level >= 0x0000000F) { |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 689 | |
| 690 | /* QoS sub-leaf, EAX=0Fh, ECX=0 */ |
| 691 | cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx); |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 692 | c->x86_capability[CPUID_F_0_EDX] = edx; |
| 693 | |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 694 | if (cpu_has(c, X86_FEATURE_CQM_LLC)) { |
| 695 | /* will be overridden if occupancy monitoring exists */ |
| 696 | c->x86_cache_max_rmid = ebx; |
| 697 | |
| 698 | /* QoS sub-leaf, EAX=0Fh, ECX=1 */ |
| 699 | cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx); |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 700 | c->x86_capability[CPUID_F_1_EDX] = edx; |
| 701 | |
Vikas Shivappa | 33c3cc7 | 2016-03-10 15:32:09 -0800 | [diff] [blame] | 702 | if ((cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) || |
| 703 | ((cpu_has(c, X86_FEATURE_CQM_MBM_TOTAL)) || |
| 704 | (cpu_has(c, X86_FEATURE_CQM_MBM_LOCAL)))) { |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 705 | c->x86_cache_max_rmid = ecx; |
| 706 | c->x86_cache_occ_scale = ebx; |
| 707 | } |
| 708 | } else { |
| 709 | c->x86_cache_max_rmid = -1; |
| 710 | c->x86_cache_occ_scale = -1; |
| 711 | } |
| 712 | } |
| 713 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 714 | /* AMD-defined flags: level 0x80000001 */ |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 715 | eax = cpuid_eax(0x80000000); |
| 716 | c->extended_cpuid_level = eax; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 717 | |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 718 | if ((eax & 0xffff0000) == 0x80000000) { |
| 719 | if (eax >= 0x80000001) { |
| 720 | cpuid(0x80000001, &eax, &ebx, &ecx, &edx); |
| 721 | |
| 722 | c->x86_capability[CPUID_8000_0001_ECX] = ecx; |
| 723 | c->x86_capability[CPUID_8000_0001_EDX] = edx; |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 724 | } |
| 725 | } |
Yinghai Lu | 5122c89 | 2008-09-04 20:09:09 -0700 | [diff] [blame] | 726 | |
Yazen Ghannam | 71faad4 | 2016-05-11 14:58:26 +0200 | [diff] [blame] | 727 | if (c->extended_cpuid_level >= 0x80000007) { |
| 728 | cpuid(0x80000007, &eax, &ebx, &ecx, &edx); |
| 729 | |
| 730 | c->x86_capability[CPUID_8000_0007_EBX] = ebx; |
| 731 | c->x86_power = edx; |
| 732 | } |
| 733 | |
Yinghai Lu | 5122c89 | 2008-09-04 20:09:09 -0700 | [diff] [blame] | 734 | if (c->extended_cpuid_level >= 0x80000008) { |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 735 | cpuid(0x80000008, &eax, &ebx, &ecx, &edx); |
Yinghai Lu | 5122c89 | 2008-09-04 20:09:09 -0700 | [diff] [blame] | 736 | |
| 737 | c->x86_virt_bits = (eax >> 8) & 0xff; |
| 738 | c->x86_phys_bits = eax & 0xff; |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 739 | c->x86_capability[CPUID_8000_0008_EBX] = ebx; |
Yinghai Lu | 5122c89 | 2008-09-04 20:09:09 -0700 | [diff] [blame] | 740 | } |
Jan Beulich | 13c6c53 | 2009-03-12 12:37:34 +0000 | [diff] [blame] | 741 | #ifdef CONFIG_X86_32 |
| 742 | else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36)) |
| 743 | c->x86_phys_bits = 36; |
Yinghai Lu | 5122c89 | 2008-09-04 20:09:09 -0700 | [diff] [blame] | 744 | #endif |
Yinghai Lu | e322423 | 2008-09-06 01:52:28 -0700 | [diff] [blame] | 745 | |
Borislav Petkov | 2ccd71f | 2015-12-07 10:39:39 +0100 | [diff] [blame] | 746 | if (c->extended_cpuid_level >= 0x8000000a) |
Borislav Petkov | 39c06df | 2015-12-07 10:39:40 +0100 | [diff] [blame] | 747 | c->x86_capability[CPUID_8000_000A_EDX] = cpuid_edx(0x8000000a); |
Borislav Petkov | 2ccd71f | 2015-12-07 10:39:39 +0100 | [diff] [blame] | 748 | |
Jacob Pan | 1dedefd | 2010-05-19 12:01:23 -0700 | [diff] [blame] | 749 | init_scattered_cpuid_features(c); |
Yinghai Lu | 093af8d | 2008-01-30 13:33:32 +0100 | [diff] [blame] | 750 | } |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 751 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 752 | static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 753 | { |
| 754 | #ifdef CONFIG_X86_32 |
| 755 | int i; |
| 756 | |
| 757 | /* |
| 758 | * First of all, decide if this is a 486 or higher |
| 759 | * It's a 486 if we can modify the AC flag |
| 760 | */ |
| 761 | if (flag_is_changeable_p(X86_EFLAGS_AC)) |
| 762 | c->x86 = 4; |
| 763 | else |
| 764 | c->x86 = 3; |
| 765 | |
| 766 | for (i = 0; i < X86_VENDOR_NUM; i++) |
| 767 | if (cpu_devs[i] && cpu_devs[i]->c_identify) { |
| 768 | c->x86_vendor_id[0] = 0; |
| 769 | cpu_devs[i]->c_identify(c); |
| 770 | if (c->x86_vendor_id[0]) { |
| 771 | get_cpu_vendor(c); |
| 772 | break; |
| 773 | } |
| 774 | } |
| 775 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | } |
| 777 | |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 778 | /* |
| 779 | * Do minimum CPU detection early. |
| 780 | * Fields really needed: vendor, cpuid_level, family, model, mask, |
| 781 | * cache alignment. |
| 782 | * The others are not touched to avoid unwanted side effects. |
| 783 | * |
| 784 | * WARNING: this function is only called on the BP. Don't add code here |
| 785 | * that is supposed to run on all CPUs. |
| 786 | */ |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 787 | static void __init early_identify_cpu(struct cpuinfo_x86 *c) |
Rusty Russell | d7cd561 | 2006-12-07 02:14:08 +0100 | [diff] [blame] | 788 | { |
Yinghai Lu | 6627d24 | 2008-09-04 20:09:10 -0700 | [diff] [blame] | 789 | #ifdef CONFIG_X86_64 |
| 790 | c->x86_clflush_size = 64; |
Jan Beulich | 13c6c53 | 2009-03-12 12:37:34 +0000 | [diff] [blame] | 791 | c->x86_phys_bits = 36; |
| 792 | c->x86_virt_bits = 48; |
Yinghai Lu | 6627d24 | 2008-09-04 20:09:10 -0700 | [diff] [blame] | 793 | #else |
Huang, Ying | d4387bd | 2008-01-31 22:05:45 +0100 | [diff] [blame] | 794 | c->x86_clflush_size = 32; |
Jan Beulich | 13c6c53 | 2009-03-12 12:37:34 +0000 | [diff] [blame] | 795 | c->x86_phys_bits = 32; |
| 796 | c->x86_virt_bits = 32; |
Yinghai Lu | 6627d24 | 2008-09-04 20:09:10 -0700 | [diff] [blame] | 797 | #endif |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 798 | c->x86_cache_alignment = c->x86_clflush_size; |
Rusty Russell | d7cd561 | 2006-12-07 02:14:08 +0100 | [diff] [blame] | 799 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 800 | memset(&c->x86_capability, 0, sizeof c->x86_capability); |
Yinghai Lu | 0a488a5 | 2008-09-04 21:09:47 +0200 | [diff] [blame] | 801 | c->extended_cpuid_level = 0; |
| 802 | |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 803 | if (!have_cpuid_p()) |
| 804 | identify_cpu_without_cpuid(c); |
| 805 | |
| 806 | /* cyrix could have cpuid enabled via c_identify()*/ |
Rusty Russell | d7cd561 | 2006-12-07 02:14:08 +0100 | [diff] [blame] | 807 | if (!have_cpuid_p()) |
| 808 | return; |
| 809 | |
| 810 | cpu_detect(c); |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 811 | get_cpu_vendor(c); |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 812 | get_cpu_cap(c); |
Krzysztof Helt | 12cf105 | 2008-09-04 21:09:43 +0200 | [diff] [blame] | 813 | |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 814 | if (this_cpu->c_early_init) |
| 815 | this_cpu->c_early_init(c); |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 816 | |
Robert Richter | f6e9456c | 2010-07-21 19:03:58 +0200 | [diff] [blame] | 817 | c->cpu_index = 0; |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 818 | filter_cpuid_features(c, false); |
Fenghua Yu | de5397a | 2011-05-11 16:51:05 -0700 | [diff] [blame] | 819 | |
Borislav Petkov | a110b5e | 2011-08-05 20:01:16 +0200 | [diff] [blame] | 820 | if (this_cpu->c_bsp_init) |
| 821 | this_cpu->c_bsp_init(c); |
Borislav Petkov | c3b8359 | 2013-06-09 12:07:30 +0200 | [diff] [blame] | 822 | |
| 823 | setup_force_cpu_cap(X86_FEATURE_ALWAYS); |
Ingo Molnar | db52ef7 | 2015-06-27 10:25:14 +0200 | [diff] [blame] | 824 | fpu__init_system(c); |
Rusty Russell | d7cd561 | 2006-12-07 02:14:08 +0100 | [diff] [blame] | 825 | } |
| 826 | |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 827 | void __init early_cpu_init(void) |
| 828 | { |
Jan Beulich | 02dde8b | 2009-03-12 12:08:49 +0000 | [diff] [blame] | 829 | const struct cpu_dev *const *cdev; |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 830 | int count = 0; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 831 | |
Jan Beulich | ac23f25 | 2011-03-04 15:52:35 +0000 | [diff] [blame] | 832 | #ifdef CONFIG_PROCESSOR_SELECT |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 833 | pr_info("KERNEL supported cpus:\n"); |
Ingo Molnar | 31c997c | 2009-11-14 10:34:41 +0100 | [diff] [blame] | 834 | #endif |
| 835 | |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 836 | for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) { |
Jan Beulich | 02dde8b | 2009-03-12 12:08:49 +0000 | [diff] [blame] | 837 | const struct cpu_dev *cpudev = *cdev; |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 838 | |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 839 | if (count >= X86_VENDOR_NUM) |
| 840 | break; |
| 841 | cpu_devs[count] = cpudev; |
| 842 | count++; |
| 843 | |
Jan Beulich | ac23f25 | 2011-03-04 15:52:35 +0000 | [diff] [blame] | 844 | #ifdef CONFIG_PROCESSOR_SELECT |
Ingo Molnar | 31c997c | 2009-11-14 10:34:41 +0100 | [diff] [blame] | 845 | { |
| 846 | unsigned int j; |
Yinghai Lu | 10a434f | 2008-09-04 21:09:45 +0200 | [diff] [blame] | 847 | |
Ingo Molnar | 31c997c | 2009-11-14 10:34:41 +0100 | [diff] [blame] | 848 | for (j = 0; j < 2; j++) { |
| 849 | if (!cpudev->c_ident[j]) |
| 850 | continue; |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 851 | pr_info(" %s %s\n", cpudev->c_vendor, |
Ingo Molnar | 31c997c | 2009-11-14 10:34:41 +0100 | [diff] [blame] | 852 | cpudev->c_ident[j]); |
| 853 | } |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 854 | } |
Dave Jones | 0388423 | 2009-11-13 15:30:00 -0500 | [diff] [blame] | 855 | #endif |
Ingo Molnar | 31c997c | 2009-11-14 10:34:41 +0100 | [diff] [blame] | 856 | } |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 857 | early_identify_cpu(&boot_cpu_data); |
Siddha, Suresh B | 1e9f28f | 2006-03-27 01:15:22 -0800 | [diff] [blame] | 858 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 859 | |
H. Peter Anvin | b6734c3 | 2008-08-18 17:39:32 -0700 | [diff] [blame] | 860 | /* |
Borislav Petkov | 366d4a4 | 2010-10-04 09:31:27 +0200 | [diff] [blame] | 861 | * The NOPL instruction is supposed to exist on all CPUs of family >= 6; |
| 862 | * unfortunately, that's not true in practice because of early VIA |
| 863 | * chips and (more importantly) broken virtualizers that are not easy |
| 864 | * to detect. In the latter case it doesn't even *fail* reliably, so |
| 865 | * probing for it doesn't even work. Disable it completely on 32-bit |
H. Peter Anvin | ba0593b | 2008-09-16 09:29:40 -0700 | [diff] [blame] | 866 | * unless we can find a reliable way to detect all the broken cases. |
Borislav Petkov | 366d4a4 | 2010-10-04 09:31:27 +0200 | [diff] [blame] | 867 | * Enable it explicitly on 64-bit for non-constant inputs of cpu_has(). |
H. Peter Anvin | b6734c3 | 2008-08-18 17:39:32 -0700 | [diff] [blame] | 868 | */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 869 | static void detect_nopl(struct cpuinfo_x86 *c) |
H. Peter Anvin | b6734c3 | 2008-08-18 17:39:32 -0700 | [diff] [blame] | 870 | { |
Borislav Petkov | 366d4a4 | 2010-10-04 09:31:27 +0200 | [diff] [blame] | 871 | #ifdef CONFIG_X86_32 |
H. Peter Anvin | b6734c3 | 2008-08-18 17:39:32 -0700 | [diff] [blame] | 872 | clear_cpu_cap(c, X86_FEATURE_NOPL); |
Borislav Petkov | 366d4a4 | 2010-10-04 09:31:27 +0200 | [diff] [blame] | 873 | #else |
| 874 | set_cpu_cap(c, X86_FEATURE_NOPL); |
| 875 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | |
Andy Lutomirski | 7a5d6704 | 2016-04-07 17:31:46 -0700 | [diff] [blame] | 878 | static void detect_null_seg_behavior(struct cpuinfo_x86 *c) |
| 879 | { |
| 880 | #ifdef CONFIG_X86_64 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 881 | /* |
Andy Lutomirski | 7a5d6704 | 2016-04-07 17:31:46 -0700 | [diff] [blame] | 882 | * Empirically, writing zero to a segment selector on AMD does |
| 883 | * not clear the base, whereas writing zero to a segment |
| 884 | * selector on Intel does clear the base. Intel's behavior |
| 885 | * allows slightly faster context switches in the common case |
| 886 | * where GS is unused by the prev and next threads. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | * |
Andy Lutomirski | 7a5d6704 | 2016-04-07 17:31:46 -0700 | [diff] [blame] | 888 | * Since neither vendor documents this anywhere that I can see, |
| 889 | * detect it directly instead of hardcoding the choice by |
| 890 | * vendor. |
| 891 | * |
| 892 | * I've designated AMD's behavior as the "bug" because it's |
| 893 | * counterintuitive and less friendly. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | */ |
Andy Lutomirski | 7a5d6704 | 2016-04-07 17:31:46 -0700 | [diff] [blame] | 895 | |
| 896 | unsigned long old_base, tmp; |
| 897 | rdmsrl(MSR_FS_BASE, old_base); |
| 898 | wrmsrl(MSR_FS_BASE, 1); |
| 899 | loadsegment(fs, 0); |
| 900 | rdmsrl(MSR_FS_BASE, tmp); |
| 901 | if (tmp != 0) |
| 902 | set_cpu_bug(c, X86_BUG_NULL_SEG); |
| 903 | wrmsrl(MSR_FS_BASE, old_base); |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 904 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | } |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 906 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 907 | static void generic_identify(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 908 | { |
| 909 | c->extended_cpuid_level = 0; |
| 910 | |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 911 | if (!have_cpuid_p()) |
| 912 | identify_cpu_without_cpuid(c); |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 913 | |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 914 | /* cyrix could have cpuid enabled via c_identify()*/ |
Ingo Molnar | a9853dd | 2008-09-14 14:46:58 +0200 | [diff] [blame] | 915 | if (!have_cpuid_p()) |
Yinghai Lu | aef93c8 | 2008-09-14 02:33:15 -0700 | [diff] [blame] | 916 | return; |
| 917 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 918 | cpu_detect(c); |
| 919 | |
| 920 | get_cpu_vendor(c); |
| 921 | |
| 922 | get_cpu_cap(c); |
| 923 | |
| 924 | if (c->cpuid_level >= 0x00000001) { |
| 925 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF; |
Yinghai Lu | b89d3b3 | 2008-09-04 20:09:12 -0700 | [diff] [blame] | 926 | #ifdef CONFIG_X86_32 |
Borislav Petkov | c8e56d2 | 2015-06-04 18:55:25 +0200 | [diff] [blame] | 927 | # ifdef CONFIG_SMP |
Ingo Molnar | cb8cc44 | 2009-01-28 13:24:54 +0100 | [diff] [blame] | 928 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
Yinghai Lu | b89d3b3 | 2008-09-04 20:09:12 -0700 | [diff] [blame] | 929 | # else |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 930 | c->apicid = c->initial_apicid; |
Yinghai Lu | b89d3b3 | 2008-09-04 20:09:12 -0700 | [diff] [blame] | 931 | # endif |
Siddha, Suresh B | 1e9f28f | 2006-03-27 01:15:22 -0800 | [diff] [blame] | 932 | #endif |
Yinghai Lu | b89d3b3 | 2008-09-04 20:09:12 -0700 | [diff] [blame] | 933 | c->phys_proc_id = c->initial_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 934 | } |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 935 | |
Yinghai Lu | 1b05d60 | 2008-09-06 01:52:27 -0700 | [diff] [blame] | 936 | get_model_name(c); /* Default name */ |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 937 | |
Yinghai Lu | 3da99c9 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 938 | detect_nopl(c); |
Andy Lutomirski | 7a5d6704 | 2016-04-07 17:31:46 -0700 | [diff] [blame] | 939 | |
| 940 | detect_null_seg_behavior(c); |
Andy Lutomirski | 0230bb0 | 2016-04-07 17:31:48 -0700 | [diff] [blame] | 941 | |
| 942 | /* |
| 943 | * ESPFIX is a strange bug. All real CPUs have it. Paravirt |
| 944 | * systems that run Linux at CPL > 0 may or may not have the |
| 945 | * issue, but, even if they have the issue, there's absolutely |
| 946 | * nothing we can do about it because we can't use the real IRET |
| 947 | * instruction. |
| 948 | * |
| 949 | * NB: For the time being, only 32-bit kernels support |
| 950 | * X86_BUG_ESPFIX as such. 64-bit kernels directly choose |
| 951 | * whether to apply espfix using paravirt hooks. If any |
| 952 | * non-paravirt system ever shows up that does *not* have the |
| 953 | * ESPFIX issue, we can change this. |
| 954 | */ |
| 955 | #ifdef CONFIG_X86_32 |
| 956 | # ifdef CONFIG_PARAVIRT |
| 957 | do { |
| 958 | extern void native_iret(void); |
| 959 | if (pv_cpu_ops.iret == native_iret) |
| 960 | set_cpu_bug(c, X86_BUG_ESPFIX); |
| 961 | } while (0); |
| 962 | # else |
| 963 | set_cpu_bug(c, X86_BUG_ESPFIX); |
| 964 | # endif |
| 965 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | } |
| 967 | |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 968 | static void x86_init_cache_qos(struct cpuinfo_x86 *c) |
| 969 | { |
| 970 | /* |
| 971 | * The heavy lifting of max_rmid and cache_occ_scale are handled |
| 972 | * in get_cpu_cap(). Here we just set the max_rmid for the boot_cpu |
| 973 | * in case CQM bits really aren't there in this CPU. |
| 974 | */ |
| 975 | if (c != &boot_cpu_data) { |
| 976 | boot_cpu_data.x86_cache_max_rmid = |
| 977 | min(boot_cpu_data.x86_cache_max_rmid, |
| 978 | c->x86_cache_max_rmid); |
| 979 | } |
| 980 | } |
| 981 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 982 | /* |
| 983 | * This does the hard work of actually picking apart the CPU stuff... |
| 984 | */ |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 985 | static void identify_cpu(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 986 | { |
| 987 | int i; |
| 988 | |
| 989 | c->loops_per_jiffy = loops_per_jiffy; |
| 990 | c->x86_cache_size = -1; |
| 991 | c->x86_vendor = X86_VENDOR_UNKNOWN; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 992 | c->x86_model = c->x86_mask = 0; /* So far unknown... */ |
| 993 | c->x86_vendor_id[0] = '\0'; /* Unset */ |
| 994 | c->x86_model_id[0] = '\0'; /* Unset */ |
Siddha, Suresh B | 94605ef | 2005-11-05 17:25:54 +0100 | [diff] [blame] | 995 | c->x86_max_cores = 1; |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 996 | c->x86_coreid_bits = 0; |
Yinghai Lu | 11fdd25 | 2008-09-07 17:58:50 -0700 | [diff] [blame] | 997 | #ifdef CONFIG_X86_64 |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 998 | c->x86_clflush_size = 64; |
Jan Beulich | 13c6c53 | 2009-03-12 12:37:34 +0000 | [diff] [blame] | 999 | c->x86_phys_bits = 36; |
| 1000 | c->x86_virt_bits = 48; |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1001 | #else |
| 1002 | c->cpuid_level = -1; /* CPUID not detected */ |
Andi Kleen | 770d132 | 2006-12-07 02:14:05 +0100 | [diff] [blame] | 1003 | c->x86_clflush_size = 32; |
Jan Beulich | 13c6c53 | 2009-03-12 12:37:34 +0000 | [diff] [blame] | 1004 | c->x86_phys_bits = 32; |
| 1005 | c->x86_virt_bits = 32; |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1006 | #endif |
| 1007 | c->x86_cache_alignment = c->x86_clflush_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1008 | memset(&c->x86_capability, 0, sizeof c->x86_capability); |
| 1009 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | generic_identify(c); |
| 1011 | |
Andi Kleen | 3898534 | 2008-01-30 13:32:49 +0100 | [diff] [blame] | 1012 | if (this_cpu->c_identify) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1013 | this_cpu->c_identify(c); |
| 1014 | |
Adam Buchbinder | 6a6256f | 2016-02-23 15:34:30 -0800 | [diff] [blame] | 1015 | /* Clear/Set all flags overridden by options, after probe */ |
Yinghai Lu | 2759c32 | 2009-05-15 13:05:16 -0700 | [diff] [blame] | 1016 | for (i = 0; i < NCAPINTS; i++) { |
| 1017 | c->x86_capability[i] &= ~cpu_caps_cleared[i]; |
| 1018 | c->x86_capability[i] |= cpu_caps_set[i]; |
| 1019 | } |
| 1020 | |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1021 | #ifdef CONFIG_X86_64 |
Ingo Molnar | cb8cc44 | 2009-01-28 13:24:54 +0100 | [diff] [blame] | 1022 | c->apicid = apic->phys_pkg_id(c->initial_apicid, 0); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1023 | #endif |
| 1024 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1025 | /* |
| 1026 | * Vendor-specific initialization. In this section we |
| 1027 | * canonicalize the feature flags, meaning if there are |
| 1028 | * features a certain CPU supports which CPUID doesn't |
| 1029 | * tell us, CPUID claiming incorrect flags, or other bugs, |
| 1030 | * we handle them here. |
| 1031 | * |
| 1032 | * At the end of this section, c->x86_capability better |
| 1033 | * indicate the features this CPU genuinely supports! |
| 1034 | */ |
| 1035 | if (this_cpu->c_init) |
| 1036 | this_cpu->c_init(c); |
| 1037 | |
| 1038 | /* Disable the PN if appropriate */ |
| 1039 | squash_the_stupid_serial_number(c); |
| 1040 | |
H. Peter Anvin | b2cc2a0 | 2012-09-26 18:02:28 -0700 | [diff] [blame] | 1041 | /* Set up SMEP/SMAP */ |
| 1042 | setup_smep(c); |
| 1043 | setup_smap(c); |
| 1044 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1045 | /* |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1046 | * The vendor-specific functions might have changed features. |
| 1047 | * Now we do "generic changes." |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1048 | */ |
| 1049 | |
H. Peter Anvin | b38b066 | 2009-01-23 17:20:50 -0800 | [diff] [blame] | 1050 | /* Filter out anything that depends on CPUID levels we don't have */ |
| 1051 | filter_cpuid_features(c, true); |
| 1052 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | /* If the model name is still unset, do table lookup. */ |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 1054 | if (!c->x86_model_id[0]) { |
Jan Beulich | 02dde8b | 2009-03-12 12:08:49 +0000 | [diff] [blame] | 1055 | const char *p; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1056 | p = table_lookup_model(c); |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 1057 | if (p) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | strcpy(c->x86_model_id, p); |
| 1059 | else |
| 1060 | /* Last resort... */ |
| 1061 | sprintf(c->x86_model_id, "%02x/%02x", |
Chuck Ebbert | 54a20f8 | 2006-03-23 02:59:36 -0800 | [diff] [blame] | 1062 | c->x86, c->x86_model); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1063 | } |
| 1064 | |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1065 | #ifdef CONFIG_X86_64 |
| 1066 | detect_ht(c); |
| 1067 | #endif |
| 1068 | |
Alok Kataria | 88b094f | 2008-10-27 10:41:46 -0700 | [diff] [blame] | 1069 | init_hypervisor(c); |
H. Peter Anvin | 49d859d | 2011-07-31 14:02:19 -0700 | [diff] [blame] | 1070 | x86_init_rdrand(c); |
Peter P Waskiewicz Jr | cbc82b1 | 2015-01-23 18:45:43 +0000 | [diff] [blame] | 1071 | x86_init_cache_qos(c); |
Dave Hansen | 0697694 | 2016-02-12 13:02:29 -0800 | [diff] [blame] | 1072 | setup_pku(c); |
Yinghai Lu | 3e0c373 | 2009-05-09 23:47:42 -0700 | [diff] [blame] | 1073 | |
| 1074 | /* |
Adam Buchbinder | 6a6256f | 2016-02-23 15:34:30 -0800 | [diff] [blame] | 1075 | * Clear/Set all flags overridden by options, need do it |
Yinghai Lu | 3e0c373 | 2009-05-09 23:47:42 -0700 | [diff] [blame] | 1076 | * before following smp all cpus cap AND. |
| 1077 | */ |
| 1078 | for (i = 0; i < NCAPINTS; i++) { |
| 1079 | c->x86_capability[i] &= ~cpu_caps_cleared[i]; |
| 1080 | c->x86_capability[i] |= cpu_caps_set[i]; |
| 1081 | } |
| 1082 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | /* |
| 1084 | * On SMP, boot_cpu_data holds the common feature set between |
| 1085 | * all CPUs; so make sure that we indicate which features are |
| 1086 | * common between the CPUs. The first time this routine gets |
| 1087 | * executed, c == &boot_cpu_data. |
| 1088 | */ |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 1089 | if (c != &boot_cpu_data) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | /* AND the already accumulated flags with these */ |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 1091 | for (i = 0; i < NCAPINTS; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; |
Borislav Petkov | 65fc985 | 2013-03-20 15:07:23 +0100 | [diff] [blame] | 1093 | |
| 1094 | /* OR, i.e. replicate the bug flags */ |
| 1095 | for (i = NCAPINTS; i < NCAPINTS + NBUGINTS; i++) |
| 1096 | c->x86_capability[i] |= boot_cpu_data.x86_capability[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1097 | } |
| 1098 | |
| 1099 | /* Init Machine Check Exception if available. */ |
Borislav Petkov | 5e09954 | 2009-10-16 12:31:32 +0200 | [diff] [blame] | 1100 | mcheck_cpu_init(c); |
Andi Kleen | 30d432d | 2008-01-30 13:33:16 +0100 | [diff] [blame] | 1101 | |
| 1102 | select_idle_routine(c); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1103 | |
Tejun Heo | de2d944 | 2011-01-23 14:37:41 +0100 | [diff] [blame] | 1104 | #ifdef CONFIG_NUMA |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1105 | numa_add_cpu(smp_processor_id()); |
| 1106 | #endif |
Thomas Gleixner | 1f12e32 | 2016-02-22 22:19:15 +0000 | [diff] [blame] | 1107 | /* The boot/hotplug time assigment got cleared, restore it */ |
| 1108 | c->logical_proc_id = topology_phys_to_logical_pkg(c->phys_proc_id); |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1109 | } |
Shaohua Li | 31ab269 | 2005-11-07 00:58:42 -0800 | [diff] [blame] | 1110 | |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1111 | /* |
| 1112 | * Set up the CPU state needed to execute SYSENTER/SYSEXIT instructions |
| 1113 | * on 32-bit kernels: |
| 1114 | */ |
Andy Lutomirski | cfda7bb | 2014-05-05 12:19:33 -0700 | [diff] [blame] | 1115 | #ifdef CONFIG_X86_32 |
| 1116 | void enable_sep_cpu(void) |
| 1117 | { |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1118 | struct tss_struct *tss; |
| 1119 | int cpu; |
Andy Lutomirski | cfda7bb | 2014-05-05 12:19:33 -0700 | [diff] [blame] | 1120 | |
Borislav Petkov | b3edfda | 2016-03-16 13:19:29 +0100 | [diff] [blame] | 1121 | if (!boot_cpu_has(X86_FEATURE_SEP)) |
| 1122 | return; |
| 1123 | |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1124 | cpu = get_cpu(); |
| 1125 | tss = &per_cpu(cpu_tss, cpu); |
| 1126 | |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1127 | /* |
Andy Lutomirski | cf9328c | 2015-04-02 12:41:45 -0700 | [diff] [blame] | 1128 | * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field -- |
| 1129 | * see the big comment in struct x86_hw_tss's definition. |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1130 | */ |
Andy Lutomirski | cfda7bb | 2014-05-05 12:19:33 -0700 | [diff] [blame] | 1131 | |
| 1132 | tss->x86_tss.ss1 = __KERNEL_CS; |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1133 | wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0); |
| 1134 | |
Andy Lutomirski | cf9328c | 2015-04-02 12:41:45 -0700 | [diff] [blame] | 1135 | wrmsr(MSR_IA32_SYSENTER_ESP, |
| 1136 | (unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack), |
| 1137 | 0); |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1138 | |
Ingo Molnar | 4c8cd0c | 2015-06-08 08:33:56 +0200 | [diff] [blame] | 1139 | wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0); |
Ingo Molnar | 8b6c0ab | 2015-03-16 10:32:20 +0100 | [diff] [blame] | 1140 | |
Andy Lutomirski | cfda7bb | 2014-05-05 12:19:33 -0700 | [diff] [blame] | 1141 | put_cpu(); |
| 1142 | } |
Glauber Costa | e04d645 | 2008-09-22 14:35:08 -0300 | [diff] [blame] | 1143 | #endif |
| 1144 | |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1145 | void __init identify_boot_cpu(void) |
| 1146 | { |
| 1147 | identify_cpu(&boot_cpu_data); |
Len Brown | 02c68a0 | 2011-04-01 16:59:53 -0400 | [diff] [blame] | 1148 | init_amd_e400_c1e_mask(); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1149 | #ifdef CONFIG_X86_32 |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1150 | sysenter_setup(); |
Li Shaohua | 6fe940d | 2005-06-25 14:54:53 -0700 | [diff] [blame] | 1151 | enable_sep_cpu(); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1152 | #endif |
Borislav Petkov | 5b55633 | 2012-08-06 19:00:37 +0200 | [diff] [blame] | 1153 | cpu_detect_tlb(&boot_cpu_data); |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1154 | } |
Shaohua Li | 3b520b2 | 2005-07-07 17:56:38 -0700 | [diff] [blame] | 1155 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1156 | void identify_secondary_cpu(struct cpuinfo_x86 *c) |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1157 | { |
| 1158 | BUG_ON(c == &boot_cpu_data); |
| 1159 | identify_cpu(c); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1160 | #ifdef CONFIG_X86_32 |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1161 | enable_sep_cpu(); |
Yinghai Lu | 102bbe3 | 2008-09-04 20:09:13 -0700 | [diff] [blame] | 1162 | #endif |
Jeremy Fitzhardinge | a6c4e07 | 2007-05-02 19:27:12 +0200 | [diff] [blame] | 1163 | mtrr_ap_init(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | } |
| 1165 | |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1166 | struct msr_range { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1167 | unsigned min; |
| 1168 | unsigned max; |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1169 | }; |
| 1170 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1171 | static const struct msr_range msr_range_array[] = { |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1172 | { 0x00000000, 0x00000418}, |
| 1173 | { 0xc0000000, 0xc000040b}, |
| 1174 | { 0xc0010000, 0xc0010142}, |
| 1175 | { 0xc0011000, 0xc001103b}, |
| 1176 | }; |
| 1177 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1178 | static void __print_cpu_msr(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1180 | unsigned index_min, index_max; |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1181 | unsigned index; |
| 1182 | u64 val; |
| 1183 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1184 | |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1185 | for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) { |
| 1186 | index_min = msr_range_array[i].min; |
| 1187 | index_max = msr_range_array[i].max; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1188 | |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1189 | for (index = index_min; index < index_max; index++) { |
Borislav Petkov | ecd431d | 2012-06-01 16:52:36 +0200 | [diff] [blame] | 1190 | if (rdmsrl_safe(index, &val)) |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1191 | continue; |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1192 | pr_info(" MSR%08x: %016llx\n", index, val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1193 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1194 | } |
| 1195 | } |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1196 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1197 | static int show_msr; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1198 | |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1199 | static __init int setup_show_msr(char *arg) |
| 1200 | { |
| 1201 | int num; |
| 1202 | |
| 1203 | get_option(&arg, &num); |
| 1204 | |
| 1205 | if (num > 0) |
| 1206 | show_msr = num; |
| 1207 | return 1; |
| 1208 | } |
| 1209 | __setup("show_msr=", setup_show_msr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1210 | |
Andi Kleen | 191679f | 2008-01-30 13:33:21 +0100 | [diff] [blame] | 1211 | static __init int setup_noclflush(char *arg) |
| 1212 | { |
H. Peter Anvin | 840d283 | 2014-02-27 08:31:30 -0800 | [diff] [blame] | 1213 | setup_clear_cpu_cap(X86_FEATURE_CLFLUSH); |
H. Peter Anvin | da4aaa7 | 2014-02-27 08:36:31 -0800 | [diff] [blame] | 1214 | setup_clear_cpu_cap(X86_FEATURE_CLFLUSHOPT); |
Andi Kleen | 191679f | 2008-01-30 13:33:21 +0100 | [diff] [blame] | 1215 | return 1; |
| 1216 | } |
| 1217 | __setup("noclflush", setup_noclflush); |
| 1218 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1219 | void print_cpu_info(struct cpuinfo_x86 *c) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | { |
Jan Beulich | 02dde8b | 2009-03-12 12:08:49 +0000 | [diff] [blame] | 1221 | const char *vendor = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1222 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1223 | if (c->x86_vendor < X86_VENDOR_NUM) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1224 | vendor = this_cpu->c_vendor; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1225 | } else { |
| 1226 | if (c->cpuid_level >= 0) |
| 1227 | vendor = c->x86_vendor_id; |
| 1228 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1229 | |
Yinghai Lu | bd32a8cf | 2008-09-19 18:41:16 -0700 | [diff] [blame] | 1230 | if (vendor && !strstr(c->x86_model_id, vendor)) |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1231 | pr_cont("%s ", vendor); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1232 | |
Yinghai Lu | 9d31d35 | 2008-09-04 21:09:44 +0200 | [diff] [blame] | 1233 | if (c->x86_model_id[0]) |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1234 | pr_cont("%s", c->x86_model_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1235 | else |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1236 | pr_cont("%d86", c->x86); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1238 | pr_cont(" (family: 0x%x, model: 0x%x", c->x86, c->x86_model); |
Borislav Petkov | 924e101 | 2012-09-14 18:37:46 +0200 | [diff] [blame] | 1239 | |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 1240 | if (c->x86_mask || c->cpuid_level >= 0) |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1241 | pr_cont(", stepping: 0x%x)\n", c->x86_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1242 | else |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1243 | pr_cont(")\n"); |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1244 | |
Yinghai Lu | 0b8b807 | 2012-03-22 21:31:43 -0700 | [diff] [blame] | 1245 | print_cpu_msr(c); |
Yinghai Lu | 21c3fcf | 2012-02-12 09:53:57 -0800 | [diff] [blame] | 1246 | } |
| 1247 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1248 | void print_cpu_msr(struct cpuinfo_x86 *c) |
Yinghai Lu | 21c3fcf | 2012-02-12 09:53:57 -0800 | [diff] [blame] | 1249 | { |
Yinghai Lu | a0854a4 | 2008-09-04 21:09:46 +0200 | [diff] [blame] | 1250 | if (c->cpu_index < show_msr) |
Yinghai Lu | 21c3fcf | 2012-02-12 09:53:57 -0800 | [diff] [blame] | 1251 | __print_cpu_msr(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | } |
| 1253 | |
Andi Kleen | ac72e78 | 2008-01-30 13:33:21 +0100 | [diff] [blame] | 1254 | static __init int setup_disablecpuid(char *arg) |
| 1255 | { |
| 1256 | int bit; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1257 | |
Andi Kleen | ac72e78 | 2008-01-30 13:33:21 +0100 | [diff] [blame] | 1258 | if (get_option(&arg, &bit) && bit < NCAPINTS*32) |
| 1259 | setup_clear_cpu_cap(bit); |
| 1260 | else |
| 1261 | return 0; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1262 | |
Andi Kleen | ac72e78 | 2008-01-30 13:33:21 +0100 | [diff] [blame] | 1263 | return 1; |
| 1264 | } |
| 1265 | __setup("clearcpuid=", setup_disablecpuid); |
| 1266 | |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1267 | #ifdef CONFIG_X86_64 |
Cyrill Gorcunov | 9ff80942 | 2009-07-08 22:03:53 +0400 | [diff] [blame] | 1268 | struct desc_ptr idt_descr = { NR_VECTORS * 16 - 1, (unsigned long) idt_table }; |
Seiji Aguchi | 629f4f9 | 2013-06-20 11:45:44 -0400 | [diff] [blame] | 1269 | struct desc_ptr debug_idt_descr = { NR_VECTORS * 16 - 1, |
| 1270 | (unsigned long) debug_idt_table }; |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1271 | |
Brian Gerst | 947e76c | 2009-01-19 12:21:28 +0900 | [diff] [blame] | 1272 | DEFINE_PER_CPU_FIRST(union irq_stack_union, |
Andi Kleen | 277d5b4 | 2013-08-05 15:02:43 -0700 | [diff] [blame] | 1273 | irq_stack_union) __aligned(PAGE_SIZE) __visible; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1274 | |
Tejun Heo | bdf977b | 2009-08-03 14:12:19 +0900 | [diff] [blame] | 1275 | /* |
Andy Lutomirski | a7fcf28 | 2015-03-06 17:50:19 -0800 | [diff] [blame] | 1276 | * The following percpu variables are hot. Align current_task to |
| 1277 | * cacheline size such that they fall in the same cacheline. |
Tejun Heo | bdf977b | 2009-08-03 14:12:19 +0900 | [diff] [blame] | 1278 | */ |
| 1279 | DEFINE_PER_CPU(struct task_struct *, current_task) ____cacheline_aligned = |
| 1280 | &init_task; |
| 1281 | EXPORT_PER_CPU_SYMBOL(current_task); |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1282 | |
Tejun Heo | bdf977b | 2009-08-03 14:12:19 +0900 | [diff] [blame] | 1283 | DEFINE_PER_CPU(char *, irq_stack_ptr) = |
| 1284 | init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64; |
| 1285 | |
Andi Kleen | 277d5b4 | 2013-08-05 15:02:43 -0700 | [diff] [blame] | 1286 | DEFINE_PER_CPU(unsigned int, irq_count) __visible = -1; |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1287 | |
Peter Zijlstra | c2daa3b | 2013-08-14 14:51:00 +0200 | [diff] [blame] | 1288 | DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT; |
| 1289 | EXPORT_PER_CPU_SYMBOL(__preempt_count); |
| 1290 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1291 | /* |
| 1292 | * Special IST stacks which the CPU switches to when it calls |
| 1293 | * an IST-marked descriptor entry. Up to 7 stacks (hardware |
| 1294 | * limit), all of them are 4K, except the debug stack which |
| 1295 | * is 8K. |
| 1296 | */ |
| 1297 | static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = { |
| 1298 | [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ, |
| 1299 | [DEBUG_STACK - 1] = DEBUG_STKSZ |
| 1300 | }; |
| 1301 | |
Brian Gerst | 92d65b2 | 2009-01-19 00:38:58 +0900 | [diff] [blame] | 1302 | static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks |
Tejun Heo | 3e352aa | 2009-08-03 14:10:11 +0900 | [diff] [blame] | 1303 | [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]); |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1304 | |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1305 | /* May not be marked __init: used by software suspend */ |
| 1306 | void syscall_init(void) |
| 1307 | { |
| 1308 | /* |
| 1309 | * LSTAR and STAR live in a bit strange symbiosis. |
| 1310 | * They both write to the same internal register. STAR allows to |
| 1311 | * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip. |
| 1312 | */ |
Borislav Petkov | 31ac34c | 2015-11-23 11:12:25 +0100 | [diff] [blame] | 1313 | wrmsr(MSR_STAR, 0, (__USER32_CS << 16) | __KERNEL_CS); |
Andy Lutomirski | 47edb65 | 2015-07-23 12:14:40 -0700 | [diff] [blame] | 1314 | wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64); |
Ingo Molnar | d56fe4b | 2015-03-24 14:41:37 +0100 | [diff] [blame] | 1315 | |
| 1316 | #ifdef CONFIG_IA32_EMULATION |
Andy Lutomirski | 47edb65 | 2015-07-23 12:14:40 -0700 | [diff] [blame] | 1317 | wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat); |
Denys Vlasenko | a76c7f4 | 2015-03-22 20:48:14 +0100 | [diff] [blame] | 1318 | /* |
Denys Vlasenko | 487d1ed | 2015-03-27 11:59:16 +0100 | [diff] [blame] | 1319 | * This only works on Intel CPUs. |
| 1320 | * On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP. |
| 1321 | * This does not cause SYSENTER to jump to the wrong location, because |
| 1322 | * AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit). |
Denys Vlasenko | a76c7f4 | 2015-03-22 20:48:14 +0100 | [diff] [blame] | 1323 | */ |
| 1324 | wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS); |
| 1325 | wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL); |
Ingo Molnar | 4c8cd0c | 2015-06-08 08:33:56 +0200 | [diff] [blame] | 1326 | wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat); |
Ingo Molnar | d56fe4b | 2015-03-24 14:41:37 +0100 | [diff] [blame] | 1327 | #else |
Andy Lutomirski | 47edb65 | 2015-07-23 12:14:40 -0700 | [diff] [blame] | 1328 | wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret); |
Borislav Petkov | 6b51311 | 2015-04-03 14:25:28 +0200 | [diff] [blame] | 1329 | wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG); |
Ingo Molnar | d56fe4b | 2015-03-24 14:41:37 +0100 | [diff] [blame] | 1330 | wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL); |
| 1331 | wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL); |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1332 | #endif |
| 1333 | |
| 1334 | /* Flags to clear on syscall */ |
| 1335 | wrmsrl(MSR_SYSCALL_MASK, |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 1336 | X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF| |
Andy Lutomirski | 8c7aa69 | 2014-10-01 11:49:04 -0700 | [diff] [blame] | 1337 | X86_EFLAGS_IOPL|X86_EFLAGS_AC|X86_EFLAGS_NT); |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1338 | } |
| 1339 | |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1340 | /* |
| 1341 | * Copies of the original ist values from the tss are only accessed during |
| 1342 | * debugging, no special alignment required. |
| 1343 | */ |
| 1344 | DEFINE_PER_CPU(struct orig_ist, orig_ist); |
| 1345 | |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1346 | static DEFINE_PER_CPU(unsigned long, debug_stack_addr); |
Steven Rostedt | 4218118 | 2011-12-16 11:43:02 -0500 | [diff] [blame] | 1347 | DEFINE_PER_CPU(int, debug_stack_usage); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1348 | |
| 1349 | int is_debug_stack(unsigned long addr) |
| 1350 | { |
Christoph Lameter | 89cbc76 | 2014-08-17 12:30:40 -0500 | [diff] [blame] | 1351 | return __this_cpu_read(debug_stack_usage) || |
| 1352 | (addr <= __this_cpu_read(debug_stack_addr) && |
| 1353 | addr > (__this_cpu_read(debug_stack_addr) - DEBUG_STKSZ)); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1354 | } |
Masami Hiramatsu | 0f46efeb | 2014-04-17 17:17:12 +0900 | [diff] [blame] | 1355 | NOKPROBE_SYMBOL(is_debug_stack); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1356 | |
Seiji Aguchi | 629f4f9 | 2013-06-20 11:45:44 -0400 | [diff] [blame] | 1357 | DEFINE_PER_CPU(u32, debug_idt_ctr); |
Steven Rostedt | f898817 | 2012-05-30 11:47:00 -0400 | [diff] [blame] | 1358 | |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1359 | void debug_stack_set_zero(void) |
| 1360 | { |
Seiji Aguchi | 629f4f9 | 2013-06-20 11:45:44 -0400 | [diff] [blame] | 1361 | this_cpu_inc(debug_idt_ctr); |
| 1362 | load_current_idt(); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1363 | } |
Masami Hiramatsu | 0f46efeb | 2014-04-17 17:17:12 +0900 | [diff] [blame] | 1364 | NOKPROBE_SYMBOL(debug_stack_set_zero); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1365 | |
| 1366 | void debug_stack_reset(void) |
| 1367 | { |
Seiji Aguchi | 629f4f9 | 2013-06-20 11:45:44 -0400 | [diff] [blame] | 1368 | if (WARN_ON(!this_cpu_read(debug_idt_ctr))) |
Steven Rostedt | f898817 | 2012-05-30 11:47:00 -0400 | [diff] [blame] | 1369 | return; |
Seiji Aguchi | 629f4f9 | 2013-06-20 11:45:44 -0400 | [diff] [blame] | 1370 | if (this_cpu_dec_return(debug_idt_ctr) == 0) |
| 1371 | load_current_idt(); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1372 | } |
Masami Hiramatsu | 0f46efeb | 2014-04-17 17:17:12 +0900 | [diff] [blame] | 1373 | NOKPROBE_SYMBOL(debug_stack_reset); |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1374 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1375 | #else /* CONFIG_X86_64 */ |
Yinghai Lu | d5494d4 | 2008-09-04 20:09:03 -0700 | [diff] [blame] | 1376 | |
Tejun Heo | bdf977b | 2009-08-03 14:12:19 +0900 | [diff] [blame] | 1377 | DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; |
| 1378 | EXPORT_PER_CPU_SYMBOL(current_task); |
Peter Zijlstra | c2daa3b | 2013-08-14 14:51:00 +0200 | [diff] [blame] | 1379 | DEFINE_PER_CPU(int, __preempt_count) = INIT_PREEMPT_COUNT; |
| 1380 | EXPORT_PER_CPU_SYMBOL(__preempt_count); |
Tejun Heo | bdf977b | 2009-08-03 14:12:19 +0900 | [diff] [blame] | 1381 | |
Andy Lutomirski | a7fcf28 | 2015-03-06 17:50:19 -0800 | [diff] [blame] | 1382 | /* |
| 1383 | * On x86_32, vm86 modifies tss.sp0, so sp0 isn't a reliable way to find |
| 1384 | * the top of the kernel stack. Use an extra percpu variable to track the |
| 1385 | * top of the kernel stack directly. |
| 1386 | */ |
| 1387 | DEFINE_PER_CPU(unsigned long, cpu_current_top_of_stack) = |
| 1388 | (unsigned long)&init_thread_union + THREAD_SIZE; |
| 1389 | EXPORT_PER_CPU_SYMBOL(cpu_current_top_of_stack); |
| 1390 | |
Tejun Heo | 60a5317 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 1391 | #ifdef CONFIG_CC_STACKPROTECTOR |
Jeremy Fitzhardinge | 53f8245 | 2009-09-03 14:31:44 -0700 | [diff] [blame] | 1392 | DEFINE_PER_CPU_ALIGNED(struct stack_canary, stack_canary); |
Tejun Heo | 60a5317 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 1393 | #endif |
| 1394 | |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1395 | #endif /* CONFIG_X86_64 */ |
Jeremy Fitzhardinge | c5413fb | 2007-05-02 19:27:16 +0200 | [diff] [blame] | 1396 | |
Rusty Russell | d2cbcc4 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 1397 | /* |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 1398 | * Clear all 6 debug registers: |
| 1399 | */ |
| 1400 | static void clear_all_debug_regs(void) |
| 1401 | { |
| 1402 | int i; |
| 1403 | |
| 1404 | for (i = 0; i < 8; i++) { |
| 1405 | /* Ignore db4, db5 */ |
| 1406 | if ((i == 4) || (i == 5)) |
| 1407 | continue; |
| 1408 | |
| 1409 | set_debugreg(0, i); |
| 1410 | } |
| 1411 | } |
Jeremy Fitzhardinge | f95d47c | 2006-12-07 02:14:02 +0100 | [diff] [blame] | 1412 | |
Jason Wessel | 0bb9fef | 2010-05-20 21:04:30 -0500 | [diff] [blame] | 1413 | #ifdef CONFIG_KGDB |
| 1414 | /* |
| 1415 | * Restore debug regs if using kgdbwait and you have a kernel debugger |
| 1416 | * connection established. |
| 1417 | */ |
| 1418 | static void dbg_restore_debug_regs(void) |
| 1419 | { |
| 1420 | if (unlikely(kgdb_connected && arch_kgdb_ops.correct_hw_break)) |
| 1421 | arch_kgdb_ops.correct_hw_break(); |
| 1422 | } |
| 1423 | #else /* ! CONFIG_KGDB */ |
| 1424 | #define dbg_restore_debug_regs() |
| 1425 | #endif /* ! CONFIG_KGDB */ |
| 1426 | |
Igor Mammedov | ce4b1b1 | 2014-06-20 14:23:11 +0200 | [diff] [blame] | 1427 | static void wait_for_master_cpu(int cpu) |
| 1428 | { |
| 1429 | #ifdef CONFIG_SMP |
| 1430 | /* |
| 1431 | * wait for ACK from master CPU before continuing |
| 1432 | * with AP initialization |
| 1433 | */ |
| 1434 | WARN_ON(cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)); |
| 1435 | while (!cpumask_test_cpu(cpu, cpu_callout_mask)) |
| 1436 | cpu_relax(); |
| 1437 | #endif |
| 1438 | } |
| 1439 | |
Rusty Russell | d2cbcc4 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 1440 | /* |
| 1441 | * cpu_init() initializes state that is per-CPU. Some data is already |
| 1442 | * initialized (naturally) in the bootstrap process, such as the GDT |
| 1443 | * and IDT. We reload them nevertheless, this function acts as a |
| 1444 | * 'CPU state barrier', nothing should get across. |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1445 | * A lot of state is already set up in PDA init for 64 bit |
Rusty Russell | d2cbcc4 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 1446 | */ |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1447 | #ifdef CONFIG_X86_64 |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1448 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1449 | void cpu_init(void) |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1450 | { |
Tejun Heo | 0fe1e00 | 2009-10-29 22:34:14 +0900 | [diff] [blame] | 1451 | struct orig_ist *oist; |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1452 | struct task_struct *me; |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1453 | struct tss_struct *t; |
| 1454 | unsigned long v; |
Andy Lutomirski | fb59831 | 2016-07-14 13:22:58 -0700 | [diff] [blame] | 1455 | int cpu = raw_smp_processor_id(); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1456 | int i; |
| 1457 | |
Igor Mammedov | ce4b1b1 | 2014-06-20 14:23:11 +0200 | [diff] [blame] | 1458 | wait_for_master_cpu(cpu); |
| 1459 | |
Fenghua Yu | e6ebf5d | 2012-12-20 23:44:24 -0800 | [diff] [blame] | 1460 | /* |
Andy Lutomirski | 1e02ce4 | 2014-10-24 15:58:08 -0700 | [diff] [blame] | 1461 | * Initialize the CR4 shadow before doing anything that could |
| 1462 | * try to read it. |
| 1463 | */ |
| 1464 | cr4_init_shadow(); |
| 1465 | |
| 1466 | /* |
Fenghua Yu | e6ebf5d | 2012-12-20 23:44:24 -0800 | [diff] [blame] | 1467 | * Load microcode on this cpu if a valid microcode is available. |
| 1468 | * This is early microcode loading procedure. |
| 1469 | */ |
| 1470 | load_ucode_ap(); |
| 1471 | |
Andy Lutomirski | 24933b8 | 2015-03-05 19:19:05 -0800 | [diff] [blame] | 1472 | t = &per_cpu(cpu_tss, cpu); |
Tejun Heo | 0fe1e00 | 2009-10-29 22:34:14 +0900 | [diff] [blame] | 1473 | oist = &per_cpu(orig_ist, cpu); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1474 | |
Brian Gerst | e7a22c1 | 2009-01-19 00:38:59 +0900 | [diff] [blame] | 1475 | #ifdef CONFIG_NUMA |
Fenghua Yu | 27fd185 | 2012-11-13 11:32:47 -0800 | [diff] [blame] | 1476 | if (this_cpu_read(numa_node) == 0 && |
Lee Schermerhorn | e534c7c | 2010-05-26 14:44:58 -0700 | [diff] [blame] | 1477 | early_cpu_to_node(cpu) != NUMA_NO_NODE) |
| 1478 | set_numa_node(early_cpu_to_node(cpu)); |
Brian Gerst | e7a22c1 | 2009-01-19 00:38:59 +0900 | [diff] [blame] | 1479 | #endif |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1480 | |
| 1481 | me = current; |
| 1482 | |
Mike Travis | 2eaad1f | 2009-12-10 17:19:36 -0800 | [diff] [blame] | 1483 | pr_debug("Initializing CPU#%d\n", cpu); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1484 | |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 1485 | cr4_clear_bits(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1486 | |
| 1487 | /* |
| 1488 | * Initialize the per-CPU GDT with the boot GDT, |
| 1489 | * and set up the GDT descriptor: |
| 1490 | */ |
| 1491 | |
Brian Gerst | 552be87 | 2009-01-30 17:47:53 +0900 | [diff] [blame] | 1492 | switch_to_new_gdt(cpu); |
Brian Gerst | 2697fbd | 2009-01-27 12:56:48 +0900 | [diff] [blame] | 1493 | loadsegment(fs, 0); |
| 1494 | |
Seiji Aguchi | cf910e8 | 2013-06-20 11:46:53 -0400 | [diff] [blame] | 1495 | load_current_idt(); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1496 | |
| 1497 | memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); |
| 1498 | syscall_init(); |
| 1499 | |
| 1500 | wrmsrl(MSR_FS_BASE, 0); |
| 1501 | wrmsrl(MSR_KERNEL_GS_BASE, 0); |
| 1502 | barrier(); |
| 1503 | |
H. Peter Anvin | 4763ed4 | 2009-11-13 15:28:16 -0800 | [diff] [blame] | 1504 | x86_configure_nx(); |
Thomas Gleixner | 659006b | 2015-01-15 21:22:26 +0000 | [diff] [blame] | 1505 | x2apic_setup(); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1506 | |
| 1507 | /* |
| 1508 | * set up and load the per-CPU TSS |
| 1509 | */ |
Tejun Heo | 0fe1e00 | 2009-10-29 22:34:14 +0900 | [diff] [blame] | 1510 | if (!oist->ist[0]) { |
Brian Gerst | 92d65b2 | 2009-01-19 00:38:58 +0900 | [diff] [blame] | 1511 | char *estacks = per_cpu(exception_stacks, cpu); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1512 | |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1513 | for (v = 0; v < N_EXCEPTION_STACKS; v++) { |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1514 | estacks += exception_stack_sizes[v]; |
Tejun Heo | 0fe1e00 | 2009-10-29 22:34:14 +0900 | [diff] [blame] | 1515 | oist->ist[v] = t->x86_tss.ist[v] = |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1516 | (unsigned long)estacks; |
Steven Rostedt | 228bdaa | 2011-12-09 03:02:19 -0500 | [diff] [blame] | 1517 | if (v == DEBUG_STACK-1) |
| 1518 | per_cpu(debug_stack_addr, cpu) = (unsigned long)estacks; |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1519 | } |
| 1520 | } |
| 1521 | |
| 1522 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
Ingo Molnar | 0f3fa48 | 2009-03-14 08:46:17 +0100 | [diff] [blame] | 1523 | |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1524 | /* |
| 1525 | * <= is required because the CPU will access up to |
| 1526 | * 8 bits beyond the end of the IO permission bitmap. |
| 1527 | */ |
| 1528 | for (i = 0; i <= IO_BITMAP_LONGS; i++) |
| 1529 | t->io_bitmap[i] = ~0UL; |
| 1530 | |
| 1531 | atomic_inc(&init_mm.mm_count); |
| 1532 | me->active_mm = &init_mm; |
Stoyan Gaydarov | 8c5dfd2 | 2009-03-10 00:10:32 -0500 | [diff] [blame] | 1533 | BUG_ON(me->mm); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1534 | enter_lazy_tlb(&init_mm, me); |
| 1535 | |
| 1536 | load_sp0(t, ¤t->thread); |
| 1537 | set_tss_desc(cpu, t); |
| 1538 | load_TR_desc(); |
Andy Lutomirski | 37868fe | 2015-07-30 14:31:32 -0700 | [diff] [blame] | 1539 | load_mm_ldt(&init_mm); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1540 | |
Jason Wessel | 0bb9fef | 2010-05-20 21:04:30 -0500 | [diff] [blame] | 1541 | clear_all_debug_regs(); |
| 1542 | dbg_restore_debug_regs(); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1543 | |
Ingo Molnar | 21c4cd1 | 2015-04-26 14:27:17 +0200 | [diff] [blame] | 1544 | fpu__init_cpu(); |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1545 | |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1546 | if (is_uv_system()) |
| 1547 | uv_cpu_init(); |
| 1548 | } |
| 1549 | |
| 1550 | #else |
| 1551 | |
Paul Gortmaker | 148f9bb | 2013-06-18 18:23:59 -0400 | [diff] [blame] | 1552 | void cpu_init(void) |
James Bottomley | 9ee79a3 | 2007-01-22 09:18:31 -0600 | [diff] [blame] | 1553 | { |
Rusty Russell | d2cbcc4 | 2007-05-02 19:27:10 +0200 | [diff] [blame] | 1554 | int cpu = smp_processor_id(); |
| 1555 | struct task_struct *curr = current; |
Andy Lutomirski | 24933b8 | 2015-03-05 19:19:05 -0800 | [diff] [blame] | 1556 | struct tss_struct *t = &per_cpu(cpu_tss, cpu); |
James Bottomley | 9ee79a3 | 2007-01-22 09:18:31 -0600 | [diff] [blame] | 1557 | struct thread_struct *thread = &curr->thread; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | |
Igor Mammedov | ce4b1b1 | 2014-06-20 14:23:11 +0200 | [diff] [blame] | 1559 | wait_for_master_cpu(cpu); |
Fenghua Yu | e6ebf5d | 2012-12-20 23:44:24 -0800 | [diff] [blame] | 1560 | |
Steven Rostedt | 5b2bdbc | 2015-02-27 14:50:19 -0500 | [diff] [blame] | 1561 | /* |
| 1562 | * Initialize the CR4 shadow before doing anything that could |
| 1563 | * try to read it. |
| 1564 | */ |
| 1565 | cr4_init_shadow(); |
| 1566 | |
Igor Mammedov | ce4b1b1 | 2014-06-20 14:23:11 +0200 | [diff] [blame] | 1567 | show_ucode_info_early(); |
Jeremy Fitzhardinge | 6211119 | 2006-12-07 02:14:02 +0100 | [diff] [blame] | 1568 | |
Chen Yucong | 1b74dde | 2016-02-02 11:45:02 +0800 | [diff] [blame] | 1569 | pr_info("Initializing CPU#%d\n", cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | |
Borislav Petkov | 362f924 | 2015-12-07 10:39:41 +0100 | [diff] [blame] | 1571 | if (cpu_feature_enabled(X86_FEATURE_VME) || |
Borislav Petkov | 59e21e3 | 2016-04-04 22:24:59 +0200 | [diff] [blame] | 1572 | boot_cpu_has(X86_FEATURE_TSC) || |
Borislav Petkov | 362f924 | 2015-12-07 10:39:41 +0100 | [diff] [blame] | 1573 | boot_cpu_has(X86_FEATURE_DE)) |
Andy Lutomirski | 375074c | 2014-10-24 15:58:07 -0700 | [diff] [blame] | 1574 | cr4_clear_bits(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1575 | |
Seiji Aguchi | cf910e8 | 2013-06-20 11:46:53 -0400 | [diff] [blame] | 1576 | load_current_idt(); |
Brian Gerst | 552be87 | 2009-01-30 17:47:53 +0900 | [diff] [blame] | 1577 | switch_to_new_gdt(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1578 | |
| 1579 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1580 | * Set up and load the per-CPU TSS and LDT |
| 1581 | */ |
| 1582 | atomic_inc(&init_mm.mm_count); |
Jeremy Fitzhardinge | 6211119 | 2006-12-07 02:14:02 +0100 | [diff] [blame] | 1583 | curr->active_mm = &init_mm; |
Stoyan Gaydarov | 8c5dfd2 | 2009-03-10 00:10:32 -0500 | [diff] [blame] | 1584 | BUG_ON(curr->mm); |
Jeremy Fitzhardinge | 6211119 | 2006-12-07 02:14:02 +0100 | [diff] [blame] | 1585 | enter_lazy_tlb(&init_mm, curr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1586 | |
H. Peter Anvin | faca622 | 2008-01-30 13:31:02 +0100 | [diff] [blame] | 1587 | load_sp0(t, thread); |
Paolo Ciarrocchi | 34048c9 | 2008-02-24 11:58:13 +0100 | [diff] [blame] | 1588 | set_tss_desc(cpu, t); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1589 | load_TR_desc(); |
Andy Lutomirski | 37868fe | 2015-07-30 14:31:32 -0700 | [diff] [blame] | 1590 | load_mm_ldt(&init_mm); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1591 | |
Thomas Gleixner | f9a196b | 2009-05-01 20:59:25 +0200 | [diff] [blame] | 1592 | t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
| 1593 | |
Matt Mackall | 22c4e30 | 2006-01-08 01:05:24 -0800 | [diff] [blame] | 1594 | #ifdef CONFIG_DOUBLEFAULT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1595 | /* Set up doublefault TSS pointer in the GDT */ |
| 1596 | __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss); |
Matt Mackall | 22c4e30 | 2006-01-08 01:05:24 -0800 | [diff] [blame] | 1597 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1598 | |
Jaswinder Singh Rajput | 9766cdb | 2009-03-14 11:19:49 +0530 | [diff] [blame] | 1599 | clear_all_debug_regs(); |
Jason Wessel | 0bb9fef | 2010-05-20 21:04:30 -0500 | [diff] [blame] | 1600 | dbg_restore_debug_regs(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | |
Ingo Molnar | 21c4cd1 | 2015-04-26 14:27:17 +0200 | [diff] [blame] | 1602 | fpu__init_cpu(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1603 | } |
Yinghai Lu | 1ba7658 | 2008-09-04 20:09:04 -0700 | [diff] [blame] | 1604 | #endif |
Borislav Petkov | 5700f74 | 2013-06-09 12:07:32 +0200 | [diff] [blame] | 1605 | |
Laura Abbott | b51ef52 | 2015-07-20 14:47:58 -0700 | [diff] [blame] | 1606 | static void bsp_resume(void) |
| 1607 | { |
| 1608 | if (this_cpu->c_bsp_resume) |
| 1609 | this_cpu->c_bsp_resume(&boot_cpu_data); |
| 1610 | } |
| 1611 | |
| 1612 | static struct syscore_ops cpu_syscore_ops = { |
| 1613 | .resume = bsp_resume, |
| 1614 | }; |
| 1615 | |
| 1616 | static int __init init_cpu_syscore(void) |
| 1617 | { |
| 1618 | register_syscore_ops(&cpu_syscore_ops); |
| 1619 | return 0; |
| 1620 | } |
| 1621 | core_initcall(init_cpu_syscore); |