blob: 2edb39342a02a8d6397c9f9cef9ccdcd95f6e656 [file] [log] [blame]
Mike Turquette9d9f78e2012-03-15 23:11:20 -07001/*
2 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
3 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Fixed rate clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/module.h>
14#include <linux/slab.h>
15#include <linux/io.h>
16#include <linux/err.h>
Grant Likely015ba402012-04-07 21:39:39 -050017#include <linux/of.h>
Mike Turquette9d9f78e2012-03-15 23:11:20 -070018
19/*
20 * DOC: basic fixed-rate clock that cannot gate
21 *
22 * Traits of this clock:
23 * prepare - clk_(un)prepare only ensures parents are prepared
24 * enable - clk_enable only ensures parents are enabled
25 * rate - rate is always a fixed value. No clk_set_rate support
26 * parent - fixed parent. No clk_set_parent support
27 */
28
Mike Turquette9d9f78e2012-03-15 23:11:20 -070029static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
30 unsigned long parent_rate)
31{
32 return to_clk_fixed_rate(hw)->fixed_rate;
33}
Mike Turquette9d9f78e2012-03-15 23:11:20 -070034
Boris BREZILLON0903ea62013-12-21 10:34:48 +010035static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
36 unsigned long parent_accuracy)
37{
38 return to_clk_fixed_rate(hw)->fixed_accuracy;
39}
40
Shawn Guo822c2502012-03-27 15:23:22 +080041const struct clk_ops clk_fixed_rate_ops = {
Mike Turquette9d9f78e2012-03-15 23:11:20 -070042 .recalc_rate = clk_fixed_rate_recalc_rate,
Boris BREZILLON0903ea62013-12-21 10:34:48 +010043 .recalc_accuracy = clk_fixed_rate_recalc_accuracy,
Mike Turquette9d9f78e2012-03-15 23:11:20 -070044};
45EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
46
Mike Turquette27d54592012-03-26 17:51:03 -070047/**
Stephen Boyd26ef56b2016-02-07 00:34:13 -080048 * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with
49 * the clock framework
Mike Turquette27d54592012-03-26 17:51:03 -070050 * @dev: device that is registering this clock
51 * @name: name of this clock
52 * @parent_name: name of clock's parent
53 * @flags: framework-specific flags
54 * @fixed_rate: non-adjustable clock rate
Boris BREZILLON0903ea62013-12-21 10:34:48 +010055 * @fixed_accuracy: non-adjustable clock rate
Mike Turquette27d54592012-03-26 17:51:03 -070056 */
Stephen Boyd26ef56b2016-02-07 00:34:13 -080057struct clk_hw *clk_hw_register_fixed_rate_with_accuracy(struct device *dev,
Boris BREZILLON0903ea62013-12-21 10:34:48 +010058 const char *name, const char *parent_name, unsigned long flags,
59 unsigned long fixed_rate, unsigned long fixed_accuracy)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070060{
61 struct clk_fixed_rate *fixed;
Stephen Boyd26ef56b2016-02-07 00:34:13 -080062 struct clk_hw *hw;
Saravana Kannan0197b3e2012-04-25 22:58:56 -070063 struct clk_init_data init;
Stephen Boyd26ef56b2016-02-07 00:34:13 -080064 int ret;
Mike Turquette9d9f78e2012-03-15 23:11:20 -070065
Mike Turquette27d54592012-03-26 17:51:03 -070066 /* allocate fixed-rate clock */
Stephen Boydd122db72015-05-14 16:47:10 -070067 fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
68 if (!fixed)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070069 return ERR_PTR(-ENOMEM);
Mike Turquette9d9f78e2012-03-15 23:11:20 -070070
Saravana Kannan0197b3e2012-04-25 22:58:56 -070071 init.name = name;
72 init.ops = &clk_fixed_rate_ops;
Rajendra Nayakf7d8caa2012-06-01 14:02:47 +053073 init.flags = flags | CLK_IS_BASIC;
Saravana Kannan0197b3e2012-04-25 22:58:56 -070074 init.parent_names = (parent_name ? &parent_name: NULL);
75 init.num_parents = (parent_name ? 1 : 0);
76
Mike Turquette9d9f78e2012-03-15 23:11:20 -070077 /* struct clk_fixed_rate assignments */
78 fixed->fixed_rate = fixed_rate;
Boris BREZILLON0903ea62013-12-21 10:34:48 +010079 fixed->fixed_accuracy = fixed_accuracy;
Saravana Kannan0197b3e2012-04-25 22:58:56 -070080 fixed->hw.init = &init;
Mike Turquette9d9f78e2012-03-15 23:11:20 -070081
Mike Turquette27d54592012-03-26 17:51:03 -070082 /* register the clock */
Stephen Boyd26ef56b2016-02-07 00:34:13 -080083 hw = &fixed->hw;
84 ret = clk_hw_register(dev, hw);
85 if (ret) {
Mike Turquette27d54592012-03-26 17:51:03 -070086 kfree(fixed);
Stephen Boyd26ef56b2016-02-07 00:34:13 -080087 hw = ERR_PTR(ret);
88 }
Mike Turquette27d54592012-03-26 17:51:03 -070089
Stephen Boyd26ef56b2016-02-07 00:34:13 -080090 return hw;
91}
92EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate_with_accuracy);
93
94struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
95 const char *name, const char *parent_name, unsigned long flags,
96 unsigned long fixed_rate, unsigned long fixed_accuracy)
97{
98 struct clk_hw *hw;
99
100 hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
101 flags, fixed_rate, fixed_accuracy);
102 if (IS_ERR(hw))
103 return ERR_CAST(hw);
104 return hw->clk;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700105}
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100106EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
107
108/**
Stephen Boyd26ef56b2016-02-07 00:34:13 -0800109 * clk_hw_register_fixed_rate - register fixed-rate clock with the clock
110 * framework
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100111 * @dev: device that is registering this clock
112 * @name: name of this clock
113 * @parent_name: name of clock's parent
114 * @flags: framework-specific flags
115 * @fixed_rate: non-adjustable clock rate
116 */
Stephen Boyd26ef56b2016-02-07 00:34:13 -0800117struct clk_hw *clk_hw_register_fixed_rate(struct device *dev, const char *name,
118 const char *parent_name, unsigned long flags,
119 unsigned long fixed_rate)
120{
121 return clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
122 flags, fixed_rate, 0);
123}
124EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate);
125
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100126struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
127 const char *parent_name, unsigned long flags,
128 unsigned long fixed_rate)
129{
130 return clk_register_fixed_rate_with_accuracy(dev, name, parent_name,
131 flags, fixed_rate, 0);
132}
Stephen Boyd389ae052013-07-24 17:43:29 -0700133EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
Grant Likely015ba402012-04-07 21:39:39 -0500134
Masahiro Yamada0b225e42016-01-06 13:25:10 +0900135void clk_unregister_fixed_rate(struct clk *clk)
136{
137 struct clk_hw *hw;
138
139 hw = __clk_get_hw(clk);
140 if (!hw)
141 return;
142
143 clk_unregister(clk);
144 kfree(to_clk_fixed_rate(hw));
145}
146EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
147
Masahiro Yamada52445632016-05-22 14:33:35 +0900148void clk_hw_unregister_fixed_rate(struct clk_hw *hw)
149{
150 struct clk_fixed_rate *fixed;
151
152 fixed = to_clk_fixed_rate(hw);
153
154 clk_hw_unregister(hw);
155 kfree(fixed);
156}
157EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate);
158
Grant Likely015ba402012-04-07 21:39:39 -0500159#ifdef CONFIG_OF
160/**
161 * of_fixed_clk_setup() - Setup function for simple fixed rate clock
162 */
Denis Efremove4eda8e2013-01-06 18:21:43 +0400163void of_fixed_clk_setup(struct device_node *node)
Grant Likely015ba402012-04-07 21:39:39 -0500164{
165 struct clk *clk;
166 const char *clk_name = node->name;
167 u32 rate;
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100168 u32 accuracy = 0;
Grant Likely015ba402012-04-07 21:39:39 -0500169
170 if (of_property_read_u32(node, "clock-frequency", &rate))
171 return;
172
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100173 of_property_read_u32(node, "clock-accuracy", &accuracy);
174
Grant Likely015ba402012-04-07 21:39:39 -0500175 of_property_read_string(node, "clock-output-names", &clk_name);
176
Boris BREZILLON0903ea62013-12-21 10:34:48 +0100177 clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
Stephen Boydd3781a72016-03-01 11:00:12 -0800178 0, rate, accuracy);
Wei Yongjuncdfed3b2012-09-21 14:35:18 +0800179 if (!IS_ERR(clk))
Grant Likely015ba402012-04-07 21:39:39 -0500180 of_clk_add_provider(node, of_clk_src_simple_get, clk);
181}
182EXPORT_SYMBOL_GPL(of_fixed_clk_setup);
Prashant Gaikwadf2f6c252013-01-04 12:30:52 +0530183CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
Grant Likely015ba402012-04-07 21:39:39 -0500184#endif