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Soren Brinkmann1459c832013-09-21 16:40:39 -07001/*
2 * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO
3 *
4 * Copyright (C) 2010, 2011 Ericsson AB.
5 * Copyright (C) 2011 Guenter Roeck.
6 * Copyright (C) 2011 - 2013 Xilinx Inc.
7 *
8 * Author: Guenter Roeck <guenter.roeck@ericsson.com>
9 * Sören Brinkmann <soren.brinkmann@xilinx.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 */
21
Stephen Boyd530b5442015-05-01 16:09:33 -070022#include <linux/clk.h>
Soren Brinkmann1459c832013-09-21 16:40:39 -070023#include <linux/clk-provider.h>
24#include <linux/delay.h>
25#include <linux/module.h>
26#include <linux/i2c.h>
27#include <linux/regmap.h>
28#include <linux/slab.h>
29
30/* Si570 registers */
31#define SI570_REG_HS_N1 7
32#define SI570_REG_N1_RFREQ0 8
33#define SI570_REG_RFREQ1 9
34#define SI570_REG_RFREQ2 10
35#define SI570_REG_RFREQ3 11
36#define SI570_REG_RFREQ4 12
37#define SI570_REG_CONTROL 135
38#define SI570_REG_FREEZE_DCO 137
39#define SI570_DIV_OFFSET_7PPM 6
40
41#define HS_DIV_SHIFT 5
42#define HS_DIV_MASK 0xe0
43#define HS_DIV_OFFSET 4
44#define N1_6_2_MASK 0x1f
45#define N1_1_0_MASK 0xc0
46#define RFREQ_37_32_MASK 0x3f
47
48#define SI570_MIN_FREQ 10000000L
49#define SI570_MAX_FREQ 1417500000L
50#define SI598_MAX_FREQ 525000000L
51
52#define FDCO_MIN 4850000000LL
53#define FDCO_MAX 5670000000LL
54
55#define SI570_CNTRL_RECALL (1 << 0)
56#define SI570_CNTRL_FREEZE_M (1 << 5)
57#define SI570_CNTRL_NEWFREQ (1 << 6)
58
59#define SI570_FREEZE_DCO (1 << 4)
60
61/**
62 * struct clk_si570:
63 * @hw: Clock hw struct
64 * @regmap: Device's regmap
65 * @div_offset: Rgister offset for dividers
66 * @max_freq: Maximum frequency for this device
67 * @fxtal: Factory xtal frequency
68 * @n1: Clock divider N1
69 * @hs_div: Clock divider HSDIV
70 * @rfreq: Clock multiplier RFREQ
71 * @frequency: Current output frequency
72 * @i2c_client: I2C client pointer
73 */
74struct clk_si570 {
75 struct clk_hw hw;
76 struct regmap *regmap;
77 unsigned int div_offset;
78 u64 max_freq;
79 u64 fxtal;
80 unsigned int n1;
81 unsigned int hs_div;
82 u64 rfreq;
83 u64 frequency;
84 struct i2c_client *i2c_client;
85};
86#define to_clk_si570(_hw) container_of(_hw, struct clk_si570, hw)
87
88enum clk_si570_variant {
89 si57x,
90 si59x
91};
92
93/**
94 * si570_get_divs() - Read clock dividers from HW
95 * @data: Pointer to struct clk_si570
96 * @rfreq: Fractional multiplier (output)
97 * @n1: Divider N1 (output)
98 * @hs_div: Divider HSDIV (output)
99 * Returns 0 on success, negative errno otherwise.
100 *
101 * Retrieve clock dividers and multipliers from the HW.
102 */
103static int si570_get_divs(struct clk_si570 *data, u64 *rfreq,
104 unsigned int *n1, unsigned int *hs_div)
105{
106 int err;
107 u8 reg[6];
108 u64 tmp;
109
110 err = regmap_bulk_read(data->regmap, SI570_REG_HS_N1 + data->div_offset,
111 reg, ARRAY_SIZE(reg));
112 if (err)
113 return err;
114
115 *hs_div = ((reg[0] & HS_DIV_MASK) >> HS_DIV_SHIFT) + HS_DIV_OFFSET;
116 *n1 = ((reg[0] & N1_6_2_MASK) << 2) + ((reg[1] & N1_1_0_MASK) >> 6) + 1;
117 /* Handle invalid cases */
118 if (*n1 > 1)
119 *n1 &= ~1;
120
121 tmp = reg[1] & RFREQ_37_32_MASK;
122 tmp = (tmp << 8) + reg[2];
123 tmp = (tmp << 8) + reg[3];
124 tmp = (tmp << 8) + reg[4];
125 tmp = (tmp << 8) + reg[5];
126 *rfreq = tmp;
127
128 return 0;
129}
130
131/**
132 * si570_get_defaults() - Get default values
133 * @data: Driver data structure
134 * @fout: Factory frequency output
135 * Returns 0 on success, negative errno otherwise.
136 */
137static int si570_get_defaults(struct clk_si570 *data, u64 fout)
138{
139 int err;
140 u64 fdco;
141
142 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_RECALL);
143
144 err = si570_get_divs(data, &data->rfreq, &data->n1, &data->hs_div);
145 if (err)
146 return err;
147
148 /*
149 * Accept optional precision loss to avoid arithmetic overflows.
150 * Acceptable per Silicon Labs Application Note AN334.
151 */
152 fdco = fout * data->n1 * data->hs_div;
153 if (fdco >= (1LL << 36))
154 data->fxtal = div64_u64(fdco << 24, data->rfreq >> 4);
155 else
156 data->fxtal = div64_u64(fdco << 28, data->rfreq);
157
158 data->frequency = fout;
159
160 return 0;
161}
162
163/**
164 * si570_update_rfreq() - Update clock multiplier
165 * @data: Driver data structure
166 * Passes on regmap_bulk_write() return value.
167 */
168static int si570_update_rfreq(struct clk_si570 *data)
169{
170 u8 reg[5];
171
172 reg[0] = ((data->n1 - 1) << 6) |
173 ((data->rfreq >> 32) & RFREQ_37_32_MASK);
174 reg[1] = (data->rfreq >> 24) & 0xff;
175 reg[2] = (data->rfreq >> 16) & 0xff;
176 reg[3] = (data->rfreq >> 8) & 0xff;
177 reg[4] = data->rfreq & 0xff;
178
179 return regmap_bulk_write(data->regmap, SI570_REG_N1_RFREQ0 +
180 data->div_offset, reg, ARRAY_SIZE(reg));
181}
182
183/**
184 * si570_calc_divs() - Caluclate clock dividers
185 * @frequency: Target frequency
186 * @data: Driver data structure
187 * @out_rfreq: RFREG fractional multiplier (output)
188 * @out_n1: Clock divider N1 (output)
189 * @out_hs_div: Clock divider HSDIV (output)
190 * Returns 0 on success, negative errno otherwise.
191 *
192 * Calculate the clock dividers (@out_hs_div, @out_n1) and clock multiplier
193 * (@out_rfreq) for a given target @frequency.
194 */
195static int si570_calc_divs(unsigned long frequency, struct clk_si570 *data,
196 u64 *out_rfreq, unsigned int *out_n1, unsigned int *out_hs_div)
197{
198 int i;
199 unsigned int n1, hs_div;
200 u64 fdco, best_fdco = ULLONG_MAX;
201 static const uint8_t si570_hs_div_values[] = { 11, 9, 7, 6, 5, 4 };
202
203 for (i = 0; i < ARRAY_SIZE(si570_hs_div_values); i++) {
204 hs_div = si570_hs_div_values[i];
205 /* Calculate lowest possible value for n1 */
206 n1 = div_u64(div_u64(FDCO_MIN, hs_div), frequency);
207 if (!n1 || (n1 & 1))
208 n1++;
209 while (n1 <= 128) {
210 fdco = (u64)frequency * (u64)hs_div * (u64)n1;
211 if (fdco > FDCO_MAX)
212 break;
213 if (fdco >= FDCO_MIN && fdco < best_fdco) {
214 *out_n1 = n1;
215 *out_hs_div = hs_div;
216 *out_rfreq = div64_u64(fdco << 28, data->fxtal);
217 best_fdco = fdco;
218 }
219 n1 += (n1 == 1 ? 1 : 2);
220 }
221 }
222
223 if (best_fdco == ULLONG_MAX)
224 return -EINVAL;
225
226 return 0;
227}
228
229static unsigned long si570_recalc_rate(struct clk_hw *hw,
230 unsigned long parent_rate)
231{
232 int err;
233 u64 rfreq, rate;
234 unsigned int n1, hs_div;
235 struct clk_si570 *data = to_clk_si570(hw);
236
237 err = si570_get_divs(data, &rfreq, &n1, &hs_div);
238 if (err) {
239 dev_err(&data->i2c_client->dev, "unable to recalc rate\n");
240 return data->frequency;
241 }
242
243 rfreq = div_u64(rfreq, hs_div * n1);
244 rate = (data->fxtal * rfreq) >> 28;
245
246 return rate;
247}
248
249static long si570_round_rate(struct clk_hw *hw, unsigned long rate,
250 unsigned long *parent_rate)
251{
252 int err;
253 u64 rfreq;
254 unsigned int n1, hs_div;
255 struct clk_si570 *data = to_clk_si570(hw);
256
257 if (!rate)
258 return 0;
259
260 if (div64_u64(abs(rate - data->frequency) * 10000LL,
261 data->frequency) < 35) {
262 rfreq = div64_u64((data->rfreq * rate) +
263 div64_u64(data->frequency, 2), data->frequency);
264 n1 = data->n1;
265 hs_div = data->hs_div;
266
267 } else {
268 err = si570_calc_divs(rate, data, &rfreq, &n1, &hs_div);
269 if (err) {
270 dev_err(&data->i2c_client->dev,
271 "unable to round rate\n");
272 return 0;
273 }
274 }
275
276 return rate;
277}
278
279/**
280 * si570_set_frequency() - Adjust output frequency
281 * @data: Driver data structure
282 * @frequency: Target frequency
283 * Returns 0 on success.
284 *
285 * Update output frequency for big frequency changes (> 3,500 ppm).
286 */
287static int si570_set_frequency(struct clk_si570 *data, unsigned long frequency)
288{
289 int err;
290
291 err = si570_calc_divs(frequency, data, &data->rfreq, &data->n1,
292 &data->hs_div);
293 if (err)
294 return err;
295
296 /*
297 * The DCO reg should be accessed with a read-modify-write operation
298 * per AN334
299 */
300 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, SI570_FREEZE_DCO);
301 regmap_write(data->regmap, SI570_REG_HS_N1 + data->div_offset,
302 ((data->hs_div - HS_DIV_OFFSET) << HS_DIV_SHIFT) |
303 (((data->n1 - 1) >> 2) & N1_6_2_MASK));
304 si570_update_rfreq(data);
305 regmap_write(data->regmap, SI570_REG_FREEZE_DCO, 0);
306 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_NEWFREQ);
307
308 /* Applying a new frequency can take up to 10ms */
309 usleep_range(10000, 12000);
310
311 return 0;
312}
313
314/**
315 * si570_set_frequency_small() - Adjust output frequency
316 * @data: Driver data structure
317 * @frequency: Target frequency
318 * Returns 0 on success.
319 *
320 * Update output frequency for small frequency changes (< 3,500 ppm).
321 */
322static int si570_set_frequency_small(struct clk_si570 *data,
323 unsigned long frequency)
324{
325 /*
326 * This is a re-implementation of DIV_ROUND_CLOSEST
327 * using the div64_u64 function lieu of letting the compiler
328 * insert EABI calls
329 */
330 data->rfreq = div64_u64((data->rfreq * frequency) +
331 div_u64(data->frequency, 2), data->frequency);
332 regmap_write(data->regmap, SI570_REG_CONTROL, SI570_CNTRL_FREEZE_M);
333 si570_update_rfreq(data);
334 regmap_write(data->regmap, SI570_REG_CONTROL, 0);
335
336 /* Applying a new frequency (small change) can take up to 100us */
337 usleep_range(100, 200);
338
339 return 0;
340}
341
342static int si570_set_rate(struct clk_hw *hw, unsigned long rate,
343 unsigned long parent_rate)
344{
345 struct clk_si570 *data = to_clk_si570(hw);
346 struct i2c_client *client = data->i2c_client;
347 int err;
348
349 if (rate < SI570_MIN_FREQ || rate > data->max_freq) {
350 dev_err(&client->dev,
351 "requested frequency %lu Hz is out of range\n", rate);
352 return -EINVAL;
353 }
354
355 if (div64_u64(abs(rate - data->frequency) * 10000LL,
356 data->frequency) < 35)
357 err = si570_set_frequency_small(data, rate);
358 else
359 err = si570_set_frequency(data, rate);
360
361 if (err)
362 return err;
363
364 data->frequency = rate;
365
366 return 0;
367}
368
369static const struct clk_ops si570_clk_ops = {
370 .recalc_rate = si570_recalc_rate,
371 .round_rate = si570_round_rate,
372 .set_rate = si570_set_rate,
373};
374
375static bool si570_regmap_is_volatile(struct device *dev, unsigned int reg)
376{
377 switch (reg) {
378 case SI570_REG_CONTROL:
379 return true;
380 default:
381 return false;
382 }
383}
384
385static bool si570_regmap_is_writeable(struct device *dev, unsigned int reg)
386{
387 switch (reg) {
388 case SI570_REG_HS_N1 ... (SI570_REG_RFREQ4 + SI570_DIV_OFFSET_7PPM):
389 case SI570_REG_CONTROL:
390 case SI570_REG_FREEZE_DCO:
391 return true;
392 default:
393 return false;
394 }
395}
396
Krzysztof Kozlowski217c8df2015-03-20 12:34:11 +0100397static const struct regmap_config si570_regmap_config = {
Soren Brinkmann1459c832013-09-21 16:40:39 -0700398 .reg_bits = 8,
399 .val_bits = 8,
400 .cache_type = REGCACHE_RBTREE,
401 .max_register = 137,
402 .writeable_reg = si570_regmap_is_writeable,
403 .volatile_reg = si570_regmap_is_volatile,
404};
405
406static int si570_probe(struct i2c_client *client,
407 const struct i2c_device_id *id)
408{
409 struct clk_si570 *data;
410 struct clk_init_data init;
411 struct clk *clk;
412 u32 initial_fout, factory_fout, stability;
413 int err;
414 enum clk_si570_variant variant = id->driver_data;
415
416 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
417 if (!data)
418 return -ENOMEM;
419
420 init.ops = &si570_clk_ops;
Stephen Boyd803c4332016-03-01 11:00:23 -0800421 init.flags = 0;
Soren Brinkmann1459c832013-09-21 16:40:39 -0700422 init.num_parents = 0;
423 data->hw.init = &init;
424 data->i2c_client = client;
425
426 if (variant == si57x) {
427 err = of_property_read_u32(client->dev.of_node,
428 "temperature-stability", &stability);
429 if (err) {
430 dev_err(&client->dev,
431 "'temperature-stability' property missing\n");
432 return err;
433 }
434 /* adjust register offsets for 7ppm devices */
435 if (stability == 7)
436 data->div_offset = SI570_DIV_OFFSET_7PPM;
437
438 data->max_freq = SI570_MAX_FREQ;
439 } else {
440 data->max_freq = SI598_MAX_FREQ;
441 }
442
443 if (of_property_read_string(client->dev.of_node, "clock-output-names",
444 &init.name))
445 init.name = client->dev.of_node->name;
446
447 err = of_property_read_u32(client->dev.of_node, "factory-fout",
448 &factory_fout);
449 if (err) {
450 dev_err(&client->dev, "'factory-fout' property missing\n");
451 return err;
452 }
453
454 data->regmap = devm_regmap_init_i2c(client, &si570_regmap_config);
455 if (IS_ERR(data->regmap)) {
456 dev_err(&client->dev, "failed to allocate register map\n");
457 return PTR_ERR(data->regmap);
458 }
459
460 i2c_set_clientdata(client, data);
461 err = si570_get_defaults(data, factory_fout);
462 if (err)
463 return err;
464
465 clk = devm_clk_register(&client->dev, &data->hw);
466 if (IS_ERR(clk)) {
467 dev_err(&client->dev, "clock registration failed\n");
468 return PTR_ERR(clk);
469 }
470 err = of_clk_add_provider(client->dev.of_node, of_clk_src_simple_get,
471 clk);
472 if (err) {
473 dev_err(&client->dev, "unable to add clk provider\n");
474 return err;
475 }
476
477 /* Read the requested initial output frequency from device tree */
478 if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
479 &initial_fout)) {
480 err = clk_set_rate(clk, initial_fout);
481 if (err) {
482 of_clk_del_provider(client->dev.of_node);
483 return err;
484 }
485 }
486
487 /* Display a message indicating that we've successfully registered */
488 dev_info(&client->dev, "registered, current frequency %llu Hz\n",
489 data->frequency);
490
491 return 0;
492}
493
494static int si570_remove(struct i2c_client *client)
495{
496 of_clk_del_provider(client->dev.of_node);
497 return 0;
498}
499
500static const struct i2c_device_id si570_id[] = {
501 { "si570", si57x },
502 { "si571", si57x },
503 { "si598", si59x },
504 { "si599", si59x },
505 { }
506};
507MODULE_DEVICE_TABLE(i2c, si570_id);
508
509static const struct of_device_id clk_si570_of_match[] = {
510 { .compatible = "silabs,si570" },
511 { .compatible = "silabs,si571" },
512 { .compatible = "silabs,si598" },
513 { .compatible = "silabs,si599" },
514 { },
515};
516MODULE_DEVICE_TABLE(of, clk_si570_of_match);
517
518static struct i2c_driver si570_driver = {
519 .driver = {
520 .name = "si570",
Sachin Kamate8ab2f12013-12-21 15:45:27 +0530521 .of_match_table = clk_si570_of_match,
Soren Brinkmann1459c832013-09-21 16:40:39 -0700522 },
523 .probe = si570_probe,
524 .remove = si570_remove,
525 .id_table = si570_id,
526};
527module_i2c_driver(si570_driver);
528
529MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
Michal Simek44731f52014-04-03 17:05:02 +0200530MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
Soren Brinkmann1459c832013-09-21 16:40:39 -0700531MODULE_DESCRIPTION("Si570 driver");
532MODULE_LICENSE("GPL");