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Ben Dooksa21765a2007-02-11 18:31:01 +01001# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config PLAT_S3C24XX
6 bool
Ben Dooksbcae8ae2008-10-21 14:06:32 +01007 depends on ARCH_S3C2410 || ARCH_S3C24A0
8 default y
Ben Dooks7d477a02007-02-12 18:59:35 +01009 select NO_IOPORT
Russell Kingbb2b1802008-07-26 15:36:03 +010010 select ARCH_REQUIRE_GPIOLIB
Kukjin Kim258b78c2010-12-03 21:22:42 +090011 select S3C_DEV_NAND
Ben Dooks9bbb8512010-04-30 19:30:35 +090012 select S3C_GPIO_CFG_S3C24XX
Ben Dooksa21765a2007-02-11 18:31:01 +010013 help
Ben Dooksd58153d2007-07-22 16:07:09 +010014 Base platform code for any Samsung S3C24XX device
Ben Dooksa21765a2007-02-11 18:31:01 +010015
Ben Dooksb8870602007-02-11 20:33:13 +010016if PLAT_S3C24XX
17
Ben Dooks89f1fa02010-01-29 09:02:17 +000018# low-level serial option nodes
19
20config CPU_LLSERIAL_S3C2410_ONLY
21 bool
22 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
23
24config CPU_LLSERIAL_S3C2440_ONLY
25 bool
26 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
27
28config CPU_LLSERIAL_S3C2410
29 bool
30 help
31 Selected if there is an S3C2410 (or register compatible) serial
32 low-level implementation needed
33
34config CPU_LLSERIAL_S3C2440
35 bool
36 help
37 Selected if there is an S3C2440 (or register compatible) serial
38 low-level implementation needed
39
Ben Dooks1b3ba682008-10-21 14:06:22 +010040# code that is shared between a number of the s3c24xx implementations
41
42config S3C2410_CLOCK
43 bool
44 help
45 Clock code for the S3C2410, and similar processors which
46 is currently includes the S3C2410, S3C2440, S3C2442.
47
Ben Dooksaf337f32010-04-28 18:03:57 +090048config S3C2443_CLOCK
49 bool
50 help
51 Clock code for the S3C2443 and similar processors, which includes
52 the S3C2416 and S3C2450.
53
Ben Dooks93bc6b62008-10-21 14:06:33 +010054config S3C24XX_DCLK
55 bool
56 help
57 Clock code for supporting DCLK/CLKOUT on S3C24XX architectures
58
Ben Dookse2178d42008-11-10 10:59:32 +000059# gpio configurations
60
61config S3C24XX_GPIO_EXTRA
62 int
63 default 128 if S3C24XX_GPIO_EXTRA128
64 default 64 if S3C24XX_GPIO_EXTRA64
Vasily Khoruzhick14477092010-09-08 12:39:46 +030065 default 16 if ARCH_H1940
Ben Dookse2178d42008-11-10 10:59:32 +000066 default 0
67
68config S3C24XX_GPIO_EXTRA64
69 bool
70 help
71 Add an extra 64 gpio numbers to the available GPIO pool. This is
72 available for boards that need extra gpios for external devices.
73
74config S3C24XX_GPIO_EXTRA128
75 bool
76 help
77 Add an extra 128 gpio numbers to the available GPIO pool. This is
78 available for boards that need extra gpios for external devices.
79
Ben Dooksa21765a2007-02-11 18:31:01 +010080config PM_SIMTEC
81 bool
82 help
83 Common power management code for systems that are
84 compatible with the Simtec style of power management
85
Ben Dooksa21765a2007-02-11 18:31:01 +010086config S3C2410_DMA
87 bool "S3C2410 DMA support"
88 depends on ARCH_S3C2410
Ben Dooks97c1b142009-03-19 15:02:39 +000089 select S3C_DMA
Ben Dooksa21765a2007-02-11 18:31:01 +010090 help
91 S3C2410 DMA support. This is needed for drivers like sound which
92 use the S3C2410's DMA system to move data to and from the
93 peripheral blocks.
94
95config S3C2410_DMA_DEBUG
96 bool "S3C2410 DMA support debug"
97 depends on ARCH_S3C2410 && S3C2410_DMA
98 help
99 Enable debugging output for the DMA code. This option sends info
100 to the kernel log, at priority KERN_DEBUG.
101
Ben Dooksb2a6cf32008-10-21 14:06:20 +0100102# SPI default pin configuration code
103
104config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
105 bool
106 help
107 SPI GPIO configuration code for BUS0 when connected to
108 GPE11, GPE12 and GPE13.
109
110config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
111 bool
112 help
113 SPI GPIO configuration code for BUS 1 when connected to
114 GPG5, GPG6 and GPG7.
115
Ben Dooksa2c195f2009-08-03 17:26:50 +0100116config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10
117 bool
118 help
119 SPI GPIO configuration code for BUS 1 when connected to
120 GPD8, GPD9 and GPD10.
121
Ben Dooksb2a6cf32008-10-21 14:06:20 +0100122# common code for s3c24xx based machines, such as the SMDKs.
123
Ben Dooks831a6fc2009-07-30 23:23:26 +0100124# cpu frequency items common between s3c2410 and s3c2440/s3c2442
125
126config S3C2410_IOTIMING
127 bool
128 depends on CPU_FREQ_S3C24XX
129 help
130 Internal node to select io timing code that is common to the s3c2410
131 and s3c2440/s3c2442 cpu frequency support.
132
Ben Dooksa24c0912009-07-30 23:23:27 +0100133config S3C2410_CPUFREQ_UTILS
134 bool
135 depends on CPU_FREQ_S3C24XX
136 help
137 Internal node to select timing code that is common to the s3c2410
138 and s3c2440/s3c244 cpu frequency support.
139
Ben Dooks140780a2009-07-30 23:23:37 +0100140# cpu frequency support common to s3c2412, s3c2413 and s3c2442
141
142config S3C2412_IOTIMING
143 bool
144 depends on CPU_FREQ_S3C24XX && (CPU_S3C2412 || CPU_S3C2443)
145 help
146 Intel node to select io timing code that is common to the s3c2412
147 and the s3c2443.
148
Ben Dooksa21765a2007-02-11 18:31:01 +0100149config MACH_SMDK
150 bool
151 help
152 Common machine code for SMDK2410 and SMDK2440
153
Ben Dooks4d3a3462009-11-13 22:34:20 +0000154config S3C24XX_SIMTEC_AUDIO
155 bool
156 depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS)
157 default y
158 help
159 Add audio devices for common Simtec S3C24XX boards
160
Naveen Krishna5bfdca12010-05-18 20:44:27 +0900161config S3C2410_SETUP_TS
162 bool
163 help
164 Compile in platform device definition for Samsung TouchScreen.
165
Ben Dooksb8870602007-02-11 20:33:13 +0100166endif