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Laurent Pinchart4d8864c2013-12-11 15:05:13 +01001/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11#define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13/* CPG */
14#define R8A7791_CLK_MAIN 0
15#define R8A7791_CLK_PLL0 1
16#define R8A7791_CLK_PLL1 2
17#define R8A7791_CLK_PLL3 3
18#define R8A7791_CLK_LB 4
19#define R8A7791_CLK_QSPI 5
20#define R8A7791_CLK_SDH 6
21#define R8A7791_CLK_SD0 7
22#define R8A7791_CLK_Z 8
23
Laurent Pinchartcded80f2013-12-19 16:51:02 +010024/* MSTP0 */
25#define R8A7791_CLK_MSIOF0 0
26
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010027/* MSTP1 */
Mikhail Ulyanoved48b5d2014-08-19 16:50:51 +040028#define R8A7791_CLK_JPU 6
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010029#define R8A7791_CLK_TMU1 11
30#define R8A7791_CLK_TMU3 21
31#define R8A7791_CLK_TMU2 22
32#define R8A7791_CLK_CMT0 24
33#define R8A7791_CLK_TMU0 25
34#define R8A7791_CLK_VSP1_DU1 27
35#define R8A7791_CLK_VSP1_DU0 28
Laurent Pinchart58ea1d52014-04-02 16:31:47 +020036#define R8A7791_CLK_VSP1_S 31
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010037
38/* MSTP2 */
39#define R8A7791_CLK_SCIFA2 2
40#define R8A7791_CLK_SCIFA1 3
41#define R8A7791_CLK_SCIFA0 4
Laurent Pinchartcded80f2013-12-19 16:51:02 +010042#define R8A7791_CLK_MSIOF2 5
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010043#define R8A7791_CLK_SCIFB0 6
44#define R8A7791_CLK_SCIFB1 7
Laurent Pinchartcded80f2013-12-19 16:51:02 +010045#define R8A7791_CLK_MSIOF1 8
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010046#define R8A7791_CLK_SCIFB2 16
Geert Uytterhoevena505daa2014-05-12 20:49:33 +020047#define R8A7791_CLK_SYS_DMAC1 18
48#define R8A7791_CLK_SYS_DMAC0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010049
50/* MSTP3 */
51#define R8A7791_CLK_TPU0 4
52#define R8A7791_CLK_SDHI2 11
53#define R8A7791_CLK_SDHI1 12
54#define R8A7791_CLK_SDHI0 14
55#define R8A7791_CLK_MMCIF0 15
Wolfram Sangc6e8f322014-03-10 12:26:56 +010056#define R8A7791_CLK_IIC0 18
Phil Edworthy4bfb3762014-06-13 10:37:18 +010057#define R8A7791_CLK_PCIEC 19
Wolfram Sangc6e8f322014-03-10 12:26:56 +010058#define R8A7791_CLK_IIC1 23
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010059#define R8A7791_CLK_SSUSB 28
60#define R8A7791_CLK_CMT1 29
61#define R8A7791_CLK_USBDMAC0 30
62#define R8A7791_CLK_USBDMAC1 31
63
64/* MSTP5 */
65#define R8A7791_CLK_THERMAL 22
66#define R8A7791_CLK_PWM 23
67
68/* MSTP7 */
Magnus Damm6225b992014-04-07 15:04:21 +090069#define R8A7791_CLK_EHCI 3
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010070#define R8A7791_CLK_HSUSB 4
71#define R8A7791_CLK_HSCIF2 13
72#define R8A7791_CLK_SCIF5 14
73#define R8A7791_CLK_SCIF4 15
74#define R8A7791_CLK_HSCIF1 16
75#define R8A7791_CLK_HSCIF0 17
76#define R8A7791_CLK_SCIF3 18
77#define R8A7791_CLK_SCIF2 19
78#define R8A7791_CLK_SCIF1 20
79#define R8A7791_CLK_SCIF0 21
80#define R8A7791_CLK_DU1 23
81#define R8A7791_CLK_DU0 24
82#define R8A7791_CLK_LVDS0 26
83
84/* MSTP8 */
85#define R8A7791_CLK_VIN2 9
86#define R8A7791_CLK_VIN1 10
87#define R8A7791_CLK_VIN0 11
88#define R8A7791_CLK_ETHER 13
89#define R8A7791_CLK_SATA1 14
90#define R8A7791_CLK_SATA0 15
91
92/* MSTP9 */
93#define R8A7791_CLK_GPIO7 4
94#define R8A7791_CLK_GPIO6 5
95#define R8A7791_CLK_GPIO5 7
96#define R8A7791_CLK_GPIO4 8
97#define R8A7791_CLK_GPIO3 9
98#define R8A7791_CLK_GPIO2 10
99#define R8A7791_CLK_GPIO1 11
100#define R8A7791_CLK_GPIO0 12
101#define R8A7791_CLK_RCAN1 15
102#define R8A7791_CLK_RCAN0 16
Laurent Pinchartec71f552013-12-19 16:51:04 +0100103#define R8A7791_CLK_QSPI_MOD 17
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100104#define R8A7791_CLK_I2C5 25
105#define R8A7791_CLK_IICDVFS 26
106#define R8A7791_CLK_I2C4 27
107#define R8A7791_CLK_I2C3 28
108#define R8A7791_CLK_I2C2 29
109#define R8A7791_CLK_I2C1 30
110#define R8A7791_CLK_I2C0 31
111
Kuninori Morimotoee914152014-06-11 21:44:16 -0700112/* MSTP10 */
113#define R8A7791_CLK_SSI_ALL 5
114#define R8A7791_CLK_SSI9 6
115#define R8A7791_CLK_SSI8 7
116#define R8A7791_CLK_SSI7 8
117#define R8A7791_CLK_SSI6 9
118#define R8A7791_CLK_SSI5 10
119#define R8A7791_CLK_SSI4 11
120#define R8A7791_CLK_SSI3 12
121#define R8A7791_CLK_SSI2 13
122#define R8A7791_CLK_SSI1 14
123#define R8A7791_CLK_SSI0 15
124#define R8A7791_CLK_SCU_ALL 17
125#define R8A7791_CLK_SCU_DVC1 18
126#define R8A7791_CLK_SCU_DVC0 19
127#define R8A7791_CLK_SCU_SRC9 22
128#define R8A7791_CLK_SCU_SRC8 23
129#define R8A7791_CLK_SCU_SRC7 24
130#define R8A7791_CLK_SCU_SRC6 25
131#define R8A7791_CLK_SCU_SRC5 26
132#define R8A7791_CLK_SCU_SRC4 27
133#define R8A7791_CLK_SCU_SRC3 28
134#define R8A7791_CLK_SCU_SRC2 29
135#define R8A7791_CLK_SCU_SRC1 30
136#define R8A7791_CLK_SCU_SRC0 31
137
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100138/* MSTP11 */
139#define R8A7791_CLK_SCIFA3 6
140#define R8A7791_CLK_SCIFA4 7
141#define R8A7791_CLK_SCIFA5 8
142
143#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */