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Wu, Fengguang91504872008-11-05 11:16:56 +08001/*
2 *
3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
4 *
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
6 *
7 * Authors:
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
10 *
11 * Maintained by:
12 * Wu Fengguang <wfg@linux.intel.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 * for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#include <linux/init.h>
30#include <linux/delay.h>
31#include <linux/slab.h>
32#include <sound/core.h>
Wu, Fengguang91504872008-11-05 11:16:56 +080033#include "hda_codec.h"
34#include "hda_local.h"
Wu, Fengguang91504872008-11-05 11:16:56 +080035
Wu Fengguang54a25f82009-10-30 11:44:26 +010036/*
37 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
38 * could support two independent pipes, each of them can be connected to one or
39 * more ports (DVI, HDMI or DisplayPort).
40 *
41 * The HDA correspondence of pipes/ports are converter/pin nodes.
42 */
43#define INTEL_HDMI_CVTS 2
44#define INTEL_HDMI_PINS 3
Wu, Fengguang91504872008-11-05 11:16:56 +080045
Wu Fengguang54a25f82009-10-30 11:44:26 +010046static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
47 "INTEL HDMI 0",
48 "INTEL HDMI 1",
49};
Wu, Fengguang91504872008-11-05 11:16:56 +080050
Wu, Fengguang91504872008-11-05 11:16:56 +080051struct intel_hdmi_spec {
Wu Fengguang54a25f82009-10-30 11:44:26 +010052 int num_cvts;
53 int num_pins;
54 hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
55 hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
56
57 /*
58 * source connection for each pin
59 */
60 hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
61
62 /*
63 * HDMI sink attached to each pin
64 */
65 bool sink_present[INTEL_HDMI_PINS];
66 bool sink_eldv[INTEL_HDMI_PINS];
67 struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
68
69 /*
70 * export one pcm per pipe
71 */
72 struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
Wu, Fengguang91504872008-11-05 11:16:56 +080073};
74
Wu, Fengguang91504872008-11-05 11:16:56 +080075struct hdmi_audio_infoframe {
76 u8 type; /* 0x84 */
77 u8 ver; /* 0x01 */
78 u8 len; /* 0x0a */
79
80 u8 checksum; /* PB0 */
81 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
82 u8 SS01_SF24;
83 u8 CXT04;
84 u8 CA;
85 u8 LFEPBL01_LSV36_DM_INH7;
Wu Fengguang4e19c582008-11-19 15:13:59 +080086 u8 reserved[5]; /* PB6 - PB10 */
Wu, Fengguang91504872008-11-05 11:16:56 +080087};
88
89/*
Wu Fengguang698544d2008-11-19 08:56:17 +080090 * CEA speaker placement:
91 *
92 * FLH FCH FRH
93 * FLW FL FLC FC FRC FR FRW
94 *
95 * LFE
96 * TC
97 *
98 * RL RLC RC RRC RR
99 *
100 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
101 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
102 */
103enum cea_speaker_placement {
104 FL = (1 << 0), /* Front Left */
105 FC = (1 << 1), /* Front Center */
106 FR = (1 << 2), /* Front Right */
107 FLC = (1 << 3), /* Front Left Center */
108 FRC = (1 << 4), /* Front Right Center */
109 RL = (1 << 5), /* Rear Left */
110 RC = (1 << 6), /* Rear Center */
111 RR = (1 << 7), /* Rear Right */
112 RLC = (1 << 8), /* Rear Left Center */
113 RRC = (1 << 9), /* Rear Right Center */
114 LFE = (1 << 10), /* Low Frequency Effect */
115 FLW = (1 << 11), /* Front Left Wide */
116 FRW = (1 << 12), /* Front Right Wide */
117 FLH = (1 << 13), /* Front Left High */
118 FCH = (1 << 14), /* Front Center High */
119 FRH = (1 << 15), /* Front Right High */
120 TC = (1 << 16), /* Top Center */
121};
122
123/*
124 * ELD SA bits in the CEA Speaker Allocation data block
125 */
126static int eld_speaker_allocation_bits[] = {
127 [0] = FL | FR,
128 [1] = LFE,
129 [2] = FC,
130 [3] = RL | RR,
131 [4] = RC,
132 [5] = FLC | FRC,
133 [6] = RLC | RRC,
134 /* the following are not defined in ELD yet */
135 [7] = FLW | FRW,
136 [8] = FLH | FRH,
137 [9] = TC,
138 [10] = FCH,
139};
140
141struct cea_channel_speaker_allocation {
142 int ca_index;
143 int speakers[8];
144
145 /* derived values, just for convenience */
146 int channels;
147 int spk_mask;
148};
149
150/*
151 * This is an ordered list!
152 *
153 * The preceding ones have better chances to be selected by
154 * hdmi_setup_channel_allocation().
155 */
156static struct cea_channel_speaker_allocation channel_allocations[] = {
157/* channel: 8 7 6 5 4 3 2 1 */
158{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
159 /* 2.1 */
160{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
Wu Fengguang4e19c582008-11-19 15:13:59 +0800161 /* Dolby Surround */
Wu Fengguang698544d2008-11-19 08:56:17 +0800162{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
163{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
164{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
165{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
166{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
167{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
168{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
169{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
170{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
171 /* 5.1 */
172{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
173{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
174{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
175{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
176 /* 6.1 */
177{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
178{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
179{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
180{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
181 /* 7.1 */
182{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
183{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
184{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
185{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
186{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
187{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
188{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
189{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
190{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
191{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
192{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
193{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
194{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
195{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
196{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
197{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
198{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
199{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
200{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
201{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
202{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
203{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
204{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
205{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
206{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
207{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
208{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
209{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
210{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
211{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
212{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
213};
214
Wu Fengguang54a25f82009-10-30 11:44:26 +0100215
Wu Fengguangf4243672009-10-30 11:45:35 +0100216/*
217 * HDA/HDMI auto parsing
218 */
219
Wu Fengguang54a25f82009-10-30 11:44:26 +0100220static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
221{
222 int i;
223
224 for (i = 0; nids[i]; i++)
225 if (nids[i] == nid)
226 return i;
227
228 snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
229 return -EINVAL;
230}
231
Wu Fengguangf4243672009-10-30 11:45:35 +0100232static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
233{
234 struct intel_hdmi_spec *spec = codec->spec;
235 hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
236 int conn_len, curr;
237 int index;
238
239 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
240 snd_printk(KERN_WARNING
241 "HDMI: pin %d wcaps %#x "
242 "does not support connection list\n",
243 pin_nid, get_wcaps(codec, pin_nid));
244 return -EINVAL;
245 }
246
247 conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
248 HDA_MAX_CONNECTIONS);
249 if (conn_len > 1)
250 curr = snd_hda_codec_read(codec, pin_nid, 0,
251 AC_VERB_GET_CONNECT_SEL, 0);
252 else
253 curr = 0;
254
255 index = hda_node_index(spec->pin, pin_nid);
256 if (index < 0)
257 return -EINVAL;
258
259 spec->pin_cvt[index] = conn_list[curr];
260
261 return 0;
262}
263
264static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
265{
266 struct intel_hdmi_spec *spec = codec->spec;
267
268 if (spec->num_pins >= INTEL_HDMI_PINS) {
269 snd_printk(KERN_WARNING
270 "HDMI: no space for pin %d \n", pin_nid);
271 return -EINVAL;
272 }
273
274 spec->pin[spec->num_pins] = pin_nid;
275 spec->num_pins++;
276
277 /*
278 * It is assumed that converter nodes come first in the node list and
279 * hence have been registered and usable now.
280 */
281 return intel_hdmi_read_pin_conn(codec, pin_nid);
282}
283
284static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
285{
286 struct intel_hdmi_spec *spec = codec->spec;
287
288 if (spec->num_cvts >= INTEL_HDMI_CVTS) {
289 snd_printk(KERN_WARNING
290 "HDMI: no space for converter %d \n", nid);
291 return -EINVAL;
292 }
293
294 spec->cvt[spec->num_cvts] = nid;
295 spec->num_cvts++;
296
297 return 0;
298}
299
300static int intel_hdmi_parse_codec(struct hda_codec *codec)
301{
302 hda_nid_t nid;
303 int i, nodes;
304
305 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
306 if (!nid || nodes < 0) {
307 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
308 return -EINVAL;
309 }
310
311 for (i = 0; i < nodes; i++, nid++) {
312 unsigned int caps;
313 unsigned int type;
314
315 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
316 type = get_wcaps_type(caps);
317
318 if (!(caps & AC_WCAP_DIGITAL))
319 continue;
320
321 switch (type) {
322 case AC_WID_AUD_OUT:
323 if (intel_hdmi_add_cvt(codec, nid) < 0)
324 return -EINVAL;
325 break;
326 case AC_WID_PIN:
327 caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
328 if (!(caps & AC_PINCAP_HDMI))
329 continue;
330 if (intel_hdmi_add_pin(codec, nid) < 0)
331 return -EINVAL;
332 break;
333 }
334 }
335
336 return 0;
337}
338
Wu Fengguang698544d2008-11-19 08:56:17 +0800339/*
Wu, Fengguang91504872008-11-05 11:16:56 +0800340 * HDMI routines
341 */
342
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100343#ifdef BE_PARANOID
Wu Fengguang6797cf22009-10-30 11:40:40 +0100344static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800345 int *packet_index, int *byte_index)
346{
347 int val;
348
Wu Fengguang6797cf22009-10-30 11:40:40 +0100349 val = snd_hda_codec_read(codec, pin_nid, 0,
350 AC_VERB_GET_HDMI_DIP_INDEX, 0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800351
352 *packet_index = val >> 5;
353 *byte_index = val & 0x1f;
354}
Takashi Iwaibeb0b9cf2008-11-05 07:58:25 +0100355#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800356
Wu Fengguang6797cf22009-10-30 11:40:40 +0100357static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800358 int packet_index, int byte_index)
359{
360 int val;
361
362 val = (packet_index << 5) | (byte_index & 0x1f);
363
Wu Fengguang6797cf22009-10-30 11:40:40 +0100364 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800365}
366
Wu Fengguang6797cf22009-10-30 11:40:40 +0100367static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
Wu, Fengguang91504872008-11-05 11:16:56 +0800368 unsigned char val)
369{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100370 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
Wu, Fengguang91504872008-11-05 11:16:56 +0800371}
372
Wu Fengguang6797cf22009-10-30 11:40:40 +0100373static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800374{
Wu Fengguang796359d2008-11-17 16:57:33 +0800375 /* Unmute */
Wu Fengguang559059b2009-08-02 16:48:55 +0800376 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
377 snd_hda_codec_write(codec, pin_nid, 0,
Wu Fengguang796359d2008-11-17 16:57:33 +0800378 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
379 /* Enable pin out */
Wu Fengguang559059b2009-08-02 16:48:55 +0800380 snd_hda_codec_write(codec, pin_nid, 0,
381 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
Wu, Fengguang91504872008-11-05 11:16:56 +0800382}
383
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800384/*
385 * Enable Audio InfoFrame Transmission
386 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100387static void hdmi_start_infoframe_trans(struct hda_codec *codec,
388 hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800389{
Wu Fengguang559059b2009-08-02 16:48:55 +0800390 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
391 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800392 AC_DIPXMIT_BEST);
393}
Wu, Fengguang91504872008-11-05 11:16:56 +0800394
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800395/*
396 * Disable Audio InfoFrame Transmission
397 */
Wu Fengguang6797cf22009-10-30 11:40:40 +0100398static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
399 hda_nid_t pin_nid)
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800400{
Wu Fengguang559059b2009-08-02 16:48:55 +0800401 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
402 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
Wu Fengguang606c0ce2009-02-11 15:22:29 +0800403 AC_DIPXMIT_DISABLE);
Wu, Fengguang91504872008-11-05 11:16:56 +0800404}
405
Wu Fengguang6797cf22009-10-30 11:40:40 +0100406static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800407{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100408 return 1 + snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800409 AC_VERB_GET_CVT_CHAN_COUNT, 0);
410}
411
Wu Fengguang6797cf22009-10-30 11:40:40 +0100412static void hdmi_set_channel_count(struct hda_codec *codec,
413 hda_nid_t nid, int chs)
Wu, Fengguang91504872008-11-05 11:16:56 +0800414{
Wu Fengguang6797cf22009-10-30 11:40:40 +0100415 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
Wu, Fengguang91504872008-11-05 11:16:56 +0800416
Wu Fengguang6797cf22009-10-30 11:40:40 +0100417#ifdef CONFIG_SND_DEBUG_VERBOSE
418 if (chs != hdmi_get_channel_count(codec, nid))
Wu Fengguang03284c82008-11-22 09:40:53 +0800419 snd_printd(KERN_INFO "HDMI channel count: expect %d, get %d\n",
Wu Fengguang6797cf22009-10-30 11:40:40 +0100420 chs, hdmi_get_channel_count(codec, nid));
421#endif
Wu, Fengguang91504872008-11-05 11:16:56 +0800422}
423
Wu Fengguang6797cf22009-10-30 11:40:40 +0100424static void hdmi_debug_channel_mapping(struct hda_codec *codec, hda_nid_t nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800425{
426#ifdef CONFIG_SND_DEBUG_VERBOSE
427 int i;
428 int slot;
429
430 for (i = 0; i < 8; i++) {
Wu Fengguang6797cf22009-10-30 11:40:40 +0100431 slot = snd_hda_codec_read(codec, nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800432 AC_VERB_GET_HDMI_CHAN_SLOT, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800433 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
Wu Fengguang4e19c582008-11-19 15:13:59 +0800434 slot >> 4, slot & 0x7);
Wu, Fengguang91504872008-11-05 11:16:56 +0800435 }
436#endif
437}
438
Wu Fengguang54a25f82009-10-30 11:44:26 +0100439static void hdmi_parse_eld(struct hda_codec *codec, int index)
Wu, Fengguang91504872008-11-05 11:16:56 +0800440{
Wu Fengguang7f4a9f42008-11-18 11:47:52 +0800441 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100442 struct hdmi_eld *eld = &spec->sink_eld[index];
Wu, Fengguang91504872008-11-05 11:16:56 +0800443
Wu Fengguang54a25f82009-10-30 11:44:26 +0100444 if (!snd_hdmi_get_eld(eld, codec, spec->pin[index]))
Wu Fengguang7f4a9f42008-11-18 11:47:52 +0800445 snd_hdmi_show_eld(eld);
Wu, Fengguang91504872008-11-05 11:16:56 +0800446}
447
448
449/*
Wu Fengguang4e19c582008-11-19 15:13:59 +0800450 * Audio InfoFrame routines
Wu, Fengguang91504872008-11-05 11:16:56 +0800451 */
452
Wu Fengguang6797cf22009-10-30 11:40:40 +0100453static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800454{
455#ifdef CONFIG_SND_DEBUG_VERBOSE
456 int i;
457 int size;
458
Wu Fengguang559059b2009-08-02 16:48:55 +0800459 size = snd_hdmi_get_eld_size(codec, pin_nid);
Wu Fengguang03284c82008-11-22 09:40:53 +0800460 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800461
462 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800463 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800464 AC_VERB_GET_HDMI_DIP_SIZE, i);
Wu Fengguang03284c82008-11-22 09:40:53 +0800465 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
Wu, Fengguang91504872008-11-05 11:16:56 +0800466 }
467#endif
468}
469
Wu Fengguang6797cf22009-10-30 11:40:40 +0100470static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
Wu, Fengguang91504872008-11-05 11:16:56 +0800471{
472#ifdef BE_PARANOID
473 int i, j;
474 int size;
475 int pi, bi;
476 for (i = 0; i < 8; i++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800477 size = snd_hda_codec_read(codec, pin_nid, 0,
Wu, Fengguang91504872008-11-05 11:16:56 +0800478 AC_VERB_GET_HDMI_DIP_SIZE, i);
479 if (size == 0)
480 continue;
481
Wu Fengguang559059b2009-08-02 16:48:55 +0800482 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
Wu, Fengguang91504872008-11-05 11:16:56 +0800483 for (j = 1; j < 1000; j++) {
Wu Fengguang559059b2009-08-02 16:48:55 +0800484 hdmi_write_dip_byte(codec, pin_nid, 0x0);
485 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
Wu, Fengguang91504872008-11-05 11:16:56 +0800486 if (pi != i)
487 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
488 bi, pi, i);
489 if (bi == 0) /* byte index wrapped around */
490 break;
491 }
492 snd_printd(KERN_INFO
Wu Fengguang03284c82008-11-22 09:40:53 +0800493 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
494 i, size, j);
Wu, Fengguang91504872008-11-05 11:16:56 +0800495 }
496#endif
497}
498
Wu Fengguang5457a982008-11-19 08:56:15 +0800499static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
Wu Fengguang6797cf22009-10-30 11:40:40 +0100500 hda_nid_t pin_nid,
501 struct hdmi_audio_infoframe *ai)
Wu, Fengguang91504872008-11-05 11:16:56 +0800502{
Wu Fengguang5457a982008-11-19 08:56:15 +0800503 u8 *params = (u8 *)ai;
Wu Fengguang9a957a22009-02-11 15:22:30 +0800504 u8 sum = 0;
Wu, Fengguang91504872008-11-05 11:16:56 +0800505 int i;
506
Wu Fengguang6797cf22009-10-30 11:40:40 +0100507 hdmi_debug_dip_size(codec, pin_nid);
508 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
Wu, Fengguang91504872008-11-05 11:16:56 +0800509
Wu Fengguang9a957a22009-02-11 15:22:30 +0800510 for (i = 0; i < sizeof(ai); i++)
511 sum += params[i];
512 ai->checksum = - sum;
513
Wu Fengguang559059b2009-08-02 16:48:55 +0800514 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
Wu Fengguang5457a982008-11-19 08:56:15 +0800515 for (i = 0; i < sizeof(ai); i++)
Wu Fengguang559059b2009-08-02 16:48:55 +0800516 hdmi_write_dip_byte(codec, pin_nid, params[i]);
Wu, Fengguang91504872008-11-05 11:16:56 +0800517}
518
Wu Fengguang698544d2008-11-19 08:56:17 +0800519/*
520 * Compute derived values in channel_allocations[].
521 */
522static void init_channel_allocations(void)
523{
524 int i, j;
525 struct cea_channel_speaker_allocation *p;
526
527 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
528 p = channel_allocations + i;
529 p->channels = 0;
530 p->spk_mask = 0;
531 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
532 if (p->speakers[j]) {
533 p->channels++;
534 p->spk_mask |= p->speakers[j];
535 }
536 }
537}
538
539/*
540 * The transformation takes two steps:
541 *
542 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
543 * spk_mask => (channel_allocations[]) => ai->CA
544 *
545 * TODO: it could select the wrong CA from multiple candidates.
546*/
Wu Fengguang6797cf22009-10-30 11:40:40 +0100547static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang698544d2008-11-19 08:56:17 +0800548 struct hdmi_audio_infoframe *ai)
549{
550 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100551 struct hdmi_eld *eld;
Wu Fengguang698544d2008-11-19 08:56:17 +0800552 int i;
553 int spk_mask = 0;
554 int channels = 1 + (ai->CC02_CT47 & 0x7);
555 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
556
557 /*
558 * CA defaults to 0 for basic stereo audio
559 */
Wu Fengguang698544d2008-11-19 08:56:17 +0800560 if (channels <= 2)
561 return 0;
562
Wu Fengguang54a25f82009-10-30 11:44:26 +0100563 i = hda_node_index(spec->pin_cvt, nid);
564 if (i < 0)
565 return 0;
566 eld = &spec->sink_eld[i];
567
Wu Fengguang698544d2008-11-19 08:56:17 +0800568 /*
Wu Fengguanga1667e42009-02-11 15:22:28 +0800569 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
570 * in console or for audio devices. Assume the highest speakers
571 * configuration, to _not_ prohibit multi-channel audio playback.
572 */
573 if (!eld->spk_alloc)
574 eld->spk_alloc = 0xffff;
575
576 /*
Wu Fengguang698544d2008-11-19 08:56:17 +0800577 * expand ELD's speaker allocation mask
578 *
579 * ELD tells the speaker mask in a compact(paired) form,
Wu Fengguangb83923a2008-11-22 09:40:51 +0800580 * expand ELD's notions to match the ones used by Audio InfoFrame.
Wu Fengguang698544d2008-11-19 08:56:17 +0800581 */
582 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
583 if (eld->spk_alloc & (1 << i))
584 spk_mask |= eld_speaker_allocation_bits[i];
585 }
586
587 /* search for the first working match in the CA table */
588 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
589 if (channels == channel_allocations[i].channels &&
590 (spk_mask & channel_allocations[i].spk_mask) ==
591 channel_allocations[i].spk_mask) {
592 ai->CA = channel_allocations[i].ca_index;
Wu Fengguangcc02b832008-11-22 09:40:52 +0800593 break;
Wu Fengguang698544d2008-11-19 08:56:17 +0800594 }
595 }
596
597 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
Wu Fengguangcc02b832008-11-22 09:40:52 +0800598 snd_printdd(KERN_INFO
599 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
600 ai->CA, channels, buf);
601
602 return ai->CA;
Wu Fengguang698544d2008-11-19 08:56:17 +0800603}
604
Wu Fengguang6797cf22009-10-30 11:40:40 +0100605static void hdmi_setup_channel_mapping(struct hda_codec *codec, hda_nid_t nid,
606 struct hdmi_audio_infoframe *ai)
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800607{
Wu Fengguang559059b2009-08-02 16:48:55 +0800608 int i;
609
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800610 if (!ai->CA)
611 return;
612
613 /*
614 * TODO: adjust channel mapping if necessary
615 * ALSA sequence is front/surr/clfe/side?
616 */
617
Wu Fengguang559059b2009-08-02 16:48:55 +0800618 for (i = 0; i < 8; i++)
Wu Fengguang6797cf22009-10-30 11:40:40 +0100619 snd_hda_codec_write(codec, nid, 0,
Wu Fengguang559059b2009-08-02 16:48:55 +0800620 AC_VERB_SET_HDMI_CHAN_SLOT,
621 (i << 4) | i);
622
Wu Fengguang6797cf22009-10-30 11:40:40 +0100623 hdmi_debug_channel_mapping(codec, nid);
Wu Fengguang9c8641e2008-11-19 08:56:18 +0800624}
625
626
Wu Fengguang6797cf22009-10-30 11:40:40 +0100627static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
Wu Fengguang5457a982008-11-19 08:56:15 +0800628 struct snd_pcm_substream *substream)
629{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100630 struct intel_hdmi_spec *spec = codec->spec;
631 hda_nid_t pin_nid;
632 int i;
Wu Fengguang5457a982008-11-19 08:56:15 +0800633 struct hdmi_audio_infoframe ai = {
634 .type = 0x84,
635 .ver = 0x01,
636 .len = 0x0a,
637 .CC02_CT47 = substream->runtime->channels - 1,
638 };
639
Wu Fengguang6797cf22009-10-30 11:40:40 +0100640 hdmi_setup_channel_allocation(codec, nid, &ai);
641 hdmi_setup_channel_mapping(codec, nid, &ai);
Wu Fengguang698544d2008-11-19 08:56:17 +0800642
Wu Fengguang54a25f82009-10-30 11:44:26 +0100643 for (i = 0; i < spec->num_pins; i++) {
644 if (spec->pin_cvt[i] != nid)
645 continue;
646 if (spec->sink_present[i] != true)
647 continue;
648
649 pin_nid = spec->pin[i];
650 hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
651 hdmi_start_infoframe_trans(codec, pin_nid);
652 }
Wu Fengguang5457a982008-11-19 08:56:15 +0800653}
654
Wu, Fengguang91504872008-11-05 11:16:56 +0800655
656/*
657 * Unsolicited events
658 */
659
660static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
661{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100662 struct intel_hdmi_spec *spec = codec->spec;
663 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800664 int pind = !!(res & AC_UNSOL_RES_PD);
665 int eldv = !!(res & AC_UNSOL_RES_ELDV);
Wu Fengguang54a25f82009-10-30 11:44:26 +0100666 int index;
Wu, Fengguang91504872008-11-05 11:16:56 +0800667
Wu Fengguang03284c82008-11-22 09:40:53 +0800668 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100669 "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
670 tag, pind, eldv);
671
672 index = hda_node_index(spec->pin, tag);
673 if (index < 0)
674 return;
675
676 spec->sink_present[index] = pind;
677 spec->sink_eldv[index] = eldv;
Wu, Fengguang91504872008-11-05 11:16:56 +0800678
679 if (pind && eldv) {
Wu Fengguang54a25f82009-10-30 11:44:26 +0100680 hdmi_parse_eld(codec, index);
Wu, Fengguang91504872008-11-05 11:16:56 +0800681 /* TODO: do real things about ELD */
682 }
683}
684
685static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
686{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100687 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
Wu, Fengguang91504872008-11-05 11:16:56 +0800688 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
689 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
690 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
691
Wu Fengguang03284c82008-11-22 09:40:53 +0800692 printk(KERN_INFO
Wu Fengguang54a25f82009-10-30 11:44:26 +0100693 "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
694 tag,
Wu Fengguang03284c82008-11-22 09:40:53 +0800695 subtag,
696 cp_state,
697 cp_ready);
Wu, Fengguang91504872008-11-05 11:16:56 +0800698
Wu Fengguang03284c82008-11-22 09:40:53 +0800699 /* TODO */
Wu, Fengguang91504872008-11-05 11:16:56 +0800700 if (cp_state)
701 ;
702 if (cp_ready)
703 ;
704}
705
706
707static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
708{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100709 struct intel_hdmi_spec *spec = codec->spec;
Wu, Fengguang91504872008-11-05 11:16:56 +0800710 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
711 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
712
Wu Fengguang54a25f82009-10-30 11:44:26 +0100713 if (hda_node_index(spec->pin, tag) < 0) {
Wu Fengguang03284c82008-11-22 09:40:53 +0800714 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
Wu, Fengguang91504872008-11-05 11:16:56 +0800715 return;
716 }
717
718 if (subtag == 0)
719 hdmi_intrinsic_event(codec, res);
720 else
721 hdmi_non_intrinsic_event(codec, res);
722}
723
724/*
725 * Callbacks
726 */
727
Wu, Fengguang91504872008-11-05 11:16:56 +0800728static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
729 struct hda_codec *codec,
730 unsigned int stream_tag,
731 unsigned int format,
732 struct snd_pcm_substream *substream)
733{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100734 hdmi_set_channel_count(codec, hinfo->nid,
Wu Fengguang7bedb012009-10-30 11:41:44 +0100735 substream->runtime->channels);
Wu, Fengguang91504872008-11-05 11:16:56 +0800736
Wu Fengguang54a25f82009-10-30 11:44:26 +0100737 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
Wu, Fengguang91504872008-11-05 11:16:56 +0800738
Wu Fengguang7bedb012009-10-30 11:41:44 +0100739 snd_hda_codec_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
Wu, Fengguang91504872008-11-05 11:16:56 +0800740 return 0;
741}
742
Wu Fengguangddb81522009-10-30 11:43:03 +0100743static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
744 struct hda_codec *codec,
745 struct snd_pcm_substream *substream)
746{
747 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100748 int i;
Wu Fengguangddb81522009-10-30 11:43:03 +0100749
Wu Fengguang54a25f82009-10-30 11:44:26 +0100750 for (i = 0; i < spec->num_pins; i++) {
751 if (spec->pin_cvt[i] != hinfo->nid)
752 continue;
753
754 hdmi_stop_infoframe_trans(codec, spec->pin[i]);
755 }
Wu Fengguangddb81522009-10-30 11:43:03 +0100756
757 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
758 return 0;
759}
760
Wu, Fengguang91504872008-11-05 11:16:56 +0800761static struct hda_pcm_stream intel_hdmi_pcm_playback = {
762 .substreams = 1,
763 .channels_min = 2,
Wu, Fengguang91504872008-11-05 11:16:56 +0800764 .ops = {
Wu Fengguang70ca35f2009-10-30 11:42:18 +0100765 .prepare = intel_hdmi_playback_pcm_prepare,
766 .cleanup = intel_hdmi_playback_pcm_cleanup,
Wu, Fengguang91504872008-11-05 11:16:56 +0800767 },
768};
769
770static int intel_hdmi_build_pcms(struct hda_codec *codec)
771{
772 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100773 struct hda_pcm *info = spec->pcm_rec;
774 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800775
Wu Fengguang54a25f82009-10-30 11:44:26 +0100776 codec->num_pcms = spec->num_cvts;
Wu, Fengguang91504872008-11-05 11:16:56 +0800777 codec->pcm_info = info;
778
Wu Fengguang54a25f82009-10-30 11:44:26 +0100779 for (i = 0; i < codec->num_pcms; i++, info++) {
Wu Fengguang69fb3462009-10-30 11:45:04 +0100780 unsigned int chans;
781
782 chans = get_wcaps(codec, spec->cvt[i]);
783 chans = get_wcaps_channels(chans);
784
Wu Fengguang54a25f82009-10-30 11:44:26 +0100785 info->name = intel_hdmi_pcm_names[i];
786 info->pcm_type = HDA_PCM_TYPE_HDMI;
787 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
788 intel_hdmi_pcm_playback;
789 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
Wu Fengguang69fb3462009-10-30 11:45:04 +0100790 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100791 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800792
793 return 0;
794}
795
796static int intel_hdmi_build_controls(struct hda_codec *codec)
797{
798 struct intel_hdmi_spec *spec = codec->spec;
799 int err;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100800 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800801
Wu Fengguang54a25f82009-10-30 11:44:26 +0100802 for (i = 0; i < codec->num_pcms; i++) {
803 err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
804 if (err < 0)
805 return err;
806 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800807
808 return 0;
809}
810
811static int intel_hdmi_init(struct hda_codec *codec)
812{
Wu Fengguang54a25f82009-10-30 11:44:26 +0100813 struct intel_hdmi_spec *spec = codec->spec;
814 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800815
Wu Fengguang54a25f82009-10-30 11:44:26 +0100816 for (i = 0; spec->pin[i]; i++) {
817 hdmi_enable_output(codec, spec->pin[i]);
818 snd_hda_codec_write(codec, spec->pin[i], 0,
819 AC_VERB_SET_UNSOLICITED_ENABLE,
820 AC_USRSP_EN | spec->pin[i]);
821 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800822 return 0;
823}
824
825static void intel_hdmi_free(struct hda_codec *codec)
826{
Takashi Iwaif208dba2008-11-21 09:11:50 +0100827 struct intel_hdmi_spec *spec = codec->spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100828 int i;
Takashi Iwaif208dba2008-11-21 09:11:50 +0100829
Wu Fengguang54a25f82009-10-30 11:44:26 +0100830 for (i = 0; i < spec->num_pins; i++)
831 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
832
Takashi Iwaif208dba2008-11-21 09:11:50 +0100833 kfree(spec);
Wu, Fengguang91504872008-11-05 11:16:56 +0800834}
835
836static struct hda_codec_ops intel_hdmi_patch_ops = {
837 .init = intel_hdmi_init,
838 .free = intel_hdmi_free,
839 .build_pcms = intel_hdmi_build_pcms,
840 .build_controls = intel_hdmi_build_controls,
841 .unsol_event = intel_hdmi_unsol_event,
842};
843
Wu Fengguangfd080b22009-10-30 11:46:22 +0100844static int patch_intel_hdmi(struct hda_codec *codec)
Wu, Fengguang91504872008-11-05 11:16:56 +0800845{
846 struct intel_hdmi_spec *spec;
Wu Fengguang54a25f82009-10-30 11:44:26 +0100847 int i;
Wu, Fengguang91504872008-11-05 11:16:56 +0800848
849 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
850 if (spec == NULL)
851 return -ENOMEM;
852
Wu, Fengguang91504872008-11-05 11:16:56 +0800853 codec->spec = spec;
Wu Fengguangf4243672009-10-30 11:45:35 +0100854 if (intel_hdmi_parse_codec(codec) < 0) {
855 codec->spec = NULL;
856 kfree(spec);
857 return -EINVAL;
858 }
Wu, Fengguang91504872008-11-05 11:16:56 +0800859 codec->patch_ops = intel_hdmi_patch_ops;
860
Wu Fengguang54a25f82009-10-30 11:44:26 +0100861 for (i = 0; i < spec->num_pins; i++)
862 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
Wu Fengguang5f1e71b2008-11-18 11:47:53 +0800863
Wu Fengguang698544d2008-11-19 08:56:17 +0800864 init_channel_allocations();
865
Wu, Fengguang91504872008-11-05 11:16:56 +0800866 return 0;
867}
868
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100869static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
Takashi Iwai74c61132008-12-18 09:11:33 +0100870 { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
871 { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
872 { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
873 { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
Wu Fengguangfd080b22009-10-30 11:46:22 +0100874 { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
875 { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
Wu Fengguang3a95cb92008-11-13 10:19:38 +0800876 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
Wu, Fengguang91504872008-11-05 11:16:56 +0800877 {} /* terminator */
878};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100879
880MODULE_ALIAS("snd-hda-codec-id:808629fb");
881MODULE_ALIAS("snd-hda-codec-id:80862801");
882MODULE_ALIAS("snd-hda-codec-id:80862802");
883MODULE_ALIAS("snd-hda-codec-id:80862803");
Wu Fengguanga57c0eb2009-02-11 15:22:31 +0800884MODULE_ALIAS("snd-hda-codec-id:80862804");
Jaroslav Kysela87a8c372009-07-23 10:58:29 +0200885MODULE_ALIAS("snd-hda-codec-id:80860054");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100886MODULE_ALIAS("snd-hda-codec-id:10951392");
887
888MODULE_LICENSE("GPL");
889MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
890
891static struct hda_codec_preset_list intel_list = {
892 .preset = snd_hda_preset_intelhdmi,
893 .owner = THIS_MODULE,
894};
895
896static int __init patch_intelhdmi_init(void)
897{
898 return snd_hda_add_codec_preset(&intel_list);
899}
900
901static void __exit patch_intelhdmi_exit(void)
902{
903 snd_hda_delete_codec_preset(&intel_list);
904}
905
906module_init(patch_intelhdmi_init)
907module_exit(patch_intelhdmi_exit)