Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 1 | #ifndef __NOUVEAU_DRMCLI_H__ |
| 2 | #define __NOUVEAU_DRMCLI_H__ |
| 3 | |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 4 | #define DRIVER_AUTHOR "Nouveau Project" |
| 5 | #define DRIVER_EMAIL "nouveau@lists.freedesktop.org" |
| 6 | |
| 7 | #define DRIVER_NAME "nouveau" |
| 8 | #define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla" |
| 9 | #define DRIVER_DATE "20120801" |
| 10 | |
| 11 | #define DRIVER_MAJOR 1 |
| 12 | #define DRIVER_MINOR 1 |
Christoph Bumiller | 142c21b | 2013-03-27 22:25:52 +0100 | [diff] [blame] | 13 | #define DRIVER_PATCHLEVEL 1 |
| 14 | |
| 15 | /* |
| 16 | * 1.1.1: |
| 17 | * - added support for tiled system memory buffer objects |
| 18 | * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0]. |
| 19 | * - added support for compressed memory storage types on [nvc0,nve0]. |
| 20 | * - added support for software methods 0x600,0x644,0x6ac on nvc0 |
| 21 | * to control registers on the MPs to enable performance counters, |
| 22 | * and to control the warp error enable mask (OpenGL requires out of |
| 23 | * bounds access to local memory to be silently ignored / return 0). |
| 24 | */ |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 25 | |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 26 | #include <core/client.h> |
Ben Skeggs | 1d7c71a | 2013-01-31 09:23:34 +1000 | [diff] [blame] | 27 | #include <core/event.h> |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 28 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 29 | #include <subdev/vm.h> |
| 30 | |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 31 | #include <drmP.h> |
| 32 | #include <drm/nouveau_drm.h> |
| 33 | |
Linus Torvalds | 612a9aa | 2012-10-03 23:29:23 -0700 | [diff] [blame] | 34 | #include <drm/ttm/ttm_bo_api.h> |
| 35 | #include <drm/ttm/ttm_bo_driver.h> |
| 36 | #include <drm/ttm/ttm_placement.h> |
| 37 | #include <drm/ttm/ttm_memory.h> |
| 38 | #include <drm/ttm/ttm_module.h> |
| 39 | #include <drm/ttm/ttm_page_alloc.h> |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 40 | |
| 41 | struct nouveau_channel; |
| 42 | |
| 43 | #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) |
| 44 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 45 | #include "nouveau_fence.h" |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 46 | #include "nouveau_bios.h" |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 47 | |
| 48 | struct nouveau_drm_tile { |
| 49 | struct nouveau_fence *fence; |
| 50 | bool used; |
| 51 | }; |
| 52 | |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 53 | enum nouveau_drm_handle { |
| 54 | NVDRM_CLIENT = 0xffffffff, |
| 55 | NVDRM_DEVICE = 0xdddddddd, |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 56 | NVDRM_PUSH = 0xbbbb0000, /* |= client chid */ |
| 57 | NVDRM_CHAN = 0xcccc0000, /* |= client chid */ |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 58 | }; |
| 59 | |
| 60 | struct nouveau_cli { |
| 61 | struct nouveau_client base; |
| 62 | struct list_head head; |
| 63 | struct mutex mutex; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 64 | void *abi16; |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 65 | }; |
| 66 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 67 | static inline struct nouveau_cli * |
| 68 | nouveau_cli(struct drm_file *fpriv) |
| 69 | { |
| 70 | return fpriv ? fpriv->driver_priv : NULL; |
| 71 | } |
| 72 | |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 73 | struct nouveau_drm { |
| 74 | struct nouveau_cli client; |
| 75 | struct drm_device *dev; |
| 76 | |
| 77 | struct nouveau_object *device; |
| 78 | struct list_head clients; |
Ben Skeggs | cb75d97 | 2012-07-11 10:44:20 +1000 | [diff] [blame] | 79 | |
| 80 | struct { |
| 81 | enum { |
| 82 | UNKNOWN = 0, |
| 83 | DISABLE = 1, |
| 84 | ENABLED = 2 |
| 85 | } stat; |
| 86 | u32 base; |
| 87 | u32 size; |
| 88 | } agp; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 89 | |
| 90 | /* TTM interface support */ |
| 91 | struct { |
| 92 | struct drm_global_reference mem_global_ref; |
| 93 | struct ttm_bo_global_ref bo_global_ref; |
| 94 | struct ttm_bo_device bdev; |
| 95 | atomic_t validate_sequence; |
| 96 | int (*move)(struct nouveau_channel *, |
| 97 | struct ttm_buffer_object *, |
| 98 | struct ttm_mem_reg *, struct ttm_mem_reg *); |
Ben Skeggs | 1bb3f6a | 2013-07-08 10:40:35 +1000 | [diff] [blame] | 99 | struct nouveau_channel *chan; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 100 | int mtrr; |
| 101 | } ttm; |
| 102 | |
| 103 | /* GEM interface support */ |
| 104 | struct { |
| 105 | u64 vram_available; |
| 106 | u64 gart_available; |
| 107 | } gem; |
| 108 | |
| 109 | /* synchronisation */ |
| 110 | void *fence; |
| 111 | |
| 112 | /* context for accelerated drm-internal operations */ |
Ben Skeggs | 4998104 | 2012-08-06 19:38:25 +1000 | [diff] [blame] | 113 | struct nouveau_channel *cechan; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 114 | struct nouveau_channel *channel; |
| 115 | struct nouveau_gpuobj *notify; |
| 116 | struct nouveau_fbdev *fbcon; |
| 117 | |
| 118 | /* nv10-nv40 tiling regions */ |
| 119 | struct { |
| 120 | struct nouveau_drm_tile reg[15]; |
| 121 | spinlock_t lock; |
| 122 | } tile; |
Ben Skeggs | 51a3d34 | 2012-07-26 09:12:47 +1000 | [diff] [blame] | 123 | |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 124 | /* modesetting */ |
| 125 | struct nvbios vbios; |
| 126 | struct nouveau_display *display; |
Ben Skeggs | 51a3d34 | 2012-07-26 09:12:47 +1000 | [diff] [blame] | 127 | struct backlight_device *backlight; |
Maarten Lankhorst | e4604d8 | 2013-03-24 12:56:30 +0100 | [diff] [blame] | 128 | struct nouveau_eventh vblank[4]; |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 129 | |
| 130 | /* power management */ |
| 131 | struct nouveau_pm *pm; |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 132 | }; |
| 133 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 134 | static inline struct nouveau_drm * |
| 135 | nouveau_drm(struct drm_device *dev) |
| 136 | { |
Ben Skeggs | 77145f1 | 2012-07-31 16:16:21 +1000 | [diff] [blame] | 137 | return dev->dev_private; |
| 138 | } |
| 139 | |
| 140 | static inline struct nouveau_device * |
| 141 | nouveau_dev(struct drm_device *dev) |
| 142 | { |
| 143 | return nv_device(nouveau_drm(dev)->device); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 144 | } |
| 145 | |
Dave Airlie | 2d8b9cc | 2012-11-02 11:04:28 +1000 | [diff] [blame] | 146 | int nouveau_pmops_suspend(struct device *); |
| 147 | int nouveau_pmops_resume(struct device *); |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 148 | |
Ben Skeggs | aa74c37 | 2012-09-12 13:38:13 +1000 | [diff] [blame] | 149 | #define NV_FATAL(cli, fmt, args...) nv_fatal((cli), fmt, ##args) |
| 150 | #define NV_ERROR(cli, fmt, args...) nv_error((cli), fmt, ##args) |
| 151 | #define NV_WARN(cli, fmt, args...) nv_warn((cli), fmt, ##args) |
| 152 | #define NV_INFO(cli, fmt, args...) nv_info((cli), fmt, ##args) |
| 153 | #define NV_DEBUG(cli, fmt, args...) do { \ |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 154 | if (drm_debug & DRM_UT_DRIVER) \ |
Ben Skeggs | aa74c37 | 2012-09-12 13:38:13 +1000 | [diff] [blame] | 155 | nv_info((cli), fmt, ##args); \ |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 156 | } while (0) |
| 157 | |
Ben Skeggs | 9430738 | 2012-10-31 12:11:15 +1000 | [diff] [blame] | 158 | extern int nouveau_modeset; |
| 159 | |
Ben Skeggs | 9458029 | 2012-07-06 12:14:00 +1000 | [diff] [blame] | 160 | #endif |