| Daniel Mack | 364dbdf | 2010-11-04 14:44:00 -0400 | [diff] [blame] | 1 | #ifndef __PXA3XX_GCU_H__ |
| 2 | #define __PXA3XX_GCU_H__ |
| 3 | |
| 4 | #include <linux/types.h> |
| 5 | |
| 6 | /* Number of 32bit words in display list (ring buffer). */ |
| 7 | #define PXA3XX_GCU_BUFFER_WORDS ((256 * 1024 - 256) / 4) |
| 8 | |
| 9 | /* To be increased when breaking the ABI */ |
| 10 | #define PXA3XX_GCU_SHARED_MAGIC 0x30000001 |
| 11 | |
| 12 | #define PXA3XX_GCU_BATCH_WORDS 8192 |
| 13 | |
| 14 | struct pxa3xx_gcu_shared { |
| 15 | u32 buffer[PXA3XX_GCU_BUFFER_WORDS]; |
| 16 | |
| 17 | bool hw_running; |
| 18 | |
| 19 | unsigned long buffer_phys; |
| 20 | |
| 21 | unsigned int num_words; |
| 22 | unsigned int num_writes; |
| 23 | unsigned int num_done; |
| 24 | unsigned int num_interrupts; |
| 25 | unsigned int num_wait_idle; |
| 26 | unsigned int num_wait_free; |
| 27 | unsigned int num_idle; |
| 28 | |
| 29 | u32 magic; |
| 30 | }; |
| 31 | |
| 32 | /* Initialization and synchronization. |
| 33 | * Hardware is started upon write(). */ |
| 34 | #define PXA3XX_GCU_IOCTL_RESET _IO('G', 0) |
| 35 | #define PXA3XX_GCU_IOCTL_WAIT_IDLE _IO('G', 2) |
| 36 | |
| 37 | #endif /* __PXA3XX_GCU_H__ */ |
| 38 | |