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Ben Dooksdcb09022008-10-21 14:06:42 +01001/* linux/arch/arm/mach-s3c6400/include/mach/map.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Memory map definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_MAP_H
16#define __ASM_ARCH_MAP_H __FILE__
17
18#include <plat/map-base.h>
Kukjin Kimae79ac52011-08-30 16:49:36 +090019#include <plat/map-s3c.h>
Ben Dooksdcb09022008-10-21 14:06:42 +010020
Andy Greena7c91942009-12-29 14:40:23 +000021/*
22 * Post-mux Chip Select Regions Xm0CSn_
23 * These may be used by SROM, NAND or CF depending on settings
24 */
25
26#define S3C64XX_PA_XM0CSN0 (0x10000000)
27#define S3C64XX_PA_XM0CSN1 (0x18000000)
28#define S3C64XX_PA_XM0CSN2 (0x20000000)
29#define S3C64XX_PA_XM0CSN3 (0x28000000)
30#define S3C64XX_PA_XM0CSN4 (0x30000000)
31#define S3C64XX_PA_XM0CSN5 (0x38000000)
32
Ben Dooks5b323c72008-10-31 16:14:28 +000033/* HSMMC units */
34#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
35#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
36#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1)
37#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2)
38
Ben Dooksdcb09022008-10-21 14:06:42 +010039#define S3C_PA_UART (0x7F005000)
40#define S3C_PA_UART0 (S3C_PA_UART + 0x00)
41#define S3C_PA_UART1 (S3C_PA_UART + 0x400)
42#define S3C_PA_UART2 (S3C_PA_UART + 0x800)
43#define S3C_PA_UART3 (S3C_PA_UART + 0xC00)
44#define S3C_UART_OFFSET (0x400)
45
Ben Dooks3e694d42008-10-21 14:07:05 +010046/* See notes on UART VA mapping in debug-macro.S */
47#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
48
49#define S3C_VA_UART0 S3C_VA_UARTx(0)
50#define S3C_VA_UART1 S3C_VA_UARTx(1)
51#define S3C_VA_UART2 S3C_VA_UARTx(2)
52#define S3C_VA_UART3 S3C_VA_UARTx(3)
53
Andy Green810f6132009-12-29 14:40:30 +000054#define S3C64XX_PA_SROM (0x70000000)
55
Marek Szyprowski999304b2010-05-20 08:59:05 +020056#define S3C64XX_PA_ONENAND0 (0x70100000)
57#define S3C64XX_PA_ONENAND0_BUF (0x20000000)
58#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
59
60/* NAND and OneNAND1 controllers occupy the same register region
61 (depending on SoC POP version) */
62#define S3C64XX_PA_ONENAND1 (0x70200000)
63#define S3C64XX_PA_ONENAND1_BUF (0x28000000)
64#define S3C64XX_SZ_ONENAND1_BUF (SZ_64M)
65
Peter Korsgaard14077ea2009-07-01 17:47:06 +020066#define S3C64XX_PA_NAND (0x70200000)
Ben Dooks58435f72008-11-19 15:41:31 +000067#define S3C64XX_PA_FB (0x77100000)
Ben Dooksf0e1fa72009-05-16 22:05:27 +010068#define S3C64XX_PA_USB_HSOTG (0x7C000000)
Ben Dooks543899f2009-05-17 23:40:30 +010069#define S3C64XX_PA_WATCHDOG (0x7E004000)
Maurus Cuelenaere20609092010-01-12 01:40:14 +010070#define S3C64XX_PA_RTC (0x7E005000)
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090071#define S3C64XX_PA_KEYPAD (0x7E00A000)
Maurus Cuelenaerebcedfa92010-01-14 00:30:34 +010072#define S3C64XX_PA_ADC (0x7E00B000)
Ben Dooksbeda30f2008-10-21 14:06:49 +010073#define S3C64XX_PA_SYSCON (0x7E00F000)
Mark Brownc7c8f612009-08-05 18:21:59 +010074#define S3C64XX_PA_AC97 (0x7F001000)
Ben Dooks5ef316f2009-02-03 23:48:54 +000075#define S3C64XX_PA_IIS0 (0x7F002000)
76#define S3C64XX_PA_IIS1 (0x7F003000)
Ben Dooksdcb09022008-10-21 14:06:42 +010077#define S3C64XX_PA_TIMER (0x7F006000)
Ben Dooks3e1b7762008-10-31 16:14:40 +000078#define S3C64XX_PA_IIC0 (0x7F004000)
Jassi Brar10f9f742010-01-18 16:15:07 +090079#define S3C64XX_PA_SPI0 (0x7F00B000)
80#define S3C64XX_PA_SPI1 (0x7F00C000)
Jassi Brar93f85132009-11-17 16:53:38 +090081#define S3C64XX_PA_PCM0 (0x7F009000)
82#define S3C64XX_PA_PCM1 (0x7F00A000)
Mark Brown25b15da2009-08-04 16:25:12 +010083#define S3C64XX_PA_IISV4 (0x7F00D000)
Ben Dooks1aba8342008-10-31 16:14:55 +000084#define S3C64XX_PA_IIC1 (0x7F00F000)
Ben Dooksdcb09022008-10-21 14:06:42 +010085
Ben Dooks94df8682008-10-21 14:07:07 +010086#define S3C64XX_PA_GPIO (0x7F008000)
Ben Dooks94df8682008-10-21 14:07:07 +010087#define S3C64XX_SZ_GPIO SZ_4K
88
Ben Dooksdcb09022008-10-21 14:06:42 +010089#define S3C64XX_PA_SDRAM (0x50000000)
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +090090
91#define S3C64XX_PA_CFCON (0x70300000)
92
Ben Dooksdcb09022008-10-21 14:06:42 +010093#define S3C64XX_PA_VIC0 (0x71200000)
94#define S3C64XX_PA_VIC1 (0x71300000)
95
Ben Dooks5b3d5152008-12-12 00:24:38 +000096#define S3C64XX_PA_MODEM (0x74108000)
Ben Dooks5b3d5152008-12-12 00:24:38 +000097
Ben Dooks67b3e542009-03-06 19:51:51 +000098#define S3C64XX_PA_USBHOST (0x74300000)
99
Maurus Cuelenaere23196a42009-11-20 13:04:08 +0100100#define S3C64XX_PA_USB_HSPHY (0x7C100000)
Ben Dooksdcb09022008-10-21 14:06:42 +0100101
102/* compatibiltiy defines. */
103#define S3C_PA_TIMER S3C64XX_PA_TIMER
Ben Dooks5b323c72008-10-31 16:14:28 +0000104#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
105#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1
106#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2
Ben Dooks3e1b7762008-10-31 16:14:40 +0000107#define S3C_PA_IIC S3C64XX_PA_IIC0
Ben Dooks1aba8342008-10-31 16:14:55 +0000108#define S3C_PA_IIC1 S3C64XX_PA_IIC1
Peter Korsgaard14077ea2009-07-01 17:47:06 +0200109#define S3C_PA_NAND S3C64XX_PA_NAND
Marek Szyprowski999304b2010-05-20 08:59:05 +0200110#define S3C_PA_ONENAND S3C64XX_PA_ONENAND0
111#define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF
112#define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF
Ben Dooks58435f72008-11-19 15:41:31 +0000113#define S3C_PA_FB S3C64XX_PA_FB
Ben Dooks67b3e542009-03-06 19:51:51 +0000114#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
Ben Dooksf0e1fa72009-05-16 22:05:27 +0100115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
Atul Dahiyaadc0950c2010-05-18 14:58:56 +0900116#define S3C_PA_RTC S3C64XX_PA_RTC
Banajit Goswamib351c4a2010-05-20 16:21:30 +0900117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
Padmavathi Venna4566c7f2011-12-23 10:14:36 +0900118#define S3C_PA_SPI0 S3C64XX_PA_SPI0
119#define S3C_PA_SPI1 S3C64XX_PA_SPI1
Ben Dooksdcb09022008-10-21 14:06:42 +0100120
Naveen Krishna4f7cdc32010-05-13 22:06:36 +0900121#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900122#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900123#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
Ben Dooksdcb09022008-10-21 14:06:42 +0100124
125#endif /* __ASM_ARCH_6400_MAP_H */