blob: a77604fbaf257acef8e2c546dd267a5e2ef501af [file] [log] [blame]
Maxime Ripard559482d2014-04-28 16:03:20 -07001menuconfig ARCH_SUNXI
2 bool "Allwinner SoCs" if ARCH_MULTI_V7
Maxime Ripard19a280a2013-05-12 15:06:51 +02003 select ARCH_REQUIRE_GPIOLIB
Maxime Ripard3b526342012-11-08 12:40:16 +01004 select CLKSRC_MMIO
Maxime Ripard3b526342012-11-08 12:40:16 +01005 select GENERIC_IRQ_CHIP
6 select PINCTRL
Maxime Ripard119fd632013-03-24 11:49:25 +01007 select SUN4I_TIMER
Maxime Ripard559482d2014-04-28 16:03:20 -07008
9if ARCH_SUNXI
10
11config MACH_SUN4I
12 bool "Allwinner A10 (sun4i) SoCs support"
13 default ARCH_SUNXI
14
15config MACH_SUN5I
16 bool "Allwinner A10s / A13 (sun5i) SoCs support"
17 default ARCH_SUNXI
Maxime Ripard67905542013-11-07 12:01:48 +010018 select SUN5I_HSTIMER
Maxime Ripard559482d2014-04-28 16:03:20 -070019
20config MACH_SUN6I
21 bool "Allwinner A31 (sun6i) SoCs support"
22 default ARCH_SUNXI
23 select ARCH_HAS_RESET_CONTROLLER
24 select ARM_GIC
Boris BREZILLON324da932014-05-15 10:55:13 +020025 select MFD_SUN6I_PRCM
Maxime Ripard559482d2014-04-28 16:03:20 -070026 select RESET_CONTROLLER
27 select SUN5I_HSTIMER
28
29config MACH_SUN7I
30 bool "Allwinner A20 (sun7i) SoCs support"
31 default ARCH_SUNXI
32 select ARM_GIC
33 select ARM_PSCI
34 select HAVE_ARM_ARCH_TIMER
35 select SUN5I_HSTIMER
36
Chen-Yu Tsaiac84b792014-06-20 22:52:50 +080037config MACH_SUN8I
38 bool "Allwinner A23 (sun8i) SoCs support"
39 default ARCH_SUNXI
Chen-Yu Tsai5ba16572014-07-03 22:55:47 +080040 select ARCH_HAS_RESET_CONTROLLER
Chen-Yu Tsaiac84b792014-06-20 22:52:50 +080041 select ARM_GIC
Chen-Yu Tsai5ba16572014-07-03 22:55:47 +080042 select MFD_SUN6I_PRCM
43 select RESET_CONTROLLER
Chen-Yu Tsaiac84b792014-06-20 22:52:50 +080044
Chen-Yu Tsai3d4c2f12014-10-08 21:02:52 +080045config MACH_SUN9I
46 bool "Allwinner (sun9i) SoCs support"
47 default ARCH_SUNXI
Chen-Yu Tsai2f4bc732014-10-12 17:40:24 +080048 select ARCH_HAS_RESET_CONTROLLER
Chen-Yu Tsai3d4c2f12014-10-08 21:02:52 +080049 select ARM_GIC
Chen-Yu Tsai2f4bc732014-10-12 17:40:24 +080050 select RESET_CONTROLLER
Chen-Yu Tsai3d4c2f12014-10-08 21:02:52 +080051
Maxime Ripard559482d2014-04-28 16:03:20 -070052endif