blob: 17510f54e4a7e2cf8bf768fa54e993632ead51a3 [file] [log] [blame]
Joonyoung Shim864ee9e2011-12-08 17:54:07 +09001/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include "drmP.h"
13
14#include "exynos_drm.h"
15#include "exynos_drm_crtc.h"
16#include "exynos_drm_drv.h"
17#include "exynos_drm_encoder.h"
18
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090019#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
20
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090021struct exynos_plane {
22 struct drm_plane base;
23 struct exynos_drm_overlay overlay;
24 bool enabled;
25};
26
Eunchul Kimba3849d2012-03-16 18:47:15 +090027static const uint32_t formats[] = {
28 DRM_FORMAT_XRGB8888,
Seung-Woo Kim6b1c7622012-04-05 11:21:09 +090029 DRM_FORMAT_ARGB8888,
30 DRM_FORMAT_NV12,
31 DRM_FORMAT_NV12M,
32 DRM_FORMAT_NV12MT,
Eunchul Kimba3849d2012-03-16 18:47:15 +090033};
34
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090035static int
36exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
37 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
38 unsigned int crtc_w, unsigned int crtc_h,
39 uint32_t src_x, uint32_t src_y,
40 uint32_t src_w, uint32_t src_h)
41{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090042 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090043 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
44 struct exynos_drm_crtc_pos pos;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090045 int ret;
46
47 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
48
49 memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
50 pos.crtc_x = crtc_x;
51 pos.crtc_y = crtc_y;
52 pos.crtc_w = crtc_w;
53 pos.crtc_h = crtc_h;
54
Seung-Woo Kim0d8071ee2012-04-24 18:43:10 +090055 /* considering 16.16 fixed point of source values */
56 pos.fb_x = src_x >> 16;
57 pos.fb_y = src_y >> 16;
58 pos.src_w = src_w >> 16;
59 pos.src_h = src_h >> 16;
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090060
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090061 ret = exynos_drm_overlay_update(overlay, fb, &crtc->mode, &pos);
62 if (ret < 0)
63 return ret;
64
65 exynos_drm_fn_encoder(crtc, overlay,
66 exynos_drm_encoder_crtc_mode_set);
67 exynos_drm_fn_encoder(crtc, &overlay->zpos,
68 exynos_drm_encoder_crtc_plane_commit);
69
70 exynos_plane->enabled = true;
71
72 return 0;
73}
74
75static int exynos_disable_plane(struct drm_plane *plane)
76{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090077 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090078 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
79
80 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
81
82 if (!exynos_plane->enabled)
83 return 0;
84
85 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
86 exynos_drm_encoder_crtc_disable);
87
88 exynos_plane->enabled = false;
89 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
90
91 return 0;
92}
93
94static void exynos_plane_destroy(struct drm_plane *plane)
95{
Joonyoung Shimfdc575e2012-06-27 14:27:03 +090096 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +090097
98 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
99
100 exynos_disable_plane(plane);
101 drm_plane_cleanup(plane);
102 kfree(exynos_plane);
103}
104
105static struct drm_plane_funcs exynos_plane_funcs = {
106 .update_plane = exynos_update_plane,
107 .disable_plane = exynos_disable_plane,
108 .destroy = exynos_plane_destroy,
109};
110
111int exynos_plane_init(struct drm_device *dev, unsigned int nr)
112{
113 struct exynos_plane *exynos_plane;
114 uint32_t possible_crtcs;
115
116 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
117 if (!exynos_plane)
118 return -ENOMEM;
119
120 /* all CRTCs are available */
121 possible_crtcs = (1 << MAX_CRTC) - 1;
122
123 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
124
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900125 return drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
Eunchul Kimba3849d2012-03-16 18:47:15 +0900126 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
127 false);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900128}
129
130int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
131 struct drm_file *file_priv)
132{
133 struct drm_exynos_plane_set_zpos *zpos_req = data;
134 struct drm_mode_object *obj;
135 struct drm_plane *plane;
136 struct exynos_plane *exynos_plane;
137 int ret = 0;
138
139 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
140
141 if (!drm_core_check_feature(dev, DRIVER_MODESET))
142 return -EINVAL;
143
144 if (zpos_req->zpos < 0 || zpos_req->zpos >= MAX_PLANE) {
145 if (zpos_req->zpos != DEFAULT_ZPOS) {
146 DRM_ERROR("zpos not within limits\n");
147 return -EINVAL;
148 }
149 }
150
151 mutex_lock(&dev->mode_config.mutex);
152
153 obj = drm_mode_object_find(dev, zpos_req->plane_id,
154 DRM_MODE_OBJECT_PLANE);
155 if (!obj) {
156 DRM_DEBUG_KMS("Unknown plane ID %d\n",
157 zpos_req->plane_id);
158 ret = -EINVAL;
159 goto out;
160 }
161
162 plane = obj_to_plane(obj);
Joonyoung Shimfdc575e2012-06-27 14:27:03 +0900163 exynos_plane = to_exynos_plane(plane);
Joonyoung Shim864ee9e2011-12-08 17:54:07 +0900164
165 exynos_plane->overlay.zpos = zpos_req->zpos;
166
167out:
168 mutex_unlock(&dev->mode_config.mutex);
169 return ret;
170}