Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 1 | /* |
| 2 | * twl-common.c |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments, Inc.. |
| 5 | * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 19 | * 02110-1301 USA |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | #include <linux/i2c.h> |
| 24 | #include <linux/i2c/twl.h> |
| 25 | #include <linux/gpio.h> |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 26 | #include <linux/regulator/machine.h> |
| 27 | #include <linux/regulator/fixed.h> |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 28 | |
| 29 | #include <plat/i2c.h> |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 30 | #include <plat/usb.h> |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 31 | |
| 32 | #include "twl-common.h" |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 33 | #include "pm.h" |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 34 | #include "voltage.h" |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 35 | |
| 36 | static struct i2c_board_info __initdata pmic_i2c_board_info = { |
| 37 | .addr = 0x48, |
| 38 | .flags = I2C_CLIENT_WAKE, |
| 39 | }; |
| 40 | |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 41 | static struct i2c_board_info __initdata omap4_i2c1_board_info[] = { |
| 42 | { |
| 43 | .addr = 0x48, |
| 44 | .flags = I2C_CLIENT_WAKE, |
| 45 | }, |
| 46 | { |
| 47 | I2C_BOARD_INFO("twl6040", 0x4b), |
| 48 | }, |
| 49 | }; |
| 50 | |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 51 | static int twl_set_voltage(void *data, int target_uV) |
| 52 | { |
| 53 | struct voltagedomain *voltdm = (struct voltagedomain *)data; |
| 54 | return voltdm_scale(voltdm, target_uV); |
| 55 | } |
| 56 | |
| 57 | static int twl_get_voltage(void *data) |
| 58 | { |
| 59 | struct voltagedomain *voltdm = (struct voltagedomain *)data; |
| 60 | return voltdm_get_voltage(voltdm); |
| 61 | } |
| 62 | |
Peter Ujfalusi | a53b8e3 | 2011-06-04 08:16:41 +0300 | [diff] [blame] | 63 | void __init omap_pmic_init(int bus, u32 clkrate, |
| 64 | const char *pmic_type, int pmic_irq, |
| 65 | struct twl4030_platform_data *pmic_data) |
| 66 | { |
| 67 | strncpy(pmic_i2c_board_info.type, pmic_type, |
| 68 | sizeof(pmic_i2c_board_info.type)); |
| 69 | pmic_i2c_board_info.irq = pmic_irq; |
| 70 | pmic_i2c_board_info.platform_data = pmic_data; |
| 71 | |
| 72 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); |
| 73 | } |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 74 | |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 75 | void __init omap4_pmic_init(const char *pmic_type, |
| 76 | struct twl4030_platform_data *pmic_data, |
| 77 | struct twl6040_platform_data *twl6040_data, int twl6040_irq) |
| 78 | { |
| 79 | /* PMIC part*/ |
| 80 | strncpy(omap4_i2c1_board_info[0].type, pmic_type, |
| 81 | sizeof(omap4_i2c1_board_info[0].type)); |
| 82 | omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; |
| 83 | omap4_i2c1_board_info[0].platform_data = pmic_data; |
| 84 | |
| 85 | /* TWL6040 audio IC part */ |
| 86 | omap4_i2c1_board_info[1].irq = twl6040_irq; |
| 87 | omap4_i2c1_board_info[1].platform_data = twl6040_data; |
| 88 | |
| 89 | omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2); |
| 90 | |
| 91 | } |
| 92 | |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 93 | void __init omap_pmic_late_init(void) |
| 94 | { |
| 95 | /* Init the OMAP TWL parameters (if PMIC has been registerd) */ |
Peter Ujfalusi | 8eaeb93 | 2012-04-03 11:56:51 +0300 | [diff] [blame] | 96 | if (pmic_i2c_board_info.irq) |
| 97 | omap3_twl_init(); |
| 98 | if (omap4_i2c1_board_info[0].irq) |
| 99 | omap4_twl_init(); |
Kevin Hilman | 46232a3 | 2011-11-23 14:43:01 -0800 | [diff] [blame] | 100 | } |
| 101 | |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 102 | #if defined(CONFIG_ARCH_OMAP3) |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 103 | static struct twl4030_usb_data omap3_usb_pdata = { |
| 104 | .usb_mode = T2_USB_MODE_ULPI, |
| 105 | }; |
| 106 | |
| 107 | static int omap3_batt_table[] = { |
| 108 | /* 0 C */ |
| 109 | 30800, 29500, 28300, 27100, |
| 110 | 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, |
| 111 | 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, |
| 112 | 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, |
| 113 | 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, |
| 114 | 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, |
| 115 | 4040, 3910, 3790, 3670, 3550 |
| 116 | }; |
| 117 | |
| 118 | static struct twl4030_bci_platform_data omap3_bci_pdata = { |
| 119 | .battery_tmp_tbl = omap3_batt_table, |
| 120 | .tblsize = ARRAY_SIZE(omap3_batt_table), |
| 121 | }; |
| 122 | |
| 123 | static struct twl4030_madc_platform_data omap3_madc_pdata = { |
| 124 | .irq_line = 1, |
| 125 | }; |
| 126 | |
Peter Ujfalusi | 4ae6df5 | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 127 | static struct twl4030_codec_data omap3_codec; |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 128 | |
Peter Ujfalusi | 4ae6df5 | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 129 | static struct twl4030_audio_data omap3_audio_pdata = { |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 130 | .audio_mclk = 26000000, |
Peter Ujfalusi | 4ae6df5 | 2011-05-31 15:21:13 +0300 | [diff] [blame] | 131 | .codec = &omap3_codec, |
Peter Ujfalusi | 827ed9a | 2011-06-07 10:28:54 +0300 | [diff] [blame] | 132 | }; |
| 133 | |
Peter Ujfalusi | b252b0e | 2011-06-07 11:38:24 +0300 | [diff] [blame] | 134 | static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { |
| 135 | REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), |
| 136 | }; |
| 137 | |
| 138 | static struct regulator_init_data omap3_vdac_idata = { |
| 139 | .constraints = { |
| 140 | .min_uV = 1800000, |
| 141 | .max_uV = 1800000, |
| 142 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 143 | | REGULATOR_MODE_STANDBY, |
| 144 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 145 | | REGULATOR_CHANGE_STATUS, |
| 146 | }, |
| 147 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), |
| 148 | .consumer_supplies = omap3_vdda_dac_supplies, |
| 149 | }; |
| 150 | |
| 151 | static struct regulator_consumer_supply omap3_vpll2_supplies[] = { |
| 152 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), |
Tomi Valkeinen | 7c68dd9 | 2011-08-03 14:00:57 +0300 | [diff] [blame] | 153 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
Peter Ujfalusi | b252b0e | 2011-06-07 11:38:24 +0300 | [diff] [blame] | 154 | }; |
| 155 | |
| 156 | static struct regulator_init_data omap3_vpll2_idata = { |
| 157 | .constraints = { |
| 158 | .min_uV = 1800000, |
| 159 | .max_uV = 1800000, |
| 160 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 161 | | REGULATOR_MODE_STANDBY, |
| 162 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 163 | | REGULATOR_CHANGE_STATUS, |
| 164 | }, |
| 165 | .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), |
| 166 | .consumer_supplies = omap3_vpll2_supplies, |
| 167 | }; |
| 168 | |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 169 | static struct regulator_consumer_supply omap3_vdd1_supply[] = { |
| 170 | REGULATOR_SUPPLY("vcc", "mpu.0"), |
| 171 | }; |
| 172 | |
| 173 | static struct regulator_consumer_supply omap3_vdd2_supply[] = { |
| 174 | REGULATOR_SUPPLY("vcc", "l3_main.0"), |
| 175 | }; |
| 176 | |
| 177 | static struct regulator_init_data omap3_vdd1 = { |
| 178 | .constraints = { |
| 179 | .name = "vdd_mpu_iva", |
| 180 | .min_uV = 600000, |
| 181 | .max_uV = 1450000, |
| 182 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 183 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 184 | }, |
| 185 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply), |
| 186 | .consumer_supplies = omap3_vdd1_supply, |
| 187 | }; |
| 188 | |
| 189 | static struct regulator_init_data omap3_vdd2 = { |
| 190 | .constraints = { |
| 191 | .name = "vdd_core", |
| 192 | .min_uV = 600000, |
| 193 | .max_uV = 1450000, |
| 194 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 195 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 196 | }, |
| 197 | .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply), |
| 198 | .consumer_supplies = omap3_vdd2_supply, |
| 199 | }; |
| 200 | |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 201 | static struct twl_regulator_driver_data omap3_vdd1_drvdata = { |
| 202 | .get_voltage = twl_get_voltage, |
| 203 | .set_voltage = twl_set_voltage, |
| 204 | }; |
| 205 | |
| 206 | static struct twl_regulator_driver_data omap3_vdd2_drvdata = { |
| 207 | .get_voltage = twl_get_voltage, |
| 208 | .set_voltage = twl_set_voltage, |
| 209 | }; |
| 210 | |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 211 | void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, |
| 212 | u32 pdata_flags, u32 regulators_flags) |
| 213 | { |
| 214 | if (!pmic_data->irq_base) |
| 215 | pmic_data->irq_base = TWL4030_IRQ_BASE; |
| 216 | if (!pmic_data->irq_end) |
| 217 | pmic_data->irq_end = TWL4030_IRQ_END; |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 218 | if (!pmic_data->vdd1) { |
| 219 | omap3_vdd1.driver_data = &omap3_vdd1_drvdata; |
| 220 | omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva"); |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 221 | pmic_data->vdd1 = &omap3_vdd1; |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 222 | } |
| 223 | if (!pmic_data->vdd2) { |
| 224 | omap3_vdd2.driver_data = &omap3_vdd2_drvdata; |
| 225 | omap3_vdd2_drvdata.data = voltdm_lookup("core"); |
Tero Kristo | 23e22a5 | 2012-02-20 12:26:07 +0200 | [diff] [blame] | 226 | pmic_data->vdd2 = &omap3_vdd2; |
Tero Kristo | 49c008e | 2012-02-20 12:26:08 +0200 | [diff] [blame] | 227 | } |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 228 | |
| 229 | /* Common platform data configurations */ |
| 230 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) |
| 231 | pmic_data->usb = &omap3_usb_pdata; |
| 232 | |
| 233 | if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) |
| 234 | pmic_data->bci = &omap3_bci_pdata; |
| 235 | |
| 236 | if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) |
| 237 | pmic_data->madc = &omap3_madc_pdata; |
| 238 | |
| 239 | if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) |
| 240 | pmic_data->audio = &omap3_audio_pdata; |
| 241 | |
| 242 | /* Common regulator configurations */ |
| 243 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) |
| 244 | pmic_data->vdac = &omap3_vdac_idata; |
| 245 | |
| 246 | if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) |
| 247 | pmic_data->vpll2 = &omap3_vpll2_idata; |
| 248 | } |
| 249 | #endif /* CONFIG_ARCH_OMAP3 */ |
| 250 | |
| 251 | #if defined(CONFIG_ARCH_OMAP4) |
| 252 | static struct twl4030_usb_data omap4_usb_pdata = { |
| 253 | .phy_init = omap4430_phy_init, |
| 254 | .phy_exit = omap4430_phy_exit, |
| 255 | .phy_power = omap4430_phy_power, |
| 256 | .phy_set_clock = omap4430_phy_set_clk, |
| 257 | .phy_suspend = omap4430_phy_suspend, |
| 258 | }; |
| 259 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 260 | static struct regulator_init_data omap4_vdac_idata = { |
| 261 | .constraints = { |
| 262 | .min_uV = 1800000, |
| 263 | .max_uV = 1800000, |
| 264 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 265 | | REGULATOR_MODE_STANDBY, |
| 266 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 267 | | REGULATOR_CHANGE_STATUS, |
| 268 | }, |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame^] | 269 | .supply_regulator = "V2V1", |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 270 | }; |
| 271 | |
| 272 | static struct regulator_init_data omap4_vaux2_idata = { |
| 273 | .constraints = { |
| 274 | .min_uV = 1200000, |
| 275 | .max_uV = 2800000, |
| 276 | .apply_uV = true, |
| 277 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 278 | | REGULATOR_MODE_STANDBY, |
| 279 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 280 | | REGULATOR_CHANGE_MODE |
| 281 | | REGULATOR_CHANGE_STATUS, |
| 282 | }, |
| 283 | }; |
| 284 | |
| 285 | static struct regulator_init_data omap4_vaux3_idata = { |
| 286 | .constraints = { |
| 287 | .min_uV = 1000000, |
| 288 | .max_uV = 3000000, |
| 289 | .apply_uV = true, |
| 290 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 291 | | REGULATOR_MODE_STANDBY, |
| 292 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 293 | | REGULATOR_CHANGE_MODE |
| 294 | | REGULATOR_CHANGE_STATUS, |
| 295 | }, |
| 296 | }; |
| 297 | |
| 298 | static struct regulator_consumer_supply omap4_vmmc_supply[] = { |
| 299 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), |
| 300 | }; |
| 301 | |
| 302 | /* VMMC1 for MMC1 card */ |
| 303 | static struct regulator_init_data omap4_vmmc_idata = { |
| 304 | .constraints = { |
| 305 | .min_uV = 1200000, |
| 306 | .max_uV = 3000000, |
| 307 | .apply_uV = true, |
| 308 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 309 | | REGULATOR_MODE_STANDBY, |
| 310 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 311 | | REGULATOR_CHANGE_MODE |
| 312 | | REGULATOR_CHANGE_STATUS, |
| 313 | }, |
| 314 | .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), |
| 315 | .consumer_supplies = omap4_vmmc_supply, |
| 316 | }; |
| 317 | |
| 318 | static struct regulator_init_data omap4_vpp_idata = { |
| 319 | .constraints = { |
| 320 | .min_uV = 1800000, |
| 321 | .max_uV = 2500000, |
| 322 | .apply_uV = true, |
| 323 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 324 | | REGULATOR_MODE_STANDBY, |
| 325 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
| 326 | | REGULATOR_CHANGE_MODE |
| 327 | | REGULATOR_CHANGE_STATUS, |
| 328 | }, |
| 329 | }; |
| 330 | |
| 331 | static struct regulator_init_data omap4_vana_idata = { |
| 332 | .constraints = { |
| 333 | .min_uV = 2100000, |
| 334 | .max_uV = 2100000, |
| 335 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 336 | | REGULATOR_MODE_STANDBY, |
| 337 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 338 | | REGULATOR_CHANGE_STATUS, |
| 339 | }, |
| 340 | }; |
| 341 | |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 342 | static struct regulator_consumer_supply omap4_vcxio_supply[] = { |
| 343 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"), |
| 344 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), |
| 345 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"), |
| 346 | }; |
| 347 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 348 | static struct regulator_init_data omap4_vcxio_idata = { |
| 349 | .constraints = { |
| 350 | .min_uV = 1800000, |
| 351 | .max_uV = 1800000, |
| 352 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 353 | | REGULATOR_MODE_STANDBY, |
| 354 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 355 | | REGULATOR_CHANGE_STATUS, |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 356 | .always_on = true, |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 357 | }, |
Tomi Valkeinen | 4e6a0ab | 2011-08-03 14:13:52 +0300 | [diff] [blame] | 358 | .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply), |
| 359 | .consumer_supplies = omap4_vcxio_supply, |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame^] | 360 | .supply_regulator = "V2V1", |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 361 | }; |
| 362 | |
| 363 | static struct regulator_init_data omap4_vusb_idata = { |
| 364 | .constraints = { |
| 365 | .min_uV = 3300000, |
| 366 | .max_uV = 3300000, |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 367 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 368 | | REGULATOR_MODE_STANDBY, |
| 369 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 370 | | REGULATOR_CHANGE_STATUS, |
| 371 | }, |
| 372 | }; |
| 373 | |
| 374 | static struct regulator_init_data omap4_clk32kg_idata = { |
| 375 | .constraints = { |
| 376 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, |
| 377 | }, |
| 378 | }; |
| 379 | |
Tero Kristo | e160dda | 2012-02-22 12:40:40 +0200 | [diff] [blame] | 380 | static struct regulator_consumer_supply omap4_vdd1_supply[] = { |
| 381 | REGULATOR_SUPPLY("vcc", "mpu.0"), |
| 382 | }; |
| 383 | |
| 384 | static struct regulator_consumer_supply omap4_vdd2_supply[] = { |
| 385 | REGULATOR_SUPPLY("vcc", "iva.0"), |
| 386 | }; |
| 387 | |
| 388 | static struct regulator_consumer_supply omap4_vdd3_supply[] = { |
| 389 | REGULATOR_SUPPLY("vcc", "l3_main.0"), |
| 390 | }; |
| 391 | |
| 392 | static struct regulator_init_data omap4_vdd1 = { |
| 393 | .constraints = { |
| 394 | .name = "vdd_mpu", |
| 395 | .min_uV = 500000, |
| 396 | .max_uV = 1500000, |
| 397 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 398 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 399 | }, |
| 400 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply), |
| 401 | .consumer_supplies = omap4_vdd1_supply, |
| 402 | }; |
| 403 | |
| 404 | static struct regulator_init_data omap4_vdd2 = { |
| 405 | .constraints = { |
| 406 | .name = "vdd_iva", |
| 407 | .min_uV = 500000, |
| 408 | .max_uV = 1500000, |
| 409 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 410 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 411 | }, |
| 412 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply), |
| 413 | .consumer_supplies = omap4_vdd2_supply, |
| 414 | }; |
| 415 | |
| 416 | static struct regulator_init_data omap4_vdd3 = { |
| 417 | .constraints = { |
| 418 | .name = "vdd_core", |
| 419 | .min_uV = 500000, |
| 420 | .max_uV = 1500000, |
| 421 | .valid_modes_mask = REGULATOR_MODE_NORMAL, |
| 422 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
| 423 | }, |
| 424 | .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply), |
| 425 | .consumer_supplies = omap4_vdd3_supply, |
| 426 | }; |
| 427 | |
| 428 | |
| 429 | static struct twl_regulator_driver_data omap4_vdd1_drvdata = { |
| 430 | .get_voltage = twl_get_voltage, |
| 431 | .set_voltage = twl_set_voltage, |
| 432 | }; |
| 433 | |
| 434 | static struct twl_regulator_driver_data omap4_vdd2_drvdata = { |
| 435 | .get_voltage = twl_get_voltage, |
| 436 | .set_voltage = twl_set_voltage, |
| 437 | }; |
| 438 | |
| 439 | static struct twl_regulator_driver_data omap4_vdd3_drvdata = { |
| 440 | .get_voltage = twl_get_voltage, |
| 441 | .set_voltage = twl_set_voltage, |
| 442 | }; |
| 443 | |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame^] | 444 | static struct regulator_consumer_supply omap4_v1v8_supply[] = { |
| 445 | REGULATOR_SUPPLY("vio", "1-004b"), |
| 446 | }; |
| 447 | |
| 448 | static struct regulator_init_data omap4_v1v8_idata = { |
| 449 | .constraints = { |
| 450 | .min_uV = 1800000, |
| 451 | .max_uV = 1800000, |
| 452 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 453 | | REGULATOR_MODE_STANDBY, |
| 454 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 455 | | REGULATOR_CHANGE_STATUS, |
| 456 | .always_on = true, |
| 457 | }, |
| 458 | .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply), |
| 459 | .consumer_supplies = omap4_v1v8_supply, |
| 460 | }; |
| 461 | |
| 462 | static struct regulator_consumer_supply omap4_v2v1_supply[] = { |
| 463 | REGULATOR_SUPPLY("v2v1", "1-004b"), |
| 464 | }; |
| 465 | |
| 466 | static struct regulator_init_data omap4_v2v1_idata = { |
| 467 | .constraints = { |
| 468 | .min_uV = 2100000, |
| 469 | .max_uV = 2100000, |
| 470 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
| 471 | | REGULATOR_MODE_STANDBY, |
| 472 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 473 | | REGULATOR_CHANGE_STATUS, |
| 474 | }, |
| 475 | .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply), |
| 476 | .consumer_supplies = omap4_v2v1_supply, |
| 477 | }; |
| 478 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 479 | void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, |
| 480 | u32 pdata_flags, u32 regulators_flags) |
| 481 | { |
| 482 | if (!pmic_data->irq_base) |
| 483 | pmic_data->irq_base = TWL6030_IRQ_BASE; |
| 484 | if (!pmic_data->irq_end) |
| 485 | pmic_data->irq_end = TWL6030_IRQ_END; |
| 486 | |
Tero Kristo | e160dda | 2012-02-22 12:40:40 +0200 | [diff] [blame] | 487 | if (!pmic_data->vdd1) { |
| 488 | omap4_vdd1.driver_data = &omap4_vdd1_drvdata; |
| 489 | omap4_vdd1_drvdata.data = voltdm_lookup("mpu"); |
| 490 | pmic_data->vdd1 = &omap4_vdd1; |
| 491 | } |
| 492 | |
| 493 | if (!pmic_data->vdd2) { |
| 494 | omap4_vdd2.driver_data = &omap4_vdd2_drvdata; |
| 495 | omap4_vdd2_drvdata.data = voltdm_lookup("iva"); |
| 496 | pmic_data->vdd2 = &omap4_vdd2; |
| 497 | } |
| 498 | |
| 499 | if (!pmic_data->vdd3) { |
| 500 | omap4_vdd3.driver_data = &omap4_vdd3_drvdata; |
| 501 | omap4_vdd3_drvdata.data = voltdm_lookup("core"); |
| 502 | pmic_data->vdd3 = &omap4_vdd3; |
| 503 | } |
| 504 | |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 505 | /* Common platform data configurations */ |
| 506 | if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) |
| 507 | pmic_data->usb = &omap4_usb_pdata; |
| 508 | |
| 509 | /* Common regulator configurations */ |
| 510 | if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) |
| 511 | pmic_data->vdac = &omap4_vdac_idata; |
| 512 | |
| 513 | if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) |
| 514 | pmic_data->vaux2 = &omap4_vaux2_idata; |
| 515 | |
| 516 | if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) |
| 517 | pmic_data->vaux3 = &omap4_vaux3_idata; |
| 518 | |
| 519 | if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) |
| 520 | pmic_data->vmmc = &omap4_vmmc_idata; |
| 521 | |
| 522 | if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) |
| 523 | pmic_data->vpp = &omap4_vpp_idata; |
| 524 | |
| 525 | if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) |
| 526 | pmic_data->vana = &omap4_vana_idata; |
| 527 | |
| 528 | if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) |
| 529 | pmic_data->vcxio = &omap4_vcxio_idata; |
| 530 | |
| 531 | if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) |
| 532 | pmic_data->vusb = &omap4_vusb_idata; |
| 533 | |
| 534 | if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && |
| 535 | !pmic_data->clk32kg) |
| 536 | pmic_data->clk32kg = &omap4_clk32kg_idata; |
Peter Ujfalusi | fde0190 | 2012-05-09 14:19:16 -0700 | [diff] [blame^] | 537 | |
| 538 | if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8) |
| 539 | pmic_data->v1v8 = &omap4_v1v8_idata; |
| 540 | |
| 541 | if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1) |
| 542 | pmic_data->v2v1 = &omap4_v2v1_idata; |
Peter Ujfalusi | b22f954 | 2011-06-07 10:26:46 +0300 | [diff] [blame] | 543 | } |
Peter Ujfalusi | d12d1fc | 2011-08-09 15:36:50 +0300 | [diff] [blame] | 544 | #endif /* CONFIG_ARCH_OMAP4 */ |