Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 1 | /* |
| 2 | * TI DaVinci Power and Sleep Controller (PSC) |
| 3 | * |
| 4 | * Copyright (C) 2006 Texas Instruments. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 19 | * |
| 20 | */ |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/init.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 24 | #include <linux/io.h> |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 25 | |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 26 | #include <mach/cputype.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 27 | #include <mach/hardware.h> |
| 28 | #include <mach/psc.h> |
| 29 | #include <mach/mux.h> |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 30 | |
Kevin Hilman | f5c122d | 2009-04-14 07:04:16 -0500 | [diff] [blame] | 31 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 |
| 32 | |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 33 | /* PSC register offsets */ |
| 34 | #define EPCPR 0x070 |
| 35 | #define PTCMD 0x120 |
| 36 | #define PTSTAT 0x128 |
| 37 | #define PDSTAT 0x200 |
| 38 | #define PDCTL1 0x304 |
| 39 | #define MDSTAT 0x800 |
| 40 | #define MDCTL 0xA00 |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 41 | |
Mark A. Greer | fe277d9 | 2009-03-26 19:33:21 -0700 | [diff] [blame^] | 42 | #define MDSTAT_STATE_MASK 0x1f |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 43 | |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 44 | /* Return nonzero iff the domain's clock is active */ |
| 45 | int __init davinci_psc_is_clk_active(unsigned int id) |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 46 | { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 47 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); |
| 48 | u32 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); |
| 49 | |
| 50 | /* if clocked, state can be "Enable" or "SyncReset" */ |
| 51 | return mdstat & BIT(12); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | /* Enable or disable a PSC domain */ |
| 55 | void davinci_psc_config(unsigned int domain, unsigned int id, char enable) |
| 56 | { |
Mark A. Greer | fe277d9 | 2009-03-26 19:33:21 -0700 | [diff] [blame^] | 57 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 58 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); |
Mark A. Greer | fe277d9 | 2009-03-26 19:33:21 -0700 | [diff] [blame^] | 59 | u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 60 | |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 61 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); |
Mark A. Greer | fe277d9 | 2009-03-26 19:33:21 -0700 | [diff] [blame^] | 62 | mdctl &= ~MDSTAT_STATE_MASK; |
| 63 | mdctl |= next_state; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 64 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 65 | |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 66 | pdstat = __raw_readl(psc_base + PDSTAT); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 67 | if ((pdstat & 0x00000001) == 0) { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 68 | pdctl1 = __raw_readl(psc_base + PDCTL1); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 69 | pdctl1 |= 0x1; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 70 | __raw_writel(pdctl1, psc_base + PDCTL1); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 71 | |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 72 | ptcmd = 1 << domain; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 73 | __raw_writel(ptcmd, psc_base + PTCMD); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 74 | |
| 75 | do { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 76 | epcpr = __raw_readl(psc_base + EPCPR); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 77 | } while ((((epcpr >> domain) & 1) == 0)); |
| 78 | |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 79 | pdctl1 = __raw_readl(psc_base + PDCTL1); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 80 | pdctl1 |= 0x100; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 81 | __raw_writel(pdctl1, psc_base + PDCTL1); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 82 | |
| 83 | do { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 84 | ptstat = __raw_readl(psc_base + |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 85 | PTSTAT); |
| 86 | } while (!(((ptstat >> domain) & 1) == 0)); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 87 | } else { |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 88 | ptcmd = 1 << domain; |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 89 | __raw_writel(ptcmd, psc_base + PTCMD); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 90 | |
| 91 | do { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 92 | ptstat = __raw_readl(psc_base + PTSTAT); |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 93 | } while (!(((ptstat >> domain) & 1) == 0)); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 94 | } |
| 95 | |
Vladimir Barinov | 83f5322 | 2007-07-10 13:10:04 +0100 | [diff] [blame] | 96 | do { |
Kevin Hilman | c5b736d | 2009-03-20 17:29:01 -0700 | [diff] [blame] | 97 | mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); |
Mark A. Greer | fe277d9 | 2009-03-26 19:33:21 -0700 | [diff] [blame^] | 98 | } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); |
Kevin Hilman | 7c6337e | 2007-04-30 19:37:19 +0100 | [diff] [blame] | 99 | } |