blob: f99d967fa3bd9788736ef234c36b654223921bd2 [file] [log] [blame]
Channagoud Kadabide5a1212017-01-20 15:27:51 -08001/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&soc {
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070014 tlmm: pinctrl@03400000 {
Imran Khan04f08312017-03-30 15:07:43 +053015 compatible = "qcom,sdm670-pinctrl";
Channagoud Kadabieb7f0112017-04-03 20:39:27 -070016 reg = <0x03400000 0xc00000>;
Channagoud Kadabide5a1212017-01-20 15:27:51 -080017 interrupts = <0 208 0>;
18 gpio-controller;
19 #gpio-cells = <2>;
20 interrupt-controller;
21 #interrupt-cells = <2>;
Maulik Shah30ebbde2017-06-15 10:02:54 +053022 interrupt-parent = <&pdc>;
Mukesh Kumar Savaliya065ca482017-06-06 14:44:45 +053023
24 /* QUPv3 South SE mappings */
25 /* SE 0 pin mappings */
26 qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
27 qupv3_se0_i2c_active: qupv3_se0_i2c_active {
28 mux {
29 pins = "gpio0", "gpio1";
30 function = "qup0";
31 };
32
33 config {
34 pins = "gpio0", "gpio1";
35 drive-strength = <2>;
36 bias-disable;
37 };
38 };
39
40 qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
41 mux {
42 pins = "gpio0", "gpio1";
43 function = "gpio";
44 };
45
46 config {
47 pins = "gpio0", "gpio1";
48 drive-strength = <2>;
49 bias-pull-up;
50 };
51 };
52 };
53
54 qupv3_se0_spi_pins: qupv3_se0_spi_pins {
55 qupv3_se0_spi_active: qupv3_se0_spi_active {
56 mux {
57 pins = "gpio0", "gpio1", "gpio2",
58 "gpio3";
59 function = "qup0";
60 };
61
62 config {
63 pins = "gpio0", "gpio1", "gpio2",
64 "gpio3";
65 drive-strength = <6>;
66 bias-disable;
67 };
68 };
69
70 qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
71 mux {
72 pins = "gpio0", "gpio1", "gpio2",
73 "gpio3";
74 function = "gpio";
75 };
76
77 config {
78 pins = "gpio0", "gpio1", "gpio2",
79 "gpio3";
80 drive-strength = <6>;
81 bias-disable;
82 };
83 };
84 };
85
86 /* SE 1 pin mappings */
87 qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
88 qupv3_se1_i2c_active: qupv3_se1_i2c_active {
89 mux {
90 pins = "gpio17", "gpio18";
91 function = "qup1";
92 };
93
94 config {
95 pins = "gpio17", "gpio18";
96 drive-strength = <2>;
97 bias-disable;
98 };
99 };
100
101 qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
102 mux {
103 pins = "gpio17", "gpio18";
104 function = "gpio";
105 };
106
107 config {
108 pins = "gpio17", "gpio18";
109 drive-strength = <2>;
110 bias-pull-up;
111 };
112 };
113 };
114
115 qupv3_se1_spi_pins: qupv3_se1_spi_pins {
116 qupv3_se1_spi_active: qupv3_se1_spi_active {
117 mux {
118 pins = "gpio17", "gpio18", "gpio19",
119 "gpio20";
120 function = "qup1";
121 };
122
123 config {
124 pins = "gpio17", "gpio18", "gpio19",
125 "gpio20";
126 drive-strength = <6>;
127 bias-disable;
128 };
129 };
130
131 qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
132 mux {
133 pins = "gpio17", "gpio18", "gpio19",
134 "gpio20";
135 function = "gpio";
136 };
137
138 config {
139 pins = "gpio17", "gpio18", "gpio19",
140 "gpio20";
141 drive-strength = <6>;
142 bias-disable;
143 };
144 };
145 };
146
147 /* SE 2 pin mappings */
148 qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
149 qupv3_se2_i2c_active: qupv3_se2_i2c_active {
150 mux {
151 pins = "gpio27", "gpio28";
152 function = "qup2";
153 };
154
155 config {
156 pins = "gpio27", "gpio28";
157 drive-strength = <2>;
158 bias-disable;
159 };
160 };
161
162 qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
163 mux {
164 pins = "gpio27", "gpio28";
165 function = "gpio";
166 };
167
168 config {
169 pins = "gpio27", "gpio28";
170 drive-strength = <2>;
171 bias-pull-up;
172 };
173 };
174 };
175
176 qupv3_se2_spi_pins: qupv3_se2_spi_pins {
177 qupv3_se2_spi_active: qupv3_se2_spi_active {
178 mux {
179 pins = "gpio27", "gpio28", "gpio29",
180 "gpio30";
181 function = "qup2";
182 };
183
184 config {
185 pins = "gpio27", "gpio28", "gpio29",
186 "gpio30";
187 drive-strength = <6>;
188 bias-disable;
189 };
190 };
191
192 qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
193 mux {
194 pins = "gpio27", "gpio28", "gpio29",
195 "gpio30";
196 function = "gpio";
197 };
198
199 config {
200 pins = "gpio27", "gpio28", "gpio29",
201 "gpio30";
202 drive-strength = <6>;
203 bias-disable;
204 };
205 };
206 };
207
208 /* SE 3 pin mappings */
209 qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
210 qupv3_se3_i2c_active: qupv3_se3_i2c_active {
211 mux {
212 pins = "gpio41", "gpio42";
213 function = "qup3";
214 };
215
216 config {
217 pins = "gpio41", "gpio42";
218 drive-strength = <2>;
219 bias-disable;
220 };
221 };
222
223 qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
224 mux {
225 pins = "gpio41", "gpio42";
226 function = "gpio";
227 };
228
229 config {
230 pins = "gpio41", "gpio42";
231 drive-strength = <2>;
232 bias-pull-up;
233 };
234 };
235 };
236
237 qupv3_se3_spi_pins: qupv3_se3_spi_pins {
238 qupv3_se3_spi_active: qupv3_se3_spi_active {
239 mux {
240 pins = "gpio41", "gpio42", "gpio43",
241 "gpio44";
242 function = "qup3";
243 };
244
245 config {
246 pins = "gpio41", "gpio42", "gpio43",
247 "gpio44";
248 drive-strength = <6>;
249 bias-disable;
250 };
251 };
252
253 qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
254 mux {
255 pins = "gpio41", "gpio42", "gpio43",
256 "gpio44";
257 function = "gpio";
258 };
259
260 config {
261 pins = "gpio41", "gpio42", "gpio43",
262 "gpio44";
263 drive-strength = <6>;
264 bias-disable;
265 };
266 };
267 };
268
269 /* SE 4 pin mappings */
270 qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
271 qupv3_se4_i2c_active: qupv3_se4_i2c_active {
272 mux {
273 pins = "gpio89", "gpio90";
274 function = "qup4";
275 };
276
277 config {
278 pins = "gpio89", "gpio90";
279 drive-strength = <2>;
280 bias-disable;
281 };
282 };
283
284 qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
285 mux {
286 pins = "gpio89", "gpio90";
287 function = "gpio";
288 };
289
290 config {
291 pins = "gpio89", "gpio90";
292 drive-strength = <2>;
293 bias-pull-up;
294 };
295 };
296 };
297
298 qupv3_se4_spi_pins: qupv3_se4_spi_pins {
299 qupv3_se4_spi_active: qupv3_se4_spi_active {
300 mux {
301 pins = "gpio89", "gpio90", "gpio91",
302 "gpio92";
303 function = "qup4";
304 };
305
306 config {
307 pins = "gpio89", "gpio90", "gpio91",
308 "gpio92";
309 drive-strength = <6>;
310 bias-disable;
311 };
312 };
313
314 qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
315 mux {
316 pins = "gpio89", "gpio90", "gpio91",
317 "gpio92";
318 function = "gpio";
319 };
320
321 config {
322 pins = "gpio89", "gpio90", "gpio91",
323 "gpio92";
324 drive-strength = <6>;
325 bias-disable;
326 };
327 };
328 };
329
330 /* SE 5 pin mappings */
331 qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
332 qupv3_se5_i2c_active: qupv3_se5_i2c_active {
333 mux {
334 pins = "gpio85", "gpio86";
335 function = "qup5";
336 };
337
338 config {
339 pins = "gpio85", "gpio86";
340 drive-strength = <2>;
341 bias-disable;
342 };
343 };
344
345 qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
346 mux {
347 pins = "gpio85", "gpio86";
348 function = "gpio";
349 };
350
351 config {
352 pins = "gpio85", "gpio86";
353 drive-strength = <2>;
354 bias-pull-up;
355 };
356 };
357 };
358
359 qupv3_se5_spi_pins: qupv3_se5_spi_pins {
360 qupv3_se5_spi_active: qupv3_se5_spi_active {
361 mux {
362 pins = "gpio85", "gpio86", "gpio87",
363 "gpio88";
364 function = "qup5";
365 };
366
367 config {
368 pins = "gpio85", "gpio86", "gpio87",
369 "gpio88";
370 drive-strength = <6>;
371 bias-disable;
372 };
373 };
374
375 qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
376 mux {
377 pins = "gpio85", "gpio86", "gpio87",
378 "gpio88";
379 function = "gpio";
380 };
381
382 config {
383 pins = "gpio85", "gpio86", "gpio87",
384 "gpio88";
385 drive-strength = <6>;
386 bias-disable;
387 };
388 };
389 };
390
391 /* SE 6 pin mappings */
392 qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
393 qupv3_se6_i2c_active: qupv3_se6_i2c_active {
394 mux {
395 pins = "gpio45", "gpio46";
396 function = "qup6";
397 };
398
399 config {
400 pins = "gpio45", "gpio46";
401 drive-strength = <2>;
402 bias-disable;
403 };
404 };
405
406 qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
407 mux {
408 pins = "gpio45", "gpio46";
409 function = "gpio";
410 };
411
412 config {
413 pins = "gpio45", "gpio46";
414 drive-strength = <2>;
415 bias-pull-up;
416 };
417 };
418 };
419
420 qupv3_se6_4uart_pins: qupv3_se6_4uart_pins {
421 qupv3_se6_4uart_active: qupv3_se6_4uart_active {
422 mux {
423 pins = "gpio45", "gpio46", "gpio47",
424 "gpio48";
425 function = "qup6";
426 };
427
428 config {
429 pins = "gpio45", "gpio46", "gpio47",
430 "gpio48";
431 drive-strength = <2>;
432 bias-disable;
433 };
434 };
435
436 qupv3_se6_4uart_sleep: qupv3_se6_4uart_sleep {
437 mux {
438 pins = "gpio45", "gpio46", "gpio47",
439 "gpio48";
440 function = "gpio";
441 };
442
443 config {
444 pins = "gpio45", "gpio46", "gpio47",
445 "gpio48";
446 drive-strength = <2>;
447 bias-disable;
448 };
449 };
450 };
451
452 qupv3_se6_spi_pins: qupv3_se6_spi_pins {
453 qupv3_se6_spi_active: qupv3_se6_spi_active {
454 mux {
455 pins = "gpio45", "gpio46", "gpio47",
456 "gpio48";
457 function = "qup6";
458 };
459
460 config {
461 pins = "gpio45", "gpio46", "gpio47",
462 "gpio48";
463 drive-strength = <6>;
464 bias-disable;
465 };
466 };
467
468 qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
469 mux {
470 pins = "gpio45", "gpio46", "gpio47",
471 "gpio48";
472 function = "gpio";
473 };
474
475 config {
476 pins = "gpio45", "gpio46", "gpio47",
477 "gpio48";
478 drive-strength = <6>;
479 bias-disable;
480 };
481 };
482 };
483
484 /* SE 7 pin mappings */
485 qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
486 qupv3_se7_i2c_active: qupv3_se7_i2c_active {
487 mux {
488 pins = "gpio93", "gpio94";
489 function = "qup7";
490 };
491
492 config {
493 pins = "gpio93", "gpio94";
494 drive-strength = <2>;
495 bias-disable;
496 };
497 };
498
499 qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
500 mux {
501 pins = "gpio93", "gpio94";
502 function = "gpio";
503 };
504
505 config {
506 pins = "gpio93", "gpio94";
507 drive-strength = <2>;
508 bias-pull-up;
509 };
510 };
511 };
512
513 qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
514 qupv3_se7_4uart_active: qupv3_se7_4uart_active {
515 mux {
516 pins = "gpio93", "gpio94", "gpio95",
517 "gpio96";
518 function = "qup7";
519 };
520
521 config {
522 pins = "gpio93", "gpio94", "gpio95",
523 "gpio96";
524 drive-strength = <2>;
525 bias-disable;
526 };
527 };
528
529 qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep {
530 mux {
531 pins = "gpio93", "gpio94", "gpio95",
532 "gpio96";
533 function = "gpio";
534 };
535
536 config {
537 pins = "gpio93", "gpio94", "gpio95",
538 "gpio96";
539 drive-strength = <2>;
540 bias-disable;
541 };
542 };
543 };
544
545 qupv3_se7_spi_pins: qupv3_se7_spi_pins {
546 qupv3_se7_spi_active: qupv3_se7_spi_active {
547 mux {
548 pins = "gpio93", "gpio94", "gpio95",
549 "gpio96";
550 function = "qup7";
551 };
552
553 config {
554 pins = "gpio93", "gpio94", "gpio95",
555 "gpio96";
556 drive-strength = <6>;
557 bias-disable;
558 };
559 };
560
561 qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
562 mux {
563 pins = "gpio93", "gpio94", "gpio95",
564 "gpio96";
565 function = "gpio";
566 };
567
568 config {
569 pins = "gpio93", "gpio94", "gpio95",
570 "gpio96";
571 drive-strength = <6>;
572 bias-disable;
573 };
574 };
575 };
576
577 /* QUPv3 North instances */
578 /* SE 8 pin mappings */
579 qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
580 qupv3_se8_i2c_active: qupv3_se8_i2c_active {
581 mux {
582 pins = "gpio65", "gpio66";
583 function = "qup8";
584 };
585
586 config {
587 pins = "gpio65", "gpio66";
588 drive-strength = <2>;
589 bias-disable;
590 };
591 };
592
593 qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
594 mux {
595 pins = "gpio65", "gpio66";
596 function = "gpio";
597 };
598
599 config {
600 pins = "gpio65", "gpio66";
601 drive-strength = <2>;
602 bias-pull-up;
603 };
604 };
605 };
606
607 qupv3_se8_spi_pins: qupv3_se8_spi_pins {
608 qupv3_se8_spi_active: qupv3_se8_spi_active {
609 mux {
610 pins = "gpio65", "gpio66", "gpio67",
611 "gpio68";
612 function = "qup8";
613 };
614
615 config {
616 pins = "gpio65", "gpio66", "gpio67",
617 "gpio68";
618 drive-strength = <6>;
619 bias-disable;
620 };
621 };
622
623 qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
624 mux {
625 pins = "gpio65", "gpio66", "gpio67",
626 "gpio68";
627 function = "gpio";
628 };
629
630 config {
631 pins = "gpio65", "gpio66", "gpio67",
632 "gpio68";
633 drive-strength = <6>;
634 bias-disable;
635 };
636 };
637 };
638
639 /* SE 9 pin mappings */
640 qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
641 qupv3_se9_i2c_active: qupv3_se9_i2c_active {
642 mux {
643 pins = "gpio6", "gpio7";
644 function = "qup9";
645 };
646
647 config {
648 pins = "gpio6", "gpio7";
649 drive-strength = <2>;
650 bias-disable;
651 };
652 };
653
654 qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
655 mux {
656 pins = "gpio6", "gpio7";
657 function = "gpio";
658 };
659
660 config {
661 pins = "gpio6", "gpio7";
662 drive-strength = <2>;
663 bias-pull-up;
664 };
665 };
666 };
667
668 qupv3_se9_2uart_pins: qupv3_se9_2uart_pins {
669 qupv3_se9_2uart_active: qupv3_se9_2uart_active {
670 mux {
671 pins = "gpio4", "gpio5";
672 function = "qup9";
673 };
674
675 config {
676 pins = "gpio4", "gpio5";
677 drive-strength = <2>;
678 bias-disable;
679 };
680 };
681
682 qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep {
683 mux {
684 pins = "gpio4", "gpio5";
685 function = "gpio";
686 };
687
688 config {
689 pins = "gpio4", "gpio5";
690 drive-strength = <2>;
691 bias-disable;
692 };
693 };
694 };
695
696 qupv3_se9_spi_pins: qupv3_se9_spi_pins {
697 qupv3_se9_spi_active: qupv3_se9_spi_active {
698 mux {
699 pins = "gpio4", "gpio5", "gpio6",
700 "gpio7";
701 function = "qup9";
702 };
703
704 config {
705 pins = "gpio4", "gpio5", "gpio6",
706 "gpio7";
707 drive-strength = <6>;
708 bias-disable;
709 };
710 };
711
712 qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
713 mux {
714 pins = "gpio4", "gpio5", "gpio6",
715 "gpio7";
716 function = "gpio";
717 };
718
719 config {
720 pins = "gpio4", "gpio5", "gpio6",
721 "gpio7";
722 drive-strength = <6>;
723 bias-disable;
724 };
725 };
726 };
727
728 /* SE 10 pin mappings */
729 qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
730 qupv3_se10_i2c_active: qupv3_se10_i2c_active {
731 mux {
732 pins = "gpio55", "gpio56";
733 function = "qup10";
734 };
735
736 config {
737 pins = "gpio55", "gpio56";
738 drive-strength = <2>;
739 bias-disable;
740 };
741 };
742
743 qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
744 mux {
745 pins = "gpio55", "gpio56";
746 function = "gpio";
747 };
748
749 config {
750 pins = "gpio55", "gpio56";
751 drive-strength = <2>;
752 bias-pull-up;
753 };
754 };
755 };
756
757 qupv3_se10_2uart_pins: qupv3_se10_2uart_pins {
758 qupv3_se10_2uart_active: qupv3_se10_2uart_active {
759 mux {
760 pins = "gpio53", "gpio54";
761 function = "qup10";
762 };
763
764 config {
765 pins = "gpio53", "gpio54";
766 drive-strength = <2>;
767 bias-disable;
768 };
769 };
770
771 qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep {
772 mux {
773 pins = "gpio53", "gpio54";
774 function = "gpio";
775 };
776
777 config {
778 pins = "gpio53", "gpio54";
779 drive-strength = <2>;
780 bias-disable;
781 };
782 };
783 };
784
785 qupv3_se10_spi_pins: qupv3_se10_spi_pins {
786 qupv3_se10_spi_active: qupv3_se10_spi_active {
787 mux {
788 pins = "gpio53", "gpio54", "gpio55",
789 "gpio56";
790 function = "qup10";
791 };
792
793 config {
794 pins = "gpio53", "gpio54", "gpio55",
795 "gpio56";
796 drive-strength = <6>;
797 bias-disable;
798 };
799 };
800
801 qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
802 mux {
803 pins = "gpio53", "gpio54", "gpio55",
804 "gpio56";
805 function = "gpio";
806 };
807
808 config {
809 pins = "gpio53", "gpio54", "gpio55",
810 "gpio56";
811 drive-strength = <6>;
812 bias-disable;
813 };
814 };
815 };
816
817 /* SE 11 pin mappings */
818 qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
819 qupv3_se11_i2c_active: qupv3_se11_i2c_active {
820 mux {
821 pins = "gpio31", "gpio32";
822 function = "qup11";
823 };
824
825 config {
826 pins = "gpio31", "gpio32";
827 drive-strength = <2>;
828 bias-disable;
829 };
830 };
831
832 qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
833 mux {
834 pins = "gpio31", "gpio32";
835 function = "gpio";
836 };
837
838 config {
839 pins = "gpio31", "gpio32";
840 drive-strength = <2>;
841 bias-pull-up;
842 };
843 };
844 };
845
846 qupv3_se11_spi_pins: qupv3_se11_spi_pins {
847 qupv3_se11_spi_active: qupv3_se11_spi_active {
848 mux {
849 pins = "gpio31", "gpio32", "gpio33",
850 "gpio34";
851 function = "qup11";
852 };
853
854 config {
855 pins = "gpio31", "gpio32", "gpio33",
856 "gpio34";
857 drive-strength = <6>;
858 bias-disable;
859 };
860 };
861
862 qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
863 mux {
864 pins = "gpio31", "gpio32", "gpio33",
865 "gpio34";
866 function = "gpio";
867 };
868
869 config {
870 pins = "gpio31", "gpio32", "gpio33",
871 "gpio34";
872 drive-strength = <6>;
873 bias-disable;
874 };
875 };
876 };
877
878 /* SE 12 pin mappings */
879 qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
880 qupv3_se12_i2c_active: qupv3_se12_i2c_active {
881 mux {
882 pins = "gpio49", "gpio50";
883 function = "qup12";
884 };
885
886 config {
887 pins = "gpio49", "gpio50";
888 drive-strength = <2>;
889 bias-disable;
890 };
891 };
892
893 qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
894 mux {
895 pins = "gpio49", "gpio50";
896 function = "gpio";
897 };
898
899 config {
900 pins = "gpio49", "gpio50";
901 drive-strength = <2>;
902 bias-pull-up;
903 };
904 };
905 };
906
Mukesh Kumar Savaliya7b272542017-07-10 19:35:29 +0530907 qupv3_se12_2uart_pins: qupv3_se12_2uart_pins {
908 qupv3_se12_2uart_active: qupv3_se12_2uart_active {
909 mux {
910 pins = "gpio51", "gpio52";
911 function = "qup9";
912 };
913
914 config {
915 pins = "gpio51", "gpio52";
916 drive-strength = <2>;
917 bias-disable;
918 };
919 };
920
921 qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep {
922 mux {
923 pins = "gpio51", "gpio52";
924 function = "gpio";
925 };
926
927 config {
928 pins = "gpio51", "gpio52";
929 drive-strength = <2>;
930 bias-disable;
931 };
932 };
933 };
934
Mukesh Kumar Savaliya065ca482017-06-06 14:44:45 +0530935 qupv3_se12_spi_pins: qupv3_se12_spi_pins {
936 qupv3_se12_spi_active: qupv3_se12_spi_active {
937 mux {
938 pins = "gpio49", "gpio50", "gpio51",
939 "gpio52";
940 function = "qup12";
941 };
942
943 config {
944 pins = "gpio49", "gpio50", "gpio51",
945 "gpio52";
946 drive-strength = <6>;
947 bias-disable;
948 };
949 };
950
951 qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
952 mux {
953 pins = "gpio49", "gpio50", "gpio51",
954 "gpio52";
955 function = "gpio";
956 };
957
958 config {
959 pins = "gpio49", "gpio50", "gpio51",
960 "gpio52";
961 drive-strength = <6>;
962 bias-disable;
963 };
964 };
965 };
966
967 /* SE 13 pin mappings */
968 qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
969 qupv3_se13_i2c_active: qupv3_se13_i2c_active {
970 mux {
971 pins = "gpio105", "gpio106";
972 function = "qup13";
973 };
974
975 config {
976 pins = "gpio105", "gpio106";
977 drive-strength = <2>;
978 bias-disable;
979 };
980 };
981
982 qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
983 mux {
984 pins = "gpio105", "gpio106";
985 function = "gpio";
986 };
987
988 config {
989 pins = "gpio105", "gpio106";
990 drive-strength = <2>;
991 bias-pull-up;
992 };
993 };
994 };
995
996 qupv3_se13_spi_pins: qupv3_se13_spi_pins {
997 qupv3_se13_spi_active: qupv3_se13_spi_active {
998 mux {
999 pins = "gpio105", "gpio106", "gpio107",
1000 "gpio108";
1001 function = "qup13";
1002 };
1003
1004 config {
1005 pins = "gpio105", "gpio106", "gpio107",
1006 "gpio108";
1007 drive-strength = <6>;
1008 bias-disable;
1009 };
1010 };
1011
1012 qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
1013 mux {
1014 pins = "gpio105", "gpio106", "gpio107",
1015 "gpio108";
1016 function = "gpio";
1017 };
1018
1019 config {
1020 pins = "gpio105", "gpio106", "gpio107",
1021 "gpio108";
1022 drive-strength = <6>;
1023 bias-disable;
1024 };
1025 };
1026 };
1027
1028 /* SE 14 pin mappings */
1029 qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
1030 qupv3_se14_i2c_active: qupv3_se14_i2c_active {
1031 mux {
1032 pins = "gpio33", "gpio34";
1033 function = "qup14";
1034 };
1035
1036 config {
1037 pins = "gpio33", "gpio34";
1038 drive-strength = <2>;
1039 bias-disable;
1040 };
1041 };
1042
1043 qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
1044 mux {
1045 pins = "gpio33", "gpio34";
1046 function = "gpio";
1047 };
1048
1049 config {
1050 pins = "gpio33", "gpio34";
1051 drive-strength = <2>;
1052 bias-pull-up;
1053 };
1054 };
1055 };
1056
1057 qupv3_se14_spi_pins: qupv3_se14_spi_pins {
1058 qupv3_se14_spi_active: qupv3_se14_spi_active {
1059 mux {
1060 pins = "gpio31", "gpio32", "gpio33",
1061 "gpio34";
1062 function = "qup14";
1063 };
1064
1065 config {
1066 pins = "gpio31", "gpio32", "gpio33",
1067 "gpio34";
1068 drive-strength = <6>;
1069 bias-disable;
1070 };
1071 };
1072
1073 qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
1074 mux {
1075 pins = "gpio31", "gpio32", "gpio33",
1076 "gpio34";
1077 function = "gpio";
1078 };
1079
1080 config {
1081 pins = "gpio31", "gpio32", "gpio33",
1082 "gpio34";
1083 drive-strength = <6>;
1084 bias-disable;
1085 };
1086 };
1087 };
1088
1089 /* SE 15 pin mappings */
1090 qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
1091 qupv3_se15_i2c_active: qupv3_se15_i2c_active {
1092 mux {
1093 pins = "gpio81", "gpio82";
1094 function = "qup15";
1095 };
1096
1097 config {
1098 pins = "gpio81", "gpio82";
1099 drive-strength = <2>;
1100 bias-disable;
1101 };
1102 };
1103
1104 qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
1105 mux {
1106 pins = "gpio81", "gpio82";
1107 function = "gpio";
1108 };
1109
1110 config {
1111 pins = "gpio81", "gpio82";
1112 drive-strength = <2>;
1113 bias-pull-up;
1114 };
1115 };
1116 };
1117
1118 qupv3_se15_spi_pins: qupv3_se15_spi_pins {
1119 qupv3_se15_spi_active: qupv3_se15_spi_active {
1120 mux {
1121 pins = "gpio81", "gpio82", "gpio83",
1122 "gpio84";
1123 function = "qup15";
1124 };
1125
1126 config {
1127 pins = "gpio81", "gpio82", "gpio83",
1128 "gpio84";
1129 drive-strength = <6>;
1130 bias-disable;
1131 };
1132 };
1133
1134 qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
1135 mux {
1136 pins = "gpio81", "gpio82", "gpio83",
1137 "gpio84";
1138 function = "gpio";
1139 };
1140
1141 config {
1142 pins = "gpio81", "gpio82", "gpio83",
1143 "gpio84";
1144 drive-strength = <6>;
1145 bias-disable;
1146 };
1147 };
1148 };
Vijay Viswanatheac72722017-06-05 11:01:38 +05301149 /* SDC pin type */
1150 sdc1_clk_on: sdc1_clk_on {
1151 config {
1152 pins = "sdc1_clk";
1153 bias-disable; /* NO pull */
1154 drive-strength = <16>; /* 16 MA */
1155 };
1156 };
1157
1158 sdc1_clk_off: sdc1_clk_off {
1159 config {
1160 pins = "sdc1_clk";
1161 bias-disable; /* NO pull */
1162 drive-strength = <2>; /* 2 MA */
1163 };
1164 };
1165
1166 sdc1_cmd_on: sdc1_cmd_on {
1167 config {
1168 pins = "sdc1_cmd";
1169 bias-pull-up; /* pull up */
1170 drive-strength = <10>; /* 10 MA */
1171 };
1172 };
1173
1174 sdc1_cmd_off: sdc1_cmd_off {
1175 config {
1176 pins = "sdc1_cmd";
1177 num-grp-pins = <1>;
1178 bias-pull-up; /* pull up */
1179 drive-strength = <2>; /* 2 MA */
1180 };
1181 };
1182
1183 sdc1_data_on: sdc1_data_on {
1184 config {
1185 pins = "sdc1_data";
1186 bias-pull-up; /* pull up */
1187 drive-strength = <10>; /* 10 MA */
1188 };
1189 };
1190
1191 sdc1_data_off: sdc1_data_off {
1192 config {
1193 pins = "sdc1_data";
1194 bias-pull-up; /* pull up */
1195 drive-strength = <2>; /* 2 MA */
1196 };
1197 };
1198
Vijay Viswanath6f83cbf2017-08-30 16:41:48 +05301199 sdc1_rclk_on: sdc1_rclk_on {
1200 config {
1201 pins = "sdc1_rclk";
1202 bias-pull-down; /* pull down */
1203 };
1204 };
1205
1206 sdc1_rclk_off: sdc1_rclk_off {
1207 config {
1208 pins = "sdc1_rclk";
1209 bias-pull-down; /* pull down */
1210 };
1211 };
1212
Vijay Viswanatheac72722017-06-05 11:01:38 +05301213 sdc2_clk_on: sdc2_clk_on {
1214 config {
1215 pins = "sdc2_clk";
1216 bias-disable; /* NO pull */
1217 drive-strength = <16>; /* 16 MA */
1218 };
1219 };
1220
1221 sdc2_clk_off: sdc2_clk_off {
1222 config {
1223 pins = "sdc2_clk";
1224 bias-disable; /* NO pull */
1225 drive-strength = <2>; /* 2 MA */
1226 };
1227 };
1228
1229 sdc2_cmd_on: sdc2_cmd_on {
1230 config {
1231 pins = "sdc2_cmd";
1232 bias-pull-up; /* pull up */
1233 drive-strength = <10>; /* 10 MA */
1234 };
1235 };
1236
1237 sdc2_cmd_off: sdc2_cmd_off {
1238 config {
1239 pins = "sdc2_cmd";
1240 bias-pull-up; /* pull up */
1241 drive-strength = <2>; /* 2 MA */
1242 };
1243 };
1244
1245 sdc2_data_on: sdc2_data_on {
1246 config {
1247 pins = "sdc2_data";
1248 bias-pull-up; /* pull up */
1249 drive-strength = <10>; /* 10 MA */
1250 };
1251 };
1252
1253 sdc2_data_off: sdc2_data_off {
1254 config {
1255 pins = "sdc2_data";
1256 bias-pull-up; /* pull up */
1257 drive-strength = <2>; /* 2 MA */
1258 };
1259 };
1260
Vijay Viswanath6ef06c12017-09-20 16:06:18 +05301261 sdc2_cd_on: cd_on {
1262 mux {
1263 pins = "gpio96";
1264 function = "gpio";
1265 };
1266
1267 config {
1268 pins = "gpio96";
1269 drive-strength = <2>;
1270 bias-pull-up;
1271 };
1272 };
1273
1274 sdc2_cd_off: cd_off {
1275 mux {
1276 pins = "gpio96";
1277 function = "gpio";
1278 };
1279
1280 config {
1281 pins = "gpio96";
1282 drive-strength = <2>;
1283 bias-disable;
1284 };
1285 };
1286
Rohit Kumar14051282017-07-12 11:18:48 +05301287 /* USB C analog configuration */
1288 wcd_usbc_analog_en1 {
1289 wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle {
1290 mux {
1291 pins = "gpio49";
1292 function = "gpio";
1293 };
1294
1295 config {
1296 pins = "gpio49";
1297 drive-strength = <2>;
1298 bias-pull-down;
1299 output-low;
1300 };
1301 };
1302
1303 wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active {
1304 mux {
1305 pins = "gpio49";
1306 function = "gpio";
1307 };
1308
1309 config {
1310 pins = "gpio49";
1311 drive-strength = <2>;
1312 bias-disable;
1313 output-high;
1314 };
1315 };
1316 };
1317
1318 sdw_clk_pin {
1319 sdw_clk_sleep: sdw_clk_sleep {
1320 mux {
1321 pins = "gpio65";
1322 function = "wsa_clk";
1323 };
1324
1325 config {
1326 pins = "gpio65";
1327 drive-strength = <2>;
1328 bias-bus-hold;
1329 };
1330 };
1331
1332 sdw_clk_active: sdw_clk_active {
1333 mux {
1334 pins = "gpio65";
1335 function = "wsa_clk";
1336 };
1337
1338 config {
1339 pins = "gpio65";
1340 drive-strength = <2>;
1341 bias-bus-hold;
1342 };
1343 };
1344 };
1345
1346 sdw_data_pin {
1347 sdw_data_sleep: sdw_data_sleep {
1348 mux {
1349 pins = "gpio66";
1350 function = "wsa_data";
1351 };
1352
1353 config {
1354 pins = "gpio66";
1355 drive-strength = <4>;
1356 bias-bus-hold;
1357 };
1358 };
1359
1360 sdw_data_active: sdw_data_active {
1361 mux {
1362 pins = "gpio66";
1363 function = "wsa_data";
1364 };
1365
1366 config {
1367 pins = "gpio66";
1368 drive-strength = <4>;
1369 bias-bus-hold;
1370 };
1371 };
1372 };
1373
1374 /* WSA speaker reset pins */
1375 spkr_1_sd_n {
1376 spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
1377 mux {
1378 pins = "gpio67";
1379 function = "gpio";
1380 };
1381
1382 config {
1383 pins = "gpio67";
1384 drive-strength = <2>; /* 2 mA */
1385 bias-pull-down;
1386 input-enable;
1387 };
1388 };
1389
1390 spkr_1_sd_n_active: spkr_1_sd_n_active {
1391 mux {
1392 pins = "gpio67";
1393 function = "gpio";
1394 };
1395
1396 config {
1397 pins = "gpio67";
1398 drive-strength = <16>; /* 16 mA */
1399 bias-disable;
1400 output-high;
1401 };
1402 };
1403 };
1404
1405 spkr_2_sd_n {
1406 spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
1407 mux {
1408 pins = "gpio68";
1409 function = "gpio";
1410 };
1411
1412 config {
1413 pins = "gpio68";
1414 drive-strength = <2>; /* 2 mA */
1415 bias-pull-down;
1416 input-enable;
1417 };
1418 };
1419
1420 spkr_2_sd_n_active: spkr_2_sd_n_active {
1421 mux {
1422 pins = "gpio68";
1423 function = "gpio";
1424 };
1425
1426 config {
1427 pins = "gpio68";
1428 drive-strength = <16>; /* 16 mA */
1429 bias-disable;
1430 output-high;
1431 };
1432 };
1433 };
1434
Rohit Kumarefba4be2017-09-18 08:06:14 +05301435 wcd_buck_vsel {
1436 wcd_buck_vsel_default: wcd_buck_vsel_default{
1437 mux {
1438 pins = "gpio94";
1439 function = "gpio";
1440 };
1441
1442 config {
1443 pins = "gpio94";
1444 drive-strength = <8>; /* 8 mA */
1445 bias-pull-down; /* pull down */
1446 output-high;
1447 };
1448 };
1449 };
1450
Vatsal Buchafeac0f72017-12-27 15:59:09 +05301451 wcd_usbc_analog_en2 {
1452 wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle {
Rohit Kumar14051282017-07-12 11:18:48 +05301453 mux {
1454 pins = "gpio40";
1455 function = "gpio";
1456 };
1457
1458 config {
1459 pins = "gpio40";
1460 drive-strength = <2>;
1461 bias-pull-down;
1462 output-low;
1463 };
1464 };
1465
Vatsal Buchafeac0f72017-12-27 15:59:09 +05301466 wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active {
Rohit Kumar14051282017-07-12 11:18:48 +05301467 mux {
1468 pins = "gpio40";
1469 function = "gpio";
1470 };
1471
1472 config {
1473 pins = "gpio40";
1474 drive-strength = <2>;
1475 bias-disable;
1476 output-high;
1477 };
1478 };
1479 };
1480
1481 wcd9xxx_intr {
1482 wcd_intr_default: wcd_intr_default{
1483 mux {
1484 pins = "gpio80";
1485 function = "gpio";
1486 };
1487
1488 config {
1489 pins = "gpio80";
1490 drive-strength = <2>; /* 2 mA */
1491 bias-pull-down; /* pull down */
1492 input-enable;
1493 };
1494 };
1495 };
Shantanu Jain59eea8d2017-09-15 11:35:04 +05301496
1497 /* Pinctrl setting for CAMERA GPIO key */
1498 key_cam_snapshot {
1499 key_cam_snapshot_default: key_cam_snapshot_default {
1500 pins = "gpio91";
1501 function = "normal";
1502 input-enable;
1503 bias-pull-up;
1504 power-source = <0>;
1505 };
1506 };
1507
1508 key_cam_focus {
1509 key_cam_focus_default: key_cam_focus_default {
1510 pins = "gpio92";
1511 function = "normal";
1512 input-enable;
1513 bias-pull-up;
1514 power-source = <0>;
1515 };
1516 };
1517
Raviteja Tamatame97849a2017-09-12 20:25:50 +05301518 pmx_sde: pmx_sde {
1519 sde_dsi_active: sde_dsi_active {
1520 mux {
1521 pins = "gpio75", "gpio76";
1522 function = "gpio";
1523 };
1524
1525 config {
1526 pins = "gpio75", "gpio76";
1527 drive-strength = <8>; /* 8 mA */
1528 bias-disable = <0>; /* no pull */
1529 };
1530 };
1531 sde_dsi_suspend: sde_dsi_suspend {
1532 mux {
1533 pins = "gpio75", "gpio76";
1534 function = "gpio";
1535 };
1536
1537 config {
1538 pins = "gpio75", "gpio76";
1539 drive-strength = <2>; /* 2 mA */
1540 bias-pull-down; /* PULL DOWN */
1541 };
1542 };
1543 };
1544
1545 pmx_sde_te {
1546 sde_te_active: sde_te_active {
1547 mux {
1548 pins = "gpio10";
1549 function = "mdp_vsync";
1550 };
1551
1552 config {
1553 pins = "gpio10";
1554 drive-strength = <2>; /* 2 mA */
1555 bias-pull-down; /* PULL DOWN */
1556 };
1557 };
1558
1559 sde_te_suspend: sde_te_suspend {
1560 mux {
1561 pins = "gpio10";
1562 function = "mdp_vsync";
1563 };
1564
1565 config {
1566 pins = "gpio10";
1567 drive-strength = <2>; /* 2 mA */
1568 bias-pull-down; /* PULL DOWN */
1569 };
1570 };
1571 };
1572
1573 sde_dp_aux_active: sde_dp_aux_active {
1574 mux {
1575 pins = "gpio40", "gpio50";
1576 function = "gpio";
1577 };
1578
1579 config {
1580 pins = "gpio40", "gpio50";
1581 bias-disable = <0>; /* no pull */
1582 drive-strength = <8>;
1583 };
1584 };
1585
1586 sde_dp_aux_suspend: sde_dp_aux_suspend {
1587 mux {
1588 pins = "gpio40", "gpio50";
1589 function = "gpio";
1590 };
1591
1592 config {
1593 pins = "gpio40", "gpio50";
1594 bias-pull-down;
1595 drive-strength = <2>;
1596 };
1597 };
1598
1599 sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
1600 mux {
1601 pins = "gpio38";
1602 function = "gpio";
1603 };
1604
1605 config {
1606 pins = "gpio38";
1607 bias-disable;
1608 drive-strength = <16>;
1609 };
1610 };
1611
1612 sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend {
1613 mux {
1614 pins = "gpio38";
1615 function = "gpio";
1616 };
1617
1618 config {
1619 pins = "gpio38";
1620 bias-pull-down;
1621 drive-strength = <2>;
1622 };
1623 };
Channagoud Kadabide5a1212017-01-20 15:27:51 -08001624 };
1625};
Ashay Jaiswal81940302017-09-20 15:17:58 +05301626
1627&pm660l_gpios {
Fenglin Wu8ec09b12017-10-11 20:25:29 +08001628 camera0_dvdd_en_default: camera0_dvdd_en_default {
1629 pins = "gpio3";
1630 function = "normal";
1631 power-source = <0>;
1632 output-low;
1633 };
1634
1635 camera1_dvdd_en_default: camera1_dvdd_en_default {
1636 pins = "gpio4";
1637 function = "normal";
1638 power-source = <0>;
1639 output-low;
1640 };
1641
Ashay Jaiswal81940302017-09-20 15:17:58 +05301642 key_vol_up {
1643 key_vol_up_default: key_vol_up_default {
1644 pins = "gpio7";
1645 function = "normal";
1646 input-enable;
1647 bias-pull-up;
1648 power-source = <0>;
1649 };
1650 };
1651};
Fenglin Wu8ec09b12017-10-11 20:25:29 +08001652
1653&pm660_gpios {
1654 smb_shutdown_default: smb_shutdown_default {
1655 pins = "gpio11";
1656 function = "normal";
1657 power-source = <0>;
1658 qcom,drive-strength = <3>;
1659 output-high;
1660 };
1661};