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Sujith394cf0a2009-02-09 13:26:54 +05301/*
Sujithcee075a2009-03-13 09:07:23 +05302 * Copyright (c) 2008-2009 Atheros Communications Inc.
Sujith394cf0a2009-02-09 13:26:54 +05303 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef DEBUG_H
18#define DEBUG_H
19
20enum ATH_DEBUG {
21 ATH_DBG_RESET = 0x00000001,
Sujithd8baa932009-03-30 15:28:25 +053022 ATH_DBG_QUEUE = 0x00000002,
23 ATH_DBG_EEPROM = 0x00000004,
24 ATH_DBG_CALIBRATE = 0x00000008,
25 ATH_DBG_INTERRUPT = 0x00000010,
26 ATH_DBG_REGULATORY = 0x00000020,
27 ATH_DBG_ANI = 0x00000040,
28 ATH_DBG_XMIT = 0x00000080,
29 ATH_DBG_BEACON = 0x00000100,
30 ATH_DBG_CONFIG = 0x00000200,
31 ATH_DBG_FATAL = 0x00000400,
Jouni Malinencc659652009-05-14 21:28:48 +030032 ATH_DBG_PS = 0x00000800,
Sujith394cf0a2009-02-09 13:26:54 +053033 ATH_DBG_ANY = 0xffffffff
34};
35
36#define DBG_DEFAULT (ATH_DBG_FATAL)
37
Sujithfec247c2009-07-27 12:08:16 +053038struct ath_txq;
39struct ath_buf;
40
41#ifdef CONFIG_ATH9K_DEBUG
42#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
43#else
44#define TX_STAT_INC(q, c) do { } while (0)
45#endif
46
Sujith394cf0a2009-02-09 13:26:54 +053047#ifdef CONFIG_ATH9K_DEBUG
48
49/**
50 * struct ath_interrupt_stats - Contains statistics about interrupts
51 * @total: Total no. of interrupts generated so far
52 * @rxok: RX with no errors
53 * @rxeol: RX with no more RXDESC available
54 * @rxorn: RX FIFO overrun
55 * @txok: TX completed at the requested rate
56 * @txurn: TX FIFO underrun
57 * @mib: MIB regs reaching its threshold
58 * @rxphyerr: RX with phy errors
59 * @rx_keycache_miss: RX with key cache misses
60 * @swba: Software Beacon Alert
61 * @bmiss: Beacon Miss
62 * @bnr: Beacon Not Ready
63 * @cst: Carrier Sense TImeout
64 * @gtt: Global TX Timeout
65 * @tim: RX beacon TIM occurrence
66 * @cabend: RX End of CAB traffic
67 * @dtimsync: DTIM sync lossage
68 * @dtim: RX Beacon with DTIM
69 */
70struct ath_interrupt_stats {
71 u32 total;
72 u32 rxok;
73 u32 rxeol;
74 u32 rxorn;
75 u32 txok;
76 u32 txeol;
77 u32 txurn;
78 u32 mib;
79 u32 rxphyerr;
80 u32 rx_keycache_miss;
81 u32 swba;
82 u32 bmiss;
83 u32 bnr;
84 u32 cst;
85 u32 gtt;
86 u32 tim;
87 u32 cabend;
88 u32 dtimsync;
89 u32 dtim;
90};
91
Jeff Hansenbedf0872009-05-27 12:48:28 +000092struct ath_rc_stats {
Sujith394cf0a2009-02-09 13:26:54 +053093 u32 success;
94 u32 retries;
95 u32 xretries;
Sujith9e712792009-02-20 15:13:20 +053096 u8 per;
Sujith394cf0a2009-02-09 13:26:54 +053097};
98
Sujithfec247c2009-07-27 12:08:16 +053099/**
100 * struct ath_tx_stats - Statistics about TX
101 * @queued: Total MPDUs (non-aggr) queued
102 * @completed: Total MPDUs (non-aggr) completed
103 * @a_aggr: Total no. of aggregates queued
104 * @a_queued: Total AMPDUs queued
105 * @a_completed: Total AMPDUs completed
106 * @a_retries: No. of AMPDUs retried (SW)
107 * @a_xretries: No. of AMPDUs dropped due to xretries
108 * @fifo_underrun: FIFO underrun occurrences
109 Valid only for:
110 - non-aggregate condition.
111 - first packet of aggregate.
112 * @xtxop: No. of frames filtered because of TXOP limit
113 * @timer_exp: Transmit timer expiry
114 * @desc_cfg_err: Descriptor configuration errors
115 * @data_urn: TX data underrun errors
116 * @delim_urn: TX delimiter underrun errors
117 */
118struct ath_tx_stats {
119 u32 queued;
120 u32 completed;
121 u32 a_aggr;
122 u32 a_queued;
123 u32 a_completed;
124 u32 a_retries;
125 u32 a_xretries;
126 u32 fifo_underrun;
127 u32 xtxop;
128 u32 timer_exp;
129 u32 desc_cfg_err;
130 u32 data_underrun;
131 u32 delim_underrun;
132};
133
Sujith394cf0a2009-02-09 13:26:54 +0530134struct ath_stats {
135 struct ath_interrupt_stats istats;
Jeff Hansenbedf0872009-05-27 12:48:28 +0000136 struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
Sujithfec247c2009-07-27 12:08:16 +0530137 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
Sujith394cf0a2009-02-09 13:26:54 +0530138};
139
140struct ath9k_debug {
141 int debug_mask;
Sujith394cf0a2009-02-09 13:26:54 +0530142 struct dentry *debugfs_phy;
Jeff Hansen24939282009-05-27 12:48:29 +0000143 struct dentry *debugfs_debug;
Sujith394cf0a2009-02-09 13:26:54 +0530144 struct dentry *debugfs_dma;
145 struct dentry *debugfs_interrupt;
146 struct dentry *debugfs_rcstat;
Jouni Malinen39d89cd2009-03-03 19:23:40 +0200147 struct dentry *debugfs_wiphy;
Sujithfec247c2009-07-27 12:08:16 +0530148 struct dentry *debugfs_xmit;
Sujith394cf0a2009-02-09 13:26:54 +0530149 struct ath_stats stats;
150};
151
152void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...);
153int ath9k_init_debug(struct ath_softc *sc);
154void ath9k_exit_debug(struct ath_softc *sc);
Gabor Juhos19d8bc22009-03-05 16:55:18 +0100155int ath9k_debug_create_root(void);
156void ath9k_debug_remove_root(void);
Sujith394cf0a2009-02-09 13:26:54 +0530157void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
158void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb);
Sujithfec247c2009-07-27 12:08:16 +0530159void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq,
160 struct ath_buf *bf);
Sujith394cf0a2009-02-09 13:26:54 +0530161void ath_debug_stat_retries(struct ath_softc *sc, int rix,
Sujith9e712792009-02-20 15:13:20 +0530162 int xretries, int retries, u8 per);
Sujith394cf0a2009-02-09 13:26:54 +0530163
164#else
165
166static inline void DPRINTF(struct ath_softc *sc, int dbg_mask,
167 const char *fmt, ...)
168{
169}
170
171static inline int ath9k_init_debug(struct ath_softc *sc)
172{
173 return 0;
174}
175
176static inline void ath9k_exit_debug(struct ath_softc *sc)
177{
178}
179
Gabor Juhos19d8bc22009-03-05 16:55:18 +0100180static inline int ath9k_debug_create_root(void)
181{
182 return 0;
183}
184
185static inline void ath9k_debug_remove_root(void)
186{
187}
188
Sujith394cf0a2009-02-09 13:26:54 +0530189static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
190 enum ath9k_int status)
191{
192}
193
194static inline void ath_debug_stat_rc(struct ath_softc *sc,
195 struct sk_buff *skb)
196{
197}
198
Sujithfec247c2009-07-27 12:08:16 +0530199static inline void ath_debug_stat_tx(struct ath_softc *sc,
200 struct ath_txq *txq,
201 struct ath_buf *bf)
202{
203}
204
Sujith394cf0a2009-02-09 13:26:54 +0530205static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix,
Sujith9e712792009-02-20 15:13:20 +0530206 int xretries, int retries, u8 per)
Sujith394cf0a2009-02-09 13:26:54 +0530207{
208}
209
210#endif /* CONFIG_ATH9K_DEBUG */
211
212#endif /* DEBUG_H */