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Ben Dooksffd65af2007-06-23 17:16:31 -07001 SM501 Driver
2 ============
3
4Copyright 2006, 2007 Simtec Electronics
5
6Core
7----
8
9The core driver in drivers/mfd provides common services for the
10drivers which manage the specific hardware blocks. These services
11include locking for common registers, clock control and resource
12management.
13
14The core registers drivers for both PCI and generic bus based
15chips via the platform device and driver system.
16
17On detection of a device, the core initialises the chip (which may
18be specified by the platform data) and then exports the selected
19peripheral set as platform devices for the specific drivers.
20
21The core re-uses the platform device system as the platform device
22system provides enough features to support the drivers without the
23need to create a new bus-type and the associated code to go with it.
24
25
26Resources
27---------
28
29Each peripheral has a view of the device which is implicitly narrowed to
30the specific set of resources that peripheral requires in order to
31function correctly.
32
33The centralised memory allocation allows the driver to ensure that the
34maximum possible resource allocation can be made to the video subsystem
35as this is by-far the most resource-sensitive of the on-chip functions.
36
37The primary issue with memory allocation is that of moving the video
38buffers once a display mode is chosen. Indeed when a video mode change
39occurs the memory footprint of the video subsystem changes.
40
41Since video memory is difficult to move without changing the display
42(unless sufficient contiguous memory can be provided for the old and new
43modes simultaneously) the video driver fully utilises the memory area
44given to it by aligning fb0 to the start of the area and fb1 to the end
45of it. Any memory left over in the middle is used for the acceleration
46functions, which are transient and thus their location is less critical
47as it can be moved.
48
49
50Configuration
51-------------
52
53The platform device driver uses a set of platform data to pass
54configurations through to the core and the subsidiary drivers
55so that there can be support for more than one system carrying
56an SM501 built into a single kernel image.
57
58The PCI driver assumes that the PCI card behaves as per the Silicon
59Motion reference design.
60
61There is an errata (AB-5) affecting the selection of the
62of the M1XCLK and M1CLK frequencies. These two clocks
63must be sourced from the same PLL, although they can then
64be divided down individually. If this is not set, then SM501 may
65lock and hang the whole system. The driver will refuse to
66attach if the PLL selection is different.