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Christoph Lametera1b2a552013-04-04 14:41:08 +00001this_cpu operations
2-------------------
3
4this_cpu operations are a way of optimizing access to per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -07005variables associated with the *currently* executing processor. This is
6done through the use of segment registers (or a dedicated register where
7the cpu permanently stored the beginning of the per cpu area for a
8specific processor).
Christoph Lametera1b2a552013-04-04 14:41:08 +00009
Pranith Kumarac490f42014-08-24 18:17:32 -070010this_cpu operations add a per cpu variable offset to the processor
11specific per cpu base and encode that operation in the instruction
Christoph Lametera1b2a552013-04-04 14:41:08 +000012operating on the per cpu variable.
13
Pranith Kumarac490f42014-08-24 18:17:32 -070014This means that there are no atomicity issues between the calculation of
Christoph Lametera1b2a552013-04-04 14:41:08 +000015the offset and the operation on the data. Therefore it is not
Pranith Kumarac490f42014-08-24 18:17:32 -070016necessary to disable preemption or interrupts to ensure that the
Christoph Lametera1b2a552013-04-04 14:41:08 +000017processor is not changed between the calculation of the address and
18the operation on the data.
19
20Read-modify-write operations are of particular interest. Frequently
21processors have special lower latency instructions that can operate
Pranith Kumarac490f42014-08-24 18:17:32 -070022without the typical synchronization overhead, but still provide some
23sort of relaxed atomicity guarantees. The x86, for example, can execute
24RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
Christoph Lametera1b2a552013-04-04 14:41:08 +000025lock prefix and the associated latency penalty.
26
27Access to the variable without the lock prefix is not synchronized but
28synchronization is not necessary since we are dealing with per cpu
29data specific to the currently executing processor. Only the current
30processor should be accessing that variable and therefore there are no
31concurrency issues with other processors in the system.
32
Pranith Kumarac490f42014-08-24 18:17:32 -070033Please note that accesses by remote processors to a per cpu area are
34exceptional situations and may impact performance and/or correctness
35(remote write operations) of local RMW operations via this_cpu_*.
36
37The main use of the this_cpu operations has been to optimize counter
38operations.
39
40The following this_cpu() operations with implied preemption protection
41are defined. These operations can be used without worrying about
42preemption and interrupts.
43
Pranith Kumarac490f42014-08-24 18:17:32 -070044 this_cpu_read(pcp)
45 this_cpu_write(pcp, val)
46 this_cpu_add(pcp, val)
47 this_cpu_and(pcp, val)
48 this_cpu_or(pcp, val)
49 this_cpu_add_return(pcp, val)
50 this_cpu_xchg(pcp, nval)
51 this_cpu_cmpxchg(pcp, oval, nval)
52 this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
53 this_cpu_sub(pcp, val)
54 this_cpu_inc(pcp)
55 this_cpu_dec(pcp)
56 this_cpu_sub_return(pcp, val)
57 this_cpu_inc_return(pcp)
58 this_cpu_dec_return(pcp)
59
60
61Inner working of this_cpu operations
62------------------------------------
63
Christoph Lametera1b2a552013-04-04 14:41:08 +000064On x86 the fs: or the gs: segment registers contain the base of the
65per cpu area. It is then possible to simply use the segment override
66to relocate a per cpu relative address to the proper per cpu area for
67the processor. So the relocation to the per cpu base is encoded in the
68instruction via a segment register prefix.
69
70For example:
71
72 DEFINE_PER_CPU(int, x);
73 int z;
74
75 z = this_cpu_read(x);
76
77results in a single instruction
78
79 mov ax, gs:[x]
80
81instead of a sequence of calculation of the address and then a fetch
Pranith Kumarac490f42014-08-24 18:17:32 -070082from that address which occurs with the per cpu operations. Before
Christoph Lametera1b2a552013-04-04 14:41:08 +000083this_cpu_ops such sequence also required preempt disable/enable to
84prevent the kernel from moving the thread to a different processor
85while the calculation is performed.
86
Pranith Kumarac490f42014-08-24 18:17:32 -070087Consider the following this_cpu operation:
Christoph Lametera1b2a552013-04-04 14:41:08 +000088
89 this_cpu_inc(x)
90
Pranith Kumarac490f42014-08-24 18:17:32 -070091The above results in the following single instruction (no lock prefix!)
Christoph Lametera1b2a552013-04-04 14:41:08 +000092
93 inc gs:[x]
94
95instead of the following operations required if there is no segment
Pranith Kumarac490f42014-08-24 18:17:32 -070096register:
Christoph Lametera1b2a552013-04-04 14:41:08 +000097
98 int *y;
99 int cpu;
100
101 cpu = get_cpu();
102 y = per_cpu_ptr(&x, cpu);
103 (*y)++;
104 put_cpu();
105
Pranith Kumarac490f42014-08-24 18:17:32 -0700106Note that these operations can only be used on per cpu data that is
Christoph Lametera1b2a552013-04-04 14:41:08 +0000107reserved for a specific processor. Without disabling preemption in the
108surrounding code this_cpu_inc() will only guarantee that one of the
Pranith Kumarac490f42014-08-24 18:17:32 -0700109per cpu counters is correctly incremented. However, there is no
Christoph Lametera1b2a552013-04-04 14:41:08 +0000110guarantee that the OS will not move the process directly before or
111after the this_cpu instruction is executed. In general this means that
112the value of the individual counters for each processor are
113meaningless. The sum of all the per cpu counters is the only value
114that is of interest.
115
116Per cpu variables are used for performance reasons. Bouncing cache
117lines can be avoided if multiple processors concurrently go through
118the same code paths. Since each processor has its own per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -0700119variables no concurrent cache line updates take place. The price that
Christoph Lametera1b2a552013-04-04 14:41:08 +0000120has to be paid for this optimization is the need to add up the per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -0700121counters when the value of a counter is needed.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000122
123
124Special operations:
125-------------------
126
127 y = this_cpu_ptr(&x)
128
129Takes the offset of a per cpu variable (&x !) and returns the address
130of the per cpu variable that belongs to the currently executing
131processor. this_cpu_ptr avoids multiple steps that the common
132get_cpu/put_cpu sequence requires. No processor number is
Pranith Kumarac490f42014-08-24 18:17:32 -0700133available. Instead, the offset of the local per cpu area is simply
134added to the per cpu offset.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000135
Pranith Kumarac490f42014-08-24 18:17:32 -0700136Note that this operation is usually used in a code segment when
137preemption has been disabled. The pointer is then used to
138access local per cpu data in a critical section. When preemption
139is re-enabled this pointer is usually no longer useful since it may
140no longer point to per cpu data of the current processor.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000141
142
143Per cpu variables and offsets
144-----------------------------
145
Pranith Kumarac490f42014-08-24 18:17:32 -0700146Per cpu variables have *offsets* to the beginning of the per cpu
Christoph Lametera1b2a552013-04-04 14:41:08 +0000147area. They do not have addresses although they look like that in the
148code. Offsets cannot be directly dereferenced. The offset must be
Pranith Kumarac490f42014-08-24 18:17:32 -0700149added to a base pointer of a per cpu area of a processor in order to
Christoph Lametera1b2a552013-04-04 14:41:08 +0000150form a valid address.
151
152Therefore the use of x or &x outside of the context of per cpu
153operations is invalid and will generally be treated like a NULL
154pointer dereference.
155
Pranith Kumarac490f42014-08-24 18:17:32 -0700156 DEFINE_PER_CPU(int, x);
Christoph Lametera1b2a552013-04-04 14:41:08 +0000157
Pranith Kumarac490f42014-08-24 18:17:32 -0700158In the context of per cpu operations the above implies that x is a per
159cpu variable. Most this_cpu operations take a cpu variable.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000160
Pranith Kumarac490f42014-08-24 18:17:32 -0700161 int __percpu *p = &x;
Christoph Lametera1b2a552013-04-04 14:41:08 +0000162
Pranith Kumarac490f42014-08-24 18:17:32 -0700163&x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
164takes the offset of a per cpu variable which makes this look a bit
165strange.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000166
167
168Operations on a field of a per cpu structure
169--------------------------------------------
170
171Let's say we have a percpu structure
172
173 struct s {
174 int n,m;
175 };
176
177 DEFINE_PER_CPU(struct s, p);
178
179
180Operations on these fields are straightforward
181
182 this_cpu_inc(p.m)
183
184 z = this_cpu_cmpxchg(p.m, 0, 1);
185
186
187If we have an offset to struct s:
188
189 struct s __percpu *ps = &p;
190
Pranith Kumarac490f42014-08-24 18:17:32 -0700191 this_cpu_dec(ps->m);
Christoph Lametera1b2a552013-04-04 14:41:08 +0000192
193 z = this_cpu_inc_return(ps->n);
194
195
196The calculation of the pointer may require the use of this_cpu_ptr()
197if we do not make use of this_cpu ops later to manipulate fields:
198
199 struct s *pp;
200
201 pp = this_cpu_ptr(&p);
202
203 pp->m--;
204
205 z = pp->n++;
206
207
208Variants of this_cpu ops
209-------------------------
210
Pranith Kumarac490f42014-08-24 18:17:32 -0700211this_cpu ops are interrupt safe. Some architectures do not support
Christoph Lametera1b2a552013-04-04 14:41:08 +0000212these per cpu local operations. In that case the operation must be
213replaced by code that disables interrupts, then does the operations
Pranith Kumarac490f42014-08-24 18:17:32 -0700214that are guaranteed to be atomic and then re-enable interrupts. Doing
Christoph Lametera1b2a552013-04-04 14:41:08 +0000215so is expensive. If there are other reasons why the scheduler cannot
216change the processor we are executing on then there is no reason to
Pranith Kumarac490f42014-08-24 18:17:32 -0700217disable interrupts. For that purpose the following __this_cpu operations
218are provided.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000219
Pranith Kumarac490f42014-08-24 18:17:32 -0700220These operations have no guarantee against concurrent interrupts or
221preemption. If a per cpu variable is not used in an interrupt context
222and the scheduler cannot preempt, then they are safe. If any interrupts
223still occur while an operation is in progress and if the interrupt too
224modifies the variable, then RMW actions can not be guaranteed to be
225safe.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000226
Pranith Kumarac490f42014-08-24 18:17:32 -0700227 __this_cpu_read(pcp)
228 __this_cpu_write(pcp, val)
229 __this_cpu_add(pcp, val)
230 __this_cpu_and(pcp, val)
231 __this_cpu_or(pcp, val)
232 __this_cpu_add_return(pcp, val)
233 __this_cpu_xchg(pcp, nval)
234 __this_cpu_cmpxchg(pcp, oval, nval)
235 __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
236 __this_cpu_sub(pcp, val)
237 __this_cpu_inc(pcp)
238 __this_cpu_dec(pcp)
239 __this_cpu_sub_return(pcp, val)
240 __this_cpu_inc_return(pcp)
241 __this_cpu_dec_return(pcp)
242
243
244Will increment x and will not fall-back to code that disables
Christoph Lametera1b2a552013-04-04 14:41:08 +0000245interrupts on platforms that cannot accomplish atomicity through
246address relocation and a Read-Modify-Write operation in the same
247instruction.
248
249
Christoph Lametera1b2a552013-04-04 14:41:08 +0000250&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
251--------------------------------------------
252
253The first operation takes the offset and forms an address and then
Pranith Kumarac490f42014-08-24 18:17:32 -0700254adds the offset of the n field. This may result in two add
255instructions emitted by the compiler.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000256
257The second one first adds the two offsets and then does the
258relocation. IMHO the second form looks cleaner and has an easier time
259with (). The second form also is consistent with the way
260this_cpu_read() and friends are used.
261
262
Pranith Kumarac490f42014-08-24 18:17:32 -0700263Remote access to per cpu data
264------------------------------
265
266Per cpu data structures are designed to be used by one cpu exclusively.
267If you use the variables as intended, this_cpu_ops() are guaranteed to
268be "atomic" as no other CPU has access to these data structures.
269
270There are special cases where you might need to access per cpu data
271structures remotely. It is usually safe to do a remote read access
272and that is frequently done to summarize counters. Remote write access
273something which could be problematic because this_cpu ops do not
274have lock semantics. A remote write may interfere with a this_cpu
275RMW operation.
276
277Remote write accesses to percpu data structures are highly discouraged
278unless absolutely necessary. Please consider using an IPI to wake up
279the remote CPU and perform the update to its per cpu area.
280
281To access per-cpu data structure remotely, typically the per_cpu_ptr()
282function is used:
283
284
285 DEFINE_PER_CPU(struct data, datap);
286
287 struct data *p = per_cpu_ptr(&datap, cpu);
288
289This makes it explicit that we are getting ready to access a percpu
290area remotely.
291
292You can also do the following to convert the datap offset to an address
293
294 struct data *p = this_cpu_ptr(&datap);
295
296but, passing of pointers calculated via this_cpu_ptr to other cpus is
297unusual and should be avoided.
298
299Remote access are typically only for reading the status of another cpus
300per cpu data. Write accesses can cause unique problems due to the
301relaxed synchronization requirements for this_cpu operations.
302
303One example that illustrates some concerns with write operations is
304the following scenario that occurs because two per cpu variables
305share a cache-line but the relaxed synchronization is applied to
306only one process updating the cache-line.
307
308Consider the following example
309
310
311 struct test {
312 atomic_t a;
313 int b;
314 };
315
316 DEFINE_PER_CPU(struct test, onecacheline);
317
318There is some concern about what would happen if the field 'a' is updated
319remotely from one processor and the local processor would use this_cpu ops
320to update field b. Care should be taken that such simultaneous accesses to
321data within the same cache line are avoided. Also costly synchronization
322may be necessary. IPIs are generally recommended in such scenarios instead
323of a remote write to the per cpu area of another processor.
324
325Even in cases where the remote writes are rare, please bear in
326mind that a remote write will evict the cache line from the processor
327that most likely will access it. If the processor wakes up and finds a
328missing local cache line of a per cpu area, its performance and hence
329the wake up times will be affected.
330
331Christoph Lameter, August 4th, 2014
332Pranith Kumar, Aug 2nd, 2014