blob: d833d616bd2ed0177d7e7342f6a1673e7051c322 [file] [log] [blame]
Uwe Kleine-König58862692007-05-09 07:51:49 +02001/* linux/arch/arm/plat-s3c24xx/sleep.S
Ben Dooksa21765a2007-02-11 18:31:01 +01002 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 Power Manager (Suspend-To-RAM) support
7 *
8 * Based on PXA/SA1100 sleep code by:
9 * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
10 * Cliff Brake, (c) 2001
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25*/
26
27#include <linux/linkage.h>
Tushar Behera334a1c72014-02-14 10:32:45 +090028#include <linux/serial_s3c.h>
Ben Dooksa21765a2007-02-11 18:31:01 +010029#include <asm/assembler.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/hardware.h>
31#include <mach/map.h>
Ben Dooksa21765a2007-02-11 18:31:01 +010032
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/regs-gpio.h>
34#include <mach/regs-clock.h>
Ben Dooksa21765a2007-02-11 18:31:01 +010035
36/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
37 * reset the UART configuration, only enable if you really need this!
38*/
39//#define CONFIG_DEBUG_RESUME
40
41 .text
42
Ben Dooks6c729af2007-09-30 09:59:15 +010043 /* sleep magic, to allow the bootloader to check for an valid
44 * image to resume to. Must be the first word before the
Ben Dooksef30e142008-12-12 00:24:19 +000045 * s3c_cpu_resume entry.
Ben Dooks6c729af2007-09-30 09:59:15 +010046 */
47
48 .word 0x2bedf00d
49
Ben Dooksef30e142008-12-12 00:24:19 +000050 /* s3c_cpu_resume
Ben Dooksa21765a2007-02-11 18:31:01 +010051 *
52 * resume code entry for bootloader to call
Ben Dooksa21765a2007-02-11 18:31:01 +010053 */
54
Ben Dooksef30e142008-12-12 00:24:19 +000055ENTRY(s3c_cpu_resume)
Ben Dooksa21765a2007-02-11 18:31:01 +010056 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
57 msr cpsr_c, r0
58
59 @@ load UART to allow us to print the two characters for
60 @@ resume debug
61
62 mov r2, #S3C24XX_PA_UART & 0xff000000
63 orr r2, r2, #S3C24XX_PA_UART & 0xff000
64
65#if 0
66 /* SMDK2440 LED set */
67 mov r14, #S3C24XX_PA_GPIO
68 ldr r12, [ r14, #0x54 ]
69 bic r12, r12, #3<<4
70 orr r12, r12, #1<<7
71 str r12, [ r14, #0x54 ]
72#endif
73
74#ifdef CONFIG_DEBUG_RESUME
75 mov r3, #'L'
76 strb r3, [ r2, #S3C2410_UTXH ]
771001:
78 ldrb r14, [ r3, #S3C2410_UTRSTAT ]
79 tst r14, #S3C2410_UTRSTAT_TXE
80 beq 1001b
81#endif /* CONFIG_DEBUG_RESUME */
82
Russell King2e2f3d32011-02-06 17:39:31 +000083 b cpu_resume