blob: 6d0152321819b823200b8082bed7e757078f47fd [file] [log] [blame]
Lars-Peter Clausen713233f2010-06-19 04:08:12 +00001/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
Maarten ter Huurne6edde022011-05-02 11:47:00 +02003 * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
Lars-Peter Clausen713233f2010-06-19 04:08:12 +00004 * JZ4740 setup code
5 *
6 * This program is free software; you can redistribute it and/or modify it
Ralf Baechle70342282013-01-22 12:59:30 +01007 * under the terms of the GNU General Public License as published by the
Lars-Peter Clausen713233f2010-06-19 04:08:12 +00008 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 *
15 */
16
17#include <linux/init.h>
Maarten ter Huurne6edde022011-05-02 11:47:00 +020018#include <linux/io.h>
Paul Burton0e81db82015-05-24 16:11:19 +010019#include <linux/irqchip.h>
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000020#include <linux/kernel.h>
Paul Burton6ec127f2015-05-24 16:11:42 +010021#include <linux/libfdt.h>
Paul Burtonffb1843d052015-05-24 16:11:15 +010022#include <linux/of_fdt.h>
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000023
Maarten ter Huurne6edde022011-05-02 11:47:00 +020024#include <asm/bootinfo.h>
Paul Burtonffb1843d052015-05-24 16:11:15 +010025#include <asm/prom.h>
Maarten ter Huurne6edde022011-05-02 11:47:00 +020026
27#include <asm/mach-jz4740/base.h>
28
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000029#include "reset.h"
30
Maarten ter Huurne6edde022011-05-02 11:47:00 +020031
32#define JZ4740_EMC_SDRAM_CTRL 0x80
33
34
35static void __init jz4740_detect_mem(void)
36{
37 void __iomem *jz_emc_base;
38 u32 ctrl, bus, bank, rows, cols;
Ralf Baechle15d45cc2014-11-22 00:22:09 +010039 phys_addr_t size;
Maarten ter Huurne6edde022011-05-02 11:47:00 +020040
41 jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
42 ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
43 bus = 2 - ((ctrl >> 31) & 1);
44 bank = 1 + ((ctrl >> 19) & 1);
45 cols = 8 + ((ctrl >> 26) & 7);
46 rows = 11 + ((ctrl >> 20) & 3);
47 printk(KERN_DEBUG
48 "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
49 bus, bank, rows, cols);
50 iounmap(jz_emc_base);
51
52 size = 1 << (bus + bank + cols + rows);
53 add_memory_region(0, size, BOOT_MEM_RAM);
54}
55
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000056void __init plat_mem_setup(void)
57{
Paul Burton6ec127f2015-05-24 16:11:42 +010058 int offset;
59
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000060 jz4740_reset_init();
Paul Burtonffb1843d052015-05-24 16:11:15 +010061 __dt_setup_arch(__dtb_start);
Paul Burton6ec127f2015-05-24 16:11:42 +010062
63 offset = fdt_path_offset(__dtb_start, "/memory");
64 if (offset < 0)
65 jz4740_detect_mem();
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000066}
67
Paul Burtonffb1843d052015-05-24 16:11:15 +010068void __init device_tree_init(void)
69{
70 if (!initial_boot_params)
71 return;
72
73 unflatten_and_copy_device_tree();
74}
75
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000076const char *get_system_type(void)
77{
Masahiro Yamada97f26452016-08-03 13:45:50 -070078 if (IS_ENABLED(CONFIG_MACH_JZ4780))
Paul Burton5b9cdd22015-05-24 16:11:46 +010079 return "JZ4780";
80
Lars-Peter Clausen713233f2010-06-19 04:08:12 +000081 return "JZ4740";
82}
Paul Burton0e81db82015-05-24 16:11:19 +010083
84void __init arch_init_irq(void)
85{
86 irqchip_init();
Paul Burton0e81db82015-05-24 16:11:19 +010087}