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Yoichi Yuasa42474172008-04-24 09:48:40 +09001/*
2 * DEC I/O ASIC's counter clocksource
3 *
Ralf Baechle70342282013-01-22 12:59:30 +01004 * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org>
Yoichi Yuasa42474172008-04-24 09:48:40 +09005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Yoichi Yuasa42474172008-04-24 09:48:40 +090015 */
16#include <linux/clocksource.h>
Deng-Cheng Zhu7cb24b72015-03-07 10:30:28 -080017#include <linux/sched_clock.h>
Yoichi Yuasa42474172008-04-24 09:48:40 +090018#include <linux/init.h>
19
20#include <asm/ds1287.h>
21#include <asm/time.h>
22#include <asm/dec/ioasic.h>
23#include <asm/dec/ioasic_addrs.h>
24
Magnus Damm8e196082009-04-21 12:24:00 -070025static cycle_t dec_ioasic_hpt_read(struct clocksource *cs)
Yoichi Yuasa42474172008-04-24 09:48:40 +090026{
27 return ioasic_read(IO_REG_FCTR);
28}
29
30static struct clocksource clocksource_dec = {
31 .name = "dec-ioasic",
32 .read = dec_ioasic_hpt_read,
33 .mask = CLOCKSOURCE_MASK(32),
34 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
35};
36
Deng-Cheng Zhu7cb24b72015-03-07 10:30:28 -080037static u64 notrace dec_ioasic_read_sched_clock(void)
38{
39 return ioasic_read(IO_REG_FCTR);
40}
41
Maciej W. Rozyckidaed1282013-09-12 12:01:53 +010042int __init dec_ioasic_clocksource_init(void)
Yoichi Yuasa42474172008-04-24 09:48:40 +090043{
44 unsigned int freq;
45 u32 start, end;
Maciej W. Rozycki85339662013-09-04 23:47:45 +010046 int i = HZ / 8;
Yoichi Yuasa42474172008-04-24 09:48:40 +090047
Maciej W. Rozycki85339662013-09-04 23:47:45 +010048 ds1287_timer_state();
Yoichi Yuasa42474172008-04-24 09:48:40 +090049 while (!ds1287_timer_state())
50 ;
51
Magnus Damm8e196082009-04-21 12:24:00 -070052 start = dec_ioasic_hpt_read(&clocksource_dec);
Yoichi Yuasa42474172008-04-24 09:48:40 +090053
54 while (i--)
55 while (!ds1287_timer_state())
56 ;
57
Magnus Damm8e196082009-04-21 12:24:00 -070058 end = dec_ioasic_hpt_read(&clocksource_dec);
Yoichi Yuasa42474172008-04-24 09:48:40 +090059
Maciej W. Rozycki85339662013-09-04 23:47:45 +010060 freq = (end - start) * 8;
Maciej W. Rozyckidaed1282013-09-12 12:01:53 +010061
62 /* An early revision of the I/O ASIC didn't have the counter. */
63 if (!freq)
64 return -ENXIO;
65
Yoichi Yuasa42474172008-04-24 09:48:40 +090066 printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
67
68 clocksource_dec.rating = 200 + freq / 10000000;
John Stultz75c4fd82010-04-26 20:23:11 -070069 clocksource_register_hz(&clocksource_dec, freq);
Deng-Cheng Zhu7cb24b72015-03-07 10:30:28 -080070
71 sched_clock_register(dec_ioasic_read_sched_clock, 32, freq);
72
Maciej W. Rozyckidaed1282013-09-12 12:01:53 +010073 return 0;
Yoichi Yuasa42474172008-04-24 09:48:40 +090074}