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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
13 *
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15 * binaries.
16 */
17#include <linux/compiler.h>
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +020018#include <linux/compat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/kernel.h>
20#include <linux/sched.h>
21#include <linux/mm.h>
22#include <linux/errno.h>
23#include <linux/ptrace.h>
24#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/security.h>
26
27#include <asm/cpu.h>
Ralf Baechlee50c0a82005-05-31 11:49:19 +000028#include <asm/dsp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/fpu.h>
30#include <asm/mipsregs.h>
Ralf Baechle101b3532005-10-06 17:39:32 +010031#include <asm/mipsmtregs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <asm/pgtable.h>
33#include <asm/page.h>
Alex Smith60be9392014-07-23 14:40:15 +010034#include <asm/reg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <asm/uaccess.h>
36#include <asm/bootinfo.h>
37
38/*
39 * Tracing a 32-bit process with a 64-bit strace and vice versa will not
40 * work. I don't know how to fix this.
41 */
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +020042long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
43 compat_ulong_t caddr, compat_ulong_t cdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -070044{
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +020045 int addr = caddr;
46 int data = cdata;
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 int ret;
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 switch (request) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040051 /*
52 * Read 4 bytes of the other process' storage
53 * data is a pointer specifying where the user wants the
54 * 4 bytes copied into
55 * addr is a pointer in the user's storage that contains an 8 byte
56 * address in the other process of the 4 bytes that is to be read
57 * (this is run in a 32-bit process looking at a 64-bit process)
58 * when I and D space are separate, these will need to be fixed.
59 */
60 case PTRACE_PEEKTEXT_3264:
61 case PTRACE_PEEKDATA_3264: {
62 u32 tmp;
63 int copied;
64 u32 __user * addrOthers;
65
66 ret = -EIO;
67
68 /* Get the addr in the other process that we want to read */
69 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
70 break;
71
Eric W. Biedermane71b4e02016-11-22 12:06:50 -060072 copied = ptrace_access_vm(child, (u64)addrOthers, &tmp,
Lorenzo Stoakesf307ab62016-10-13 01:20:20 +010073 sizeof(tmp), FOLL_FORCE);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040074 if (copied != sizeof(tmp))
75 break;
76 ret = put_user(tmp, (u32 __user *) (unsigned long) data);
77 break;
78 }
79
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 /* Read the word at location addr in the USER area. */
81 case PTRACE_PEEKUSR: {
82 struct pt_regs *regs;
Paul Burtonbbd426f2014-02-13 11:26:41 +000083 union fpureg *fregs;
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 unsigned int tmp;
85
Al Viro40bc9c62006-01-12 01:06:07 -080086 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 ret = 0; /* Default return value. */
88
89 switch (addr) {
90 case 0 ... 31:
91 tmp = regs->regs[addr];
92 break;
93 case FPR_BASE ... FPR_BASE + 31:
Paul Burton597ce172013-11-22 13:12:07 +000094 if (!tsk_used_math(child)) {
95 /* FP not yet used */
96 tmp = -1;
97 break;
98 }
99 fregs = get_fpu_regs(child);
Maciej W. Rozycki0ed5a212018-05-14 16:49:43 +0100100 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 /*
102 * The odd registers are actually the high
103 * order bits of the values stored in the even
104 * registers - unless we're using r2k_switch.S.
105 */
Paul Burtonbbd426f2014-02-13 11:26:41 +0000106 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
107 addr & 1);
Paul Burton597ce172013-11-22 13:12:07 +0000108 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109 }
Maciej W. Rozycki5826fc52018-05-16 16:39:58 +0100110 tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 break;
112 case PC:
113 tmp = regs->cp0_epc;
114 break;
115 case CAUSE:
116 tmp = regs->cp0_cause;
117 break;
118 case BADVADDR:
119 tmp = regs->cp0_badvaddr;
120 break;
121 case MMHI:
122 tmp = regs->hi;
123 break;
124 case MMLO:
125 tmp = regs->lo;
126 break;
127 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900128 tmp = child->thread.fpu.fcr31;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 break;
Paul Burton33510472013-11-19 17:30:35 +0000130 case FPC_EIR:
131 /* implementation / version register */
Alex Smith656ff9b2014-07-23 14:40:06 +0100132 tmp = boot_cpu_data.fpu_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 break;
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900134 case DSP_BASE ... DSP_BASE + 5: {
135 dspreg_t *dregs;
136
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000137 if (!cpu_has_dsp) {
138 tmp = 0;
139 ret = -EIO;
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +0200140 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000141 }
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900142 dregs = __get_dsp_regs(child);
Maciej W. Rozyckieb3717f2018-05-15 23:33:26 +0100143 tmp = dregs[addr - DSP_BASE];
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000144 break;
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900145 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000146 case DSP_CONTROL:
147 if (!cpu_has_dsp) {
148 tmp = 0;
149 ret = -EIO;
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +0200150 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000151 }
152 tmp = child->thread.dsp.dspcontrol;
153 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154 default:
155 tmp = 0;
156 ret = -EIO;
Thomas Bogendoerfer5d9a76c2008-08-17 16:49:25 +0200157 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 }
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900159 ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 break;
161 }
162
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400163 /*
164 * Write 4 bytes into the other process' storage
165 * data is the 4 bytes that the user wants written
166 * addr is a pointer in the user's storage that contains an
167 * 8 byte address in the other process where the 4 bytes
168 * that is to be written
169 * (this is run in a 32-bit process looking at a 64-bit process)
170 * when I and D space are separate, these will need to be fixed.
171 */
172 case PTRACE_POKETEXT_3264:
173 case PTRACE_POKEDATA_3264: {
174 u32 __user * addrOthers;
175
176 /* Get the addr in the other process that we want to write into */
177 ret = -EIO;
178 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
179 break;
180 ret = 0;
Eric W. Biedermane71b4e02016-11-22 12:06:50 -0600181 if (ptrace_access_vm(child, (u64)addrOthers, &data,
Lorenzo Stoakesf307ab62016-10-13 01:20:20 +0100182 sizeof(data),
183 FOLL_FORCE | FOLL_WRITE) == sizeof(data))
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400184 break;
185 ret = -EIO;
186 break;
187 }
188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 case PTRACE_POKEUSR: {
190 struct pt_regs *regs;
191 ret = 0;
Al Viro40bc9c62006-01-12 01:06:07 -0800192 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
194 switch (addr) {
195 case 0 ... 31:
196 regs->regs[addr] = data;
197 break;
198 case FPR_BASE ... FPR_BASE + 31: {
Paul Burtonbbd426f2014-02-13 11:26:41 +0000199 union fpureg *fregs = get_fpu_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200
201 if (!tsk_used_math(child)) {
202 /* FP not yet used */
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900203 memset(&child->thread.fpu, ~0,
204 sizeof(child->thread.fpu));
205 child->thread.fpu.fcr31 = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206 }
Maciej W. Rozycki0ed5a212018-05-14 16:49:43 +0100207 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
Paul Burton597ce172013-11-22 13:12:07 +0000208 /*
209 * The odd registers are actually the high
210 * order bits of the values stored in the even
211 * registers - unless we're using r2k_switch.S.
212 */
Paul Burtonbbd426f2014-02-13 11:26:41 +0000213 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
214 addr & 1, data);
Paul Burton597ce172013-11-22 13:12:07 +0000215 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216 }
Paul Burtonbbd426f2014-02-13 11:26:41 +0000217 set_fpr64(&fregs[addr - FPR_BASE], 0, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 break;
219 }
220 case PC:
221 regs->cp0_epc = data;
222 break;
223 case MMHI:
224 regs->hi = data;
225 break;
226 case MMLO:
227 regs->lo = data;
228 break;
229 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900230 child->thread.fpu.fcr31 = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 break;
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900232 case DSP_BASE ... DSP_BASE + 5: {
233 dspreg_t *dregs;
234
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000235 if (!cpu_has_dsp) {
236 ret = -EIO;
237 break;
238 }
239
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900240 dregs = __get_dsp_regs(child);
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000241 dregs[addr - DSP_BASE] = data;
242 break;
Atsushi Nemoto3055acb2006-01-29 22:34:32 +0900243 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000244 case DSP_CONTROL:
245 if (!cpu_has_dsp) {
246 ret = -EIO;
247 break;
248 }
249 child->thread.dsp.dspcontrol = data;
250 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251 default:
252 /* The rest are not allowed. */
253 ret = -EIO;
254 break;
255 }
256 break;
257 }
258
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400259 case PTRACE_GETREGS:
Alex Smitha79ebea2014-07-23 14:40:13 +0100260 ret = ptrace_getregs(child,
261 (struct user_pt_regs __user *) (__u64) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400262 break;
263
264 case PTRACE_SETREGS:
Alex Smitha79ebea2014-07-23 14:40:13 +0100265 ret = ptrace_setregs(child,
266 (struct user_pt_regs __user *) (__u64) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400267 break;
268
269 case PTRACE_GETFPREGS:
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100270 ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400271 break;
272
273 case PTRACE_SETFPREGS:
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100274 ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400275 break;
276
Ralf Baechle3c370262005-04-13 17:43:59 +0000277 case PTRACE_GET_THREAD_AREA:
Al Virodc8f6022006-01-12 01:06:07 -0800278 ret = put_user(task_thread_info(child)->tp_value,
Ralf Baechle3c370262005-04-13 17:43:59 +0000279 (unsigned int __user *) (unsigned long) data);
280 break;
281
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400282 case PTRACE_GET_THREAD_AREA_3264:
Al Virodc8f6022006-01-12 01:06:07 -0800283 ret = put_user(task_thread_info(child)->tp_value,
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400284 (unsigned long __user *) (unsigned long) data);
285 break;
286
David Daney0926bf92008-09-23 00:11:26 -0700287 case PTRACE_GET_WATCH_REGS:
288 ret = ptrace_get_watch_regs(child,
289 (struct pt_watch_regs __user *) (unsigned long) addr);
290 break;
291
292 case PTRACE_SET_WATCH_REGS:
293 ret = ptrace_set_watch_regs(child,
294 (struct pt_watch_regs __user *) (unsigned long) addr);
295 break;
296
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297 default:
Anirban Sinha797c3f32008-11-13 11:50:12 -0800298 ret = compat_ptrace_request(child, request, addr, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 break;
300 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302 return ret;
303}