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Jayachandran C5c64250672011-05-07 01:36:40 +05301/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/init.h>
36
37#include <asm/time.h>
Jayachandran C4e45e542013-01-14 15:11:57 +000038#include <asm/cpu-features.h>
39
Jayachandran C5c64250672011-05-07 01:36:40 +053040#include <asm/netlogic/interrupt.h>
Jayachandran C0c965402011-11-11 17:08:29 +053041#include <asm/netlogic/common.h>
Jayachandran C4e45e542013-01-14 15:11:57 +000042#include <asm/netlogic/haldefs.h>
Jayachandran C4e45e542013-01-14 15:11:57 +000043
44#if defined(CONFIG_CPU_XLP)
45#include <asm/netlogic/xlp-hal/iomap.h>
46#include <asm/netlogic/xlp-hal/xlp.h>
Ganesan Ramalingam57ceb4b2013-08-11 14:43:56 +053047#include <asm/netlogic/xlp-hal/sys.h>
Jayachandran C4e45e542013-01-14 15:11:57 +000048#include <asm/netlogic/xlp-hal/pic.h>
49#elif defined(CONFIG_CPU_XLR)
50#include <asm/netlogic/xlr/iomap.h>
51#include <asm/netlogic/xlr/pic.h>
52#include <asm/netlogic/xlr/xlr.h>
53#else
54#error "Unknown CPU"
55#endif
Jayachandran C5c64250672011-05-07 01:36:40 +053056
Paul Gortmaker078a55f2013-06-18 13:38:59 +000057unsigned int get_c0_compare_int(void)
Jayachandran C5c64250672011-05-07 01:36:40 +053058{
59 return IRQ_TIMER;
60}
61
Jayachandran C4e45e542013-01-14 15:11:57 +000062static cycle_t nlm_get_pic_timer(struct clocksource *cs)
63{
64 uint64_t picbase = nlm_get_node(0)->picbase;
65
66 return ~nlm_pic_read_timer(picbase, PIC_CLOCK_TIMER);
67}
68
69static cycle_t nlm_get_pic_timer32(struct clocksource *cs)
70{
71 uint64_t picbase = nlm_get_node(0)->picbase;
72
73 return ~nlm_pic_read_timer32(picbase, PIC_CLOCK_TIMER);
74}
75
76static struct clocksource csrc_pic = {
77 .name = "PIC",
78 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
79};
80
81static void nlm_init_pic_timer(void)
82{
83 uint64_t picbase = nlm_get_node(0)->picbase;
Ganesan Ramalingamc0659092014-04-29 20:07:51 +053084 u32 picfreq;
Jayachandran C4e45e542013-01-14 15:11:57 +000085
86 nlm_pic_set_timer(picbase, PIC_CLOCK_TIMER, ~0ULL, 0, 0);
87 if (current_cpu_data.cputype == CPU_XLR) {
88 csrc_pic.mask = CLOCKSOURCE_MASK(32);
89 csrc_pic.read = nlm_get_pic_timer32;
90 } else {
91 csrc_pic.mask = CLOCKSOURCE_MASK(64);
92 csrc_pic.read = nlm_get_pic_timer;
93 }
94 csrc_pic.rating = 1000;
Ganesan Ramalingamc0659092014-04-29 20:07:51 +053095 picfreq = pic_timer_freq();
96 clocksource_register_hz(&csrc_pic, picfreq);
97 pr_info("PIC clock source added, frequency %d\n", picfreq);
Jayachandran C4e45e542013-01-14 15:11:57 +000098}
99
Jayachandran C5c64250672011-05-07 01:36:40 +0530100void __init plat_time_init(void)
101{
Jayachandran C4e45e542013-01-14 15:11:57 +0000102 nlm_init_pic_timer();
Jayachandran C0c965402011-11-11 17:08:29 +0530103 mips_hpt_frequency = nlm_get_cpu_frequency();
Jayachandran C37a70592013-01-14 15:12:00 +0000104 if (current_cpu_type() == CPU_XLR)
105 preset_lpj = mips_hpt_frequency / (3 * HZ);
106 else
107 preset_lpj = mips_hpt_frequency / (2 * HZ);
Jayachandran C5c64250672011-05-07 01:36:40 +0530108 pr_info("MIPS counter frequency [%ld]\n",
Jayachandran C0c965402011-11-11 17:08:29 +0530109 (unsigned long)mips_hpt_frequency);
Jayachandran C5c64250672011-05-07 01:36:40 +0530110}