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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_FUTEX_H
2#define _ASM_X86_FUTEX_H
Thomas Gleixner2f18e472008-01-30 13:30:20 +01003
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
Jeff Dike730f4122008-04-30 00:54:49 -07007#include <linux/uaccess.h>
Thomas Gleixner2f18e472008-01-30 13:30:20 +01008
9#include <asm/asm.h>
10#include <asm/errno.h>
11#include <asm/processor.h>
H. Peter Anvin63bcff22012-09-21 12:43:12 -070012#include <asm/smap.h>
Thomas Gleixner2f18e472008-01-30 13:30:20 +010013
14#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070015 asm volatile("\t" ASM_STAC "\n" \
16 "1:\t" insn "\n" \
17 "2:\t" ASM_CLAC "\n" \
18 "\t.section .fixup,\"ax\"\n" \
Joe Perches94079132008-03-23 01:02:12 -070019 "3:\tmov\t%3, %1\n" \
20 "\tjmp\t2b\n" \
21 "\t.previous\n" \
22 _ASM_EXTABLE(1b, 3b) \
23 : "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
24 : "i" (-EFAULT), "0" (oparg), "1" (0))
Thomas Gleixner2f18e472008-01-30 13:30:20 +010025
26#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070027 asm volatile("\t" ASM_STAC "\n" \
28 "1:\tmovl %2, %0\n" \
Joe Perches94079132008-03-23 01:02:12 -070029 "\tmovl\t%0, %3\n" \
30 "\t" insn "\n" \
Mathieu Desnoyers1f49a2c2008-08-15 12:45:09 -040031 "2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
Joe Perches94079132008-03-23 01:02:12 -070032 "\tjnz\t1b\n" \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070033 "3:\t" ASM_CLAC "\n" \
34 "\t.section .fixup,\"ax\"\n" \
Joe Perches94079132008-03-23 01:02:12 -070035 "4:\tmov\t%5, %1\n" \
36 "\tjmp\t3b\n" \
37 "\t.previous\n" \
38 _ASM_EXTABLE(1b, 4b) \
39 _ASM_EXTABLE(2b, 4b) \
40 : "=&a" (oldval), "=&r" (ret), \
41 "+m" (*uaddr), "=&r" (tem) \
42 : "r" (oparg), "i" (-EFAULT), "1" (0))
Thomas Gleixner2f18e472008-01-30 13:30:20 +010043
Jiri Slaby81da9f82017-08-24 09:31:05 +020044static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
45 u32 __user *uaddr)
Thomas Gleixner2f18e472008-01-30 13:30:20 +010046{
Thomas Gleixner2f18e472008-01-30 13:30:20 +010047 int oldval = 0, ret, tem;
48
Thomas Gleixner2f18e472008-01-30 13:30:20 +010049 pagefault_disable();
50
51 switch (op) {
52 case FUTEX_OP_SET:
53 __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
54 break;
55 case FUTEX_OP_ADD:
Mathieu Desnoyers1f49a2c2008-08-15 12:45:09 -040056 __futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval,
Thomas Gleixner2f18e472008-01-30 13:30:20 +010057 uaddr, oparg);
58 break;
59 case FUTEX_OP_OR:
60 __futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg);
61 break;
62 case FUTEX_OP_ANDN:
63 __futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg);
64 break;
65 case FUTEX_OP_XOR:
66 __futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg);
67 break;
68 default:
69 ret = -ENOSYS;
70 }
71
72 pagefault_enable();
73
Jiri Slaby81da9f82017-08-24 09:31:05 +020074 if (!ret)
75 *oval = oldval;
76
Thomas Gleixner2f18e472008-01-30 13:30:20 +010077 return ret;
78}
79
Michel Lespinasse8d7718a2011-03-10 18:50:58 -080080static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
81 u32 oldval, u32 newval)
Thomas Gleixner2f18e472008-01-30 13:30:20 +010082{
Qiaowei Ren0ee3b6f2013-12-14 14:25:03 +080083 return user_atomic_cmpxchg_inatomic(uval, uaddr, oldval, newval);
Thomas Gleixner2f18e472008-01-30 13:30:20 +010084}
85
86#endif
H. Peter Anvin1965aae2008-10-22 22:26:29 -070087#endif /* _ASM_X86_FUTEX_H */