H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_FUTEX_H |
| 2 | #define _ASM_X86_FUTEX_H |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 3 | |
| 4 | #ifdef __KERNEL__ |
| 5 | |
| 6 | #include <linux/futex.h> |
Jeff Dike | 730f412 | 2008-04-30 00:54:49 -0700 | [diff] [blame] | 7 | #include <linux/uaccess.h> |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 8 | |
| 9 | #include <asm/asm.h> |
| 10 | #include <asm/errno.h> |
| 11 | #include <asm/processor.h> |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 12 | #include <asm/smap.h> |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 13 | |
| 14 | #define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \ |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 15 | asm volatile("\t" ASM_STAC "\n" \ |
| 16 | "1:\t" insn "\n" \ |
| 17 | "2:\t" ASM_CLAC "\n" \ |
| 18 | "\t.section .fixup,\"ax\"\n" \ |
Joe Perches | 9407913 | 2008-03-23 01:02:12 -0700 | [diff] [blame] | 19 | "3:\tmov\t%3, %1\n" \ |
| 20 | "\tjmp\t2b\n" \ |
| 21 | "\t.previous\n" \ |
| 22 | _ASM_EXTABLE(1b, 3b) \ |
| 23 | : "=r" (oldval), "=r" (ret), "+m" (*uaddr) \ |
| 24 | : "i" (-EFAULT), "0" (oparg), "1" (0)) |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 25 | |
| 26 | #define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \ |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 27 | asm volatile("\t" ASM_STAC "\n" \ |
| 28 | "1:\tmovl %2, %0\n" \ |
Joe Perches | 9407913 | 2008-03-23 01:02:12 -0700 | [diff] [blame] | 29 | "\tmovl\t%0, %3\n" \ |
| 30 | "\t" insn "\n" \ |
Mathieu Desnoyers | 1f49a2c | 2008-08-15 12:45:09 -0400 | [diff] [blame] | 31 | "2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \ |
Joe Perches | 9407913 | 2008-03-23 01:02:12 -0700 | [diff] [blame] | 32 | "\tjnz\t1b\n" \ |
H. Peter Anvin | 63bcff2 | 2012-09-21 12:43:12 -0700 | [diff] [blame] | 33 | "3:\t" ASM_CLAC "\n" \ |
| 34 | "\t.section .fixup,\"ax\"\n" \ |
Joe Perches | 9407913 | 2008-03-23 01:02:12 -0700 | [diff] [blame] | 35 | "4:\tmov\t%5, %1\n" \ |
| 36 | "\tjmp\t3b\n" \ |
| 37 | "\t.previous\n" \ |
| 38 | _ASM_EXTABLE(1b, 4b) \ |
| 39 | _ASM_EXTABLE(2b, 4b) \ |
| 40 | : "=&a" (oldval), "=&r" (ret), \ |
| 41 | "+m" (*uaddr), "=&r" (tem) \ |
| 42 | : "r" (oparg), "i" (-EFAULT), "1" (0)) |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 43 | |
Jiri Slaby | 81da9f8 | 2017-08-24 09:31:05 +0200 | [diff] [blame] | 44 | static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, |
| 45 | u32 __user *uaddr) |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 46 | { |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 47 | int oldval = 0, ret, tem; |
| 48 | |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 49 | pagefault_disable(); |
| 50 | |
| 51 | switch (op) { |
| 52 | case FUTEX_OP_SET: |
| 53 | __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg); |
| 54 | break; |
| 55 | case FUTEX_OP_ADD: |
Mathieu Desnoyers | 1f49a2c | 2008-08-15 12:45:09 -0400 | [diff] [blame] | 56 | __futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval, |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 57 | uaddr, oparg); |
| 58 | break; |
| 59 | case FUTEX_OP_OR: |
| 60 | __futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg); |
| 61 | break; |
| 62 | case FUTEX_OP_ANDN: |
| 63 | __futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg); |
| 64 | break; |
| 65 | case FUTEX_OP_XOR: |
| 66 | __futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg); |
| 67 | break; |
| 68 | default: |
| 69 | ret = -ENOSYS; |
| 70 | } |
| 71 | |
| 72 | pagefault_enable(); |
| 73 | |
Jiri Slaby | 81da9f8 | 2017-08-24 09:31:05 +0200 | [diff] [blame] | 74 | if (!ret) |
| 75 | *oval = oldval; |
| 76 | |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 77 | return ret; |
| 78 | } |
| 79 | |
Michel Lespinasse | 8d7718a | 2011-03-10 18:50:58 -0800 | [diff] [blame] | 80 | static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, |
| 81 | u32 oldval, u32 newval) |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 82 | { |
Qiaowei Ren | 0ee3b6f | 2013-12-14 14:25:03 +0800 | [diff] [blame] | 83 | return user_atomic_cmpxchg_inatomic(uval, uaddr, oldval, newval); |
Thomas Gleixner | 2f18e47 | 2008-01-30 13:30:20 +0100 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | #endif |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 87 | #endif /* _ASM_X86_FUTEX_H */ |