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William Breathitt Gray1b06d64f2016-01-20 13:50:11 -05001/*
William Breathitt Gray4c23db02016-05-01 18:44:39 -04002 * GPIO driver for the ACCES 104-DIO-48E series
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -05003 * Copyright (C) 2016 William Breathitt Gray
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
William Breathitt Gray4c23db02016-05-01 18:44:39 -040013 *
14 * This driver supports the following ACCES devices: 104-DIO-48E and
15 * 104-DIO-24E.
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050016 */
17#include <linux/bitops.h>
18#include <linux/device.h>
19#include <linux/errno.h>
20#include <linux/gpio/driver.h>
21#include <linux/io.h>
22#include <linux/ioport.h>
23#include <linux/interrupt.h>
24#include <linux/irqdesc.h>
William Breathitt Gray4c23db02016-05-01 18:44:39 -040025#include <linux/isa.h>
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050026#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/moduleparam.h>
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050029#include <linux/spinlock.h>
30
William Breathitt Gray4c23db02016-05-01 18:44:39 -040031#define DIO48E_EXTENT 16
32#define MAX_NUM_DIO48E max_num_isa_dev(DIO48E_EXTENT)
33
34static unsigned int base[MAX_NUM_DIO48E];
35static unsigned int num_dio48e;
36module_param_array(base, uint, &num_dio48e, 0);
37MODULE_PARM_DESC(base, "ACCES 104-DIO-48E base addresses");
38
39static unsigned int irq[MAX_NUM_DIO48E];
40module_param_array(irq, uint, NULL, 0);
41MODULE_PARM_DESC(irq, "ACCES 104-DIO-48E interrupt line numbers");
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050042
43/**
44 * struct dio48e_gpio - GPIO device private data structure
45 * @chip: instance of the gpio_chip
46 * @io_state: bit I/O state (whether bit is set to input or output)
47 * @out_state: output bits state
48 * @control: Control registers state
49 * @lock: synchronization lock to prevent I/O race conditions
50 * @base: base port address of the GPIO device
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050051 * @irq: Interrupt line number
52 * @irq_mask: I/O bits affected by interrupts
53 */
54struct dio48e_gpio {
55 struct gpio_chip chip;
56 unsigned char io_state[6];
57 unsigned char out_state[6];
58 unsigned char control[2];
59 spinlock_t lock;
60 unsigned base;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050061 unsigned irq;
62 unsigned char irq_mask;
63};
64
65static int dio48e_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
66{
67 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
68 const unsigned port = offset / 8;
69 const unsigned mask = BIT(offset % 8);
70
71 return !!(dio48egpio->io_state[port] & mask);
72}
73
74static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
75{
76 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
77 const unsigned io_port = offset / 8;
William Breathitt Grayd15d6cf2016-06-02 16:00:09 -040078 const unsigned int control_port = io_port / 3;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -050079 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
80 unsigned long flags;
81 unsigned control;
82
83 spin_lock_irqsave(&dio48egpio->lock, flags);
84
85 /* Check if configuring Port C */
86 if (io_port == 2 || io_port == 5) {
87 /* Port C can be configured by nibble */
88 if (offset % 8 > 3) {
89 dio48egpio->io_state[io_port] |= 0xF0;
90 dio48egpio->control[control_port] |= BIT(3);
91 } else {
92 dio48egpio->io_state[io_port] |= 0x0F;
93 dio48egpio->control[control_port] |= BIT(0);
94 }
95 } else {
96 dio48egpio->io_state[io_port] |= 0xFF;
97 if (io_port == 0 || io_port == 3)
98 dio48egpio->control[control_port] |= BIT(4);
99 else
100 dio48egpio->control[control_port] |= BIT(1);
101 }
102
103 control = BIT(7) | dio48egpio->control[control_port];
104 outb(control, control_addr);
105 control &= ~BIT(7);
106 outb(control, control_addr);
107
108 spin_unlock_irqrestore(&dio48egpio->lock, flags);
109
110 return 0;
111}
112
113static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
114 int value)
115{
116 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
117 const unsigned io_port = offset / 8;
William Breathitt Grayd15d6cf2016-06-02 16:00:09 -0400118 const unsigned int control_port = io_port / 3;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500119 const unsigned mask = BIT(offset % 8);
120 const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
121 const unsigned out_port = (io_port > 2) ? io_port + 1 : io_port;
122 unsigned long flags;
123 unsigned control;
124
125 spin_lock_irqsave(&dio48egpio->lock, flags);
126
127 /* Check if configuring Port C */
128 if (io_port == 2 || io_port == 5) {
129 /* Port C can be configured by nibble */
130 if (offset % 8 > 3) {
131 dio48egpio->io_state[io_port] &= 0x0F;
132 dio48egpio->control[control_port] &= ~BIT(3);
133 } else {
134 dio48egpio->io_state[io_port] &= 0xF0;
135 dio48egpio->control[control_port] &= ~BIT(0);
136 }
137 } else {
138 dio48egpio->io_state[io_port] &= 0x00;
139 if (io_port == 0 || io_port == 3)
140 dio48egpio->control[control_port] &= ~BIT(4);
141 else
142 dio48egpio->control[control_port] &= ~BIT(1);
143 }
144
145 if (value)
146 dio48egpio->out_state[io_port] |= mask;
147 else
148 dio48egpio->out_state[io_port] &= ~mask;
149
150 control = BIT(7) | dio48egpio->control[control_port];
151 outb(control, control_addr);
152
153 outb(dio48egpio->out_state[io_port], dio48egpio->base + out_port);
154
155 control &= ~BIT(7);
156 outb(control, control_addr);
157
158 spin_unlock_irqrestore(&dio48egpio->lock, flags);
159
160 return 0;
161}
162
163static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset)
164{
165 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
166 const unsigned port = offset / 8;
167 const unsigned mask = BIT(offset % 8);
168 const unsigned in_port = (port > 2) ? port + 1 : port;
169 unsigned long flags;
170 unsigned port_state;
171
172 spin_lock_irqsave(&dio48egpio->lock, flags);
173
174 /* ensure that GPIO is set for input */
175 if (!(dio48egpio->io_state[port] & mask)) {
176 spin_unlock_irqrestore(&dio48egpio->lock, flags);
177 return -EINVAL;
178 }
179
180 port_state = inb(dio48egpio->base + in_port);
181
182 spin_unlock_irqrestore(&dio48egpio->lock, flags);
183
184 return !!(port_state & mask);
185}
186
187static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
188{
189 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
190 const unsigned port = offset / 8;
191 const unsigned mask = BIT(offset % 8);
192 const unsigned out_port = (port > 2) ? port + 1 : port;
193 unsigned long flags;
194
195 spin_lock_irqsave(&dio48egpio->lock, flags);
196
197 if (value)
198 dio48egpio->out_state[port] |= mask;
199 else
200 dio48egpio->out_state[port] &= ~mask;
201
202 outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
203
204 spin_unlock_irqrestore(&dio48egpio->lock, flags);
205}
206
207static void dio48e_irq_ack(struct irq_data *data)
208{
209}
210
211static void dio48e_irq_mask(struct irq_data *data)
212{
213 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
214 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
215 const unsigned long offset = irqd_to_hwirq(data);
216 unsigned long flags;
217
218 /* only bit 3 on each respective Port C supports interrupts */
219 if (offset != 19 && offset != 43)
220 return;
221
222 spin_lock_irqsave(&dio48egpio->lock, flags);
223
224 if (offset == 19)
225 dio48egpio->irq_mask &= ~BIT(0);
226 else
227 dio48egpio->irq_mask &= ~BIT(1);
228
229 if (!dio48egpio->irq_mask)
230 /* disable interrupts */
231 inb(dio48egpio->base + 0xB);
232
233 spin_unlock_irqrestore(&dio48egpio->lock, flags);
234}
235
236static void dio48e_irq_unmask(struct irq_data *data)
237{
238 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
239 struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
240 const unsigned long offset = irqd_to_hwirq(data);
241 unsigned long flags;
242
243 /* only bit 3 on each respective Port C supports interrupts */
244 if (offset != 19 && offset != 43)
245 return;
246
247 spin_lock_irqsave(&dio48egpio->lock, flags);
248
249 if (!dio48egpio->irq_mask) {
250 /* enable interrupts */
251 outb(0x00, dio48egpio->base + 0xF);
252 outb(0x00, dio48egpio->base + 0xB);
253 }
254
255 if (offset == 19)
256 dio48egpio->irq_mask |= BIT(0);
257 else
258 dio48egpio->irq_mask |= BIT(1);
259
260 spin_unlock_irqrestore(&dio48egpio->lock, flags);
261}
262
263static int dio48e_irq_set_type(struct irq_data *data, unsigned flow_type)
264{
265 const unsigned long offset = irqd_to_hwirq(data);
266
267 /* only bit 3 on each respective Port C supports interrupts */
268 if (offset != 19 && offset != 43)
269 return -EINVAL;
270
271 if (flow_type != IRQ_TYPE_NONE && flow_type != IRQ_TYPE_EDGE_RISING)
272 return -EINVAL;
273
274 return 0;
275}
276
277static struct irq_chip dio48e_irqchip = {
278 .name = "104-dio-48e",
279 .irq_ack = dio48e_irq_ack,
280 .irq_mask = dio48e_irq_mask,
281 .irq_unmask = dio48e_irq_unmask,
282 .irq_set_type = dio48e_irq_set_type
283};
284
285static irqreturn_t dio48e_irq_handler(int irq, void *dev_id)
286{
287 struct dio48e_gpio *const dio48egpio = dev_id;
288 struct gpio_chip *const chip = &dio48egpio->chip;
289 const unsigned long irq_mask = dio48egpio->irq_mask;
290 unsigned long gpio;
291
292 for_each_set_bit(gpio, &irq_mask, 2)
293 generic_handle_irq(irq_find_mapping(chip->irqdomain,
294 19 + gpio*24));
295
296 spin_lock(&dio48egpio->lock);
297
298 outb(0x00, dio48egpio->base + 0xF);
299
300 spin_unlock(&dio48egpio->lock);
301
302 return IRQ_HANDLED;
303}
304
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400305static int dio48e_probe(struct device *dev, unsigned int id)
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500306{
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500307 struct dio48e_gpio *dio48egpio;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500308 const char *const name = dev_name(dev);
309 int err;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500310
311 dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
312 if (!dio48egpio)
313 return -ENOMEM;
314
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400315 if (!devm_request_region(dev, base[id], DIO48E_EXTENT, name)) {
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500316 dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400317 base[id], base[id] + DIO48E_EXTENT);
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500318 return -EBUSY;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500319 }
320
321 dio48egpio->chip.label = name;
322 dio48egpio->chip.parent = dev;
323 dio48egpio->chip.owner = THIS_MODULE;
324 dio48egpio->chip.base = -1;
325 dio48egpio->chip.ngpio = 48;
326 dio48egpio->chip.get_direction = dio48e_gpio_get_direction;
327 dio48egpio->chip.direction_input = dio48e_gpio_direction_input;
328 dio48egpio->chip.direction_output = dio48e_gpio_direction_output;
329 dio48egpio->chip.get = dio48e_gpio_get;
330 dio48egpio->chip.set = dio48e_gpio_set;
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400331 dio48egpio->base = base[id];
332 dio48egpio->irq = irq[id];
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500333
334 spin_lock_init(&dio48egpio->lock);
335
336 dev_set_drvdata(dev, dio48egpio);
337
338 err = gpiochip_add_data(&dio48egpio->chip, dio48egpio);
339 if (err) {
340 dev_err(dev, "GPIO registering failed (%d)\n", err);
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500341 return err;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500342 }
343
344 /* initialize all GPIO as output */
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400345 outb(0x80, base[id] + 3);
346 outb(0x00, base[id]);
347 outb(0x00, base[id] + 1);
348 outb(0x00, base[id] + 2);
349 outb(0x00, base[id] + 3);
350 outb(0x80, base[id] + 7);
351 outb(0x00, base[id] + 4);
352 outb(0x00, base[id] + 5);
353 outb(0x00, base[id] + 6);
354 outb(0x00, base[id] + 7);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500355
356 /* disable IRQ by default */
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400357 inb(base[id] + 0xB);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500358
359 err = gpiochip_irqchip_add(&dio48egpio->chip, &dio48e_irqchip, 0,
360 handle_edge_irq, IRQ_TYPE_NONE);
361 if (err) {
362 dev_err(dev, "Could not add irqchip (%d)\n", err);
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500363 goto err_gpiochip_remove;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500364 }
365
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400366 err = request_irq(irq[id], dio48e_irq_handler, 0, name, dio48egpio);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500367 if (err) {
368 dev_err(dev, "IRQ handler registering failed (%d)\n", err);
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500369 goto err_gpiochip_remove;
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500370 }
371
372 return 0;
373
William Breathitt Grayaa6c3602016-02-03 15:15:21 -0500374err_gpiochip_remove:
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500375 gpiochip_remove(&dio48egpio->chip);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500376 return err;
377}
378
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400379static int dio48e_remove(struct device *dev, unsigned int id)
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500380{
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400381 struct dio48e_gpio *const dio48egpio = dev_get_drvdata(dev);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500382
383 free_irq(dio48egpio->irq, dio48egpio);
384 gpiochip_remove(&dio48egpio->chip);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500385
386 return 0;
387}
388
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400389static struct isa_driver dio48e_driver = {
390 .probe = dio48e_probe,
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500391 .driver = {
392 .name = "104-dio-48e"
393 },
394 .remove = dio48e_remove
395};
William Breathitt Gray4c23db02016-05-01 18:44:39 -0400396module_isa_driver(dio48e_driver, num_dio48e);
William Breathitt Gray1b06d64f2016-01-20 13:50:11 -0500397
398MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
399MODULE_DESCRIPTION("ACCES 104-DIO-48E GPIO driver");
William Breathitt Gray22aeddb2016-02-01 18:51:49 -0500400MODULE_LICENSE("GPL v2");