Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Broadcom Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation version 2. |
| 7 | * |
| 8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 9 | * kind, whether express or implied; without even the implied warranty |
| 10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * iProc SDHCI platform driver |
| 16 | */ |
| 17 | |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/mmc/host.h> |
| 21 | #include <linux/of.h> |
| 22 | #include <linux/of_device.h> |
| 23 | #include "sdhci-pltfm.h" |
| 24 | |
| 25 | struct sdhci_iproc_data { |
| 26 | const struct sdhci_pltfm_data *pdata; |
| 27 | u32 caps; |
| 28 | u32 caps1; |
Stefan Wahren | b17b4ab | 2016-01-27 22:25:40 +0000 | [diff] [blame] | 29 | u32 mmc_caps; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 30 | }; |
| 31 | |
| 32 | struct sdhci_iproc_host { |
| 33 | const struct sdhci_iproc_data *data; |
| 34 | u32 shadow_cmd; |
| 35 | u32 shadow_blk; |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 36 | bool is_cmd_shadowed; |
| 37 | bool is_blk_shadowed; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 38 | }; |
| 39 | |
| 40 | #define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18) |
| 41 | |
| 42 | static inline u32 sdhci_iproc_readl(struct sdhci_host *host, int reg) |
| 43 | { |
| 44 | u32 val = readl(host->ioaddr + reg); |
| 45 | |
| 46 | pr_debug("%s: readl [0x%02x] 0x%08x\n", |
| 47 | mmc_hostname(host->mmc), reg, val); |
| 48 | return val; |
| 49 | } |
| 50 | |
| 51 | static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg) |
| 52 | { |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 53 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 54 | struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host); |
| 55 | u32 val; |
| 56 | u16 word; |
| 57 | |
| 58 | if ((reg == SDHCI_TRANSFER_MODE) && iproc_host->is_cmd_shadowed) { |
| 59 | /* Get the saved transfer mode */ |
| 60 | val = iproc_host->shadow_cmd; |
| 61 | } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && |
| 62 | iproc_host->is_blk_shadowed) { |
| 63 | /* Get the saved block info */ |
| 64 | val = iproc_host->shadow_blk; |
| 65 | } else { |
| 66 | val = sdhci_iproc_readl(host, (reg & ~3)); |
| 67 | } |
| 68 | word = val >> REG_OFFSET_IN_BITS(reg) & 0xffff; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 69 | return word; |
| 70 | } |
| 71 | |
| 72 | static u8 sdhci_iproc_readb(struct sdhci_host *host, int reg) |
| 73 | { |
| 74 | u32 val = sdhci_iproc_readl(host, (reg & ~3)); |
| 75 | u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff; |
| 76 | return byte; |
| 77 | } |
| 78 | |
| 79 | static inline void sdhci_iproc_writel(struct sdhci_host *host, u32 val, int reg) |
| 80 | { |
| 81 | pr_debug("%s: writel [0x%02x] 0x%08x\n", |
| 82 | mmc_hostname(host->mmc), reg, val); |
| 83 | |
| 84 | writel(val, host->ioaddr + reg); |
| 85 | |
| 86 | if (host->clock <= 400000) { |
| 87 | /* Round up to micro-second four SD clock delay */ |
| 88 | if (host->clock) |
| 89 | udelay((4 * 1000000 + host->clock - 1) / host->clock); |
| 90 | else |
| 91 | udelay(10); |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | /* |
| 96 | * The Arasan has a bugette whereby it may lose the content of successive |
| 97 | * writes to the same register that are within two SD-card clock cycles of |
| 98 | * each other (a clock domain crossing problem). The data |
| 99 | * register does not have this problem, which is just as well - otherwise we'd |
| 100 | * have to nobble the DMA engine too. |
| 101 | * |
| 102 | * This wouldn't be a problem with the code except that we can only write the |
| 103 | * controller with 32-bit writes. So two different 16-bit registers are |
| 104 | * written back to back creates the problem. |
| 105 | * |
| 106 | * In reality, this only happens when SDHCI_BLOCK_SIZE and SDHCI_BLOCK_COUNT |
| 107 | * are written followed by SDHCI_TRANSFER_MODE and SDHCI_COMMAND. |
| 108 | * The BLOCK_SIZE and BLOCK_COUNT are meaningless until a command issued so |
| 109 | * the work around can be further optimized. We can keep shadow values of |
| 110 | * BLOCK_SIZE, BLOCK_COUNT, and TRANSFER_MODE until a COMMAND is issued. |
| 111 | * Then, write the BLOCK_SIZE+BLOCK_COUNT in a single 32-bit write followed |
| 112 | * by the TRANSFER+COMMAND in another 32-bit write. |
| 113 | */ |
| 114 | static void sdhci_iproc_writew(struct sdhci_host *host, u16 val, int reg) |
| 115 | { |
| 116 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
Dmitry Torokhov | b1ddaa3 | 2015-03-12 18:11:01 -0700 | [diff] [blame] | 117 | struct sdhci_iproc_host *iproc_host = sdhci_pltfm_priv(pltfm_host); |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 118 | u32 word_shift = REG_OFFSET_IN_BITS(reg); |
| 119 | u32 mask = 0xffff << word_shift; |
| 120 | u32 oldval, newval; |
| 121 | |
| 122 | if (reg == SDHCI_COMMAND) { |
| 123 | /* Write the block now as we are issuing a command */ |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 124 | if (iproc_host->is_blk_shadowed) { |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 125 | sdhci_iproc_writel(host, iproc_host->shadow_blk, |
| 126 | SDHCI_BLOCK_SIZE); |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 127 | iproc_host->is_blk_shadowed = false; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 128 | } |
| 129 | oldval = iproc_host->shadow_cmd; |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 130 | iproc_host->is_cmd_shadowed = false; |
| 131 | } else if ((reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) && |
| 132 | iproc_host->is_blk_shadowed) { |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 133 | /* Block size and count are stored in shadow reg */ |
| 134 | oldval = iproc_host->shadow_blk; |
| 135 | } else { |
| 136 | /* Read reg, all other registers are not shadowed */ |
| 137 | oldval = sdhci_iproc_readl(host, (reg & ~3)); |
| 138 | } |
| 139 | newval = (oldval & ~mask) | (val << word_shift); |
| 140 | |
| 141 | if (reg == SDHCI_TRANSFER_MODE) { |
| 142 | /* Save the transfer mode until the command is issued */ |
| 143 | iproc_host->shadow_cmd = newval; |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 144 | iproc_host->is_cmd_shadowed = true; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 145 | } else if (reg == SDHCI_BLOCK_SIZE || reg == SDHCI_BLOCK_COUNT) { |
| 146 | /* Save the block info until the command is issued */ |
| 147 | iproc_host->shadow_blk = newval; |
Corneliu Doban | 352f437 | 2018-05-18 15:03:56 -0700 | [diff] [blame] | 148 | iproc_host->is_blk_shadowed = true; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 149 | } else { |
| 150 | /* Command or other regular 32-bit write */ |
| 151 | sdhci_iproc_writel(host, newval, reg & ~3); |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg) |
| 156 | { |
| 157 | u32 oldval = sdhci_iproc_readl(host, (reg & ~3)); |
| 158 | u32 byte_shift = REG_OFFSET_IN_BITS(reg); |
| 159 | u32 mask = 0xff << byte_shift; |
| 160 | u32 newval = (oldval & ~mask) | (val << byte_shift); |
| 161 | |
| 162 | sdhci_iproc_writel(host, newval, reg & ~3); |
| 163 | } |
| 164 | |
| 165 | static const struct sdhci_ops sdhci_iproc_ops = { |
| 166 | .read_l = sdhci_iproc_readl, |
| 167 | .read_w = sdhci_iproc_readw, |
| 168 | .read_b = sdhci_iproc_readb, |
| 169 | .write_l = sdhci_iproc_writel, |
| 170 | .write_w = sdhci_iproc_writew, |
| 171 | .write_b = sdhci_iproc_writeb, |
| 172 | .set_clock = sdhci_set_clock, |
| 173 | .get_max_clock = sdhci_pltfm_clk_get_max_clock, |
| 174 | .set_bus_width = sdhci_set_bus_width, |
| 175 | .reset = sdhci_reset, |
| 176 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
| 177 | }; |
| 178 | |
| 179 | static const struct sdhci_pltfm_data sdhci_iproc_pltfm_data = { |
Srinath Mannam | ecbf0f4 | 2017-05-18 22:27:40 +0530 | [diff] [blame] | 180 | .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | |
| 181 | SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 182 | .quirks2 = SDHCI_QUIRK2_ACMD23_BROKEN, |
| 183 | .ops = &sdhci_iproc_ops, |
| 184 | }; |
| 185 | |
| 186 | static const struct sdhci_iproc_data iproc_data = { |
| 187 | .pdata = &sdhci_iproc_pltfm_data, |
Stefan Wahren | 1883edd | 2016-07-02 19:23:14 +0000 | [diff] [blame] | 188 | .caps = ((0x1 << SDHCI_MAX_BLOCK_SHIFT) |
| 189 | & SDHCI_MAX_BLOCK_MASK) | |
| 190 | SDHCI_CAN_VDD_330 | |
| 191 | SDHCI_CAN_VDD_180 | |
| 192 | SDHCI_CAN_DO_SUSPEND | |
| 193 | SDHCI_CAN_DO_HISPD | |
| 194 | SDHCI_CAN_DO_ADMA2 | |
| 195 | SDHCI_CAN_DO_SDMA, |
| 196 | .caps1 = SDHCI_DRIVER_TYPE_C | |
| 197 | SDHCI_DRIVER_TYPE_D | |
| 198 | SDHCI_SUPPORT_DDR50, |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 199 | }; |
| 200 | |
Stefan Wahren | 77cb7d3 | 2016-01-27 22:25:41 +0000 | [diff] [blame] | 201 | static const struct sdhci_pltfm_data sdhci_bcm2835_pltfm_data = { |
| 202 | .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | |
| 203 | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | |
| 204 | SDHCI_QUIRK_MISSING_CAPS, |
| 205 | .ops = &sdhci_iproc_ops, |
| 206 | }; |
| 207 | |
| 208 | static const struct sdhci_iproc_data bcm2835_data = { |
| 209 | .pdata = &sdhci_bcm2835_pltfm_data, |
| 210 | .caps = SDHCI_CAN_VDD_330, |
| 211 | .caps1 = 0x00000000, |
| 212 | .mmc_caps = 0x00000000, |
| 213 | }; |
| 214 | |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 215 | static const struct of_device_id sdhci_iproc_of_match[] = { |
Stefan Wahren | 77cb7d3 | 2016-01-27 22:25:41 +0000 | [diff] [blame] | 216 | { .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data }, |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 217 | { .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_data }, |
| 218 | { } |
| 219 | }; |
| 220 | MODULE_DEVICE_TABLE(of, sdhci_iproc_of_match); |
| 221 | |
| 222 | static int sdhci_iproc_probe(struct platform_device *pdev) |
| 223 | { |
| 224 | const struct of_device_id *match; |
| 225 | const struct sdhci_iproc_data *iproc_data; |
| 226 | struct sdhci_host *host; |
| 227 | struct sdhci_iproc_host *iproc_host; |
| 228 | struct sdhci_pltfm_host *pltfm_host; |
| 229 | int ret; |
| 230 | |
| 231 | match = of_match_device(sdhci_iproc_of_match, &pdev->dev); |
| 232 | if (!match) |
| 233 | return -EINVAL; |
| 234 | iproc_data = match->data; |
| 235 | |
| 236 | host = sdhci_pltfm_init(pdev, iproc_data->pdata, sizeof(*iproc_host)); |
| 237 | if (IS_ERR(host)) |
| 238 | return PTR_ERR(host); |
| 239 | |
| 240 | pltfm_host = sdhci_priv(host); |
| 241 | iproc_host = sdhci_pltfm_priv(pltfm_host); |
| 242 | |
| 243 | iproc_host->data = iproc_data; |
| 244 | |
Stefan Wahren | 686ef45 | 2018-12-23 21:59:17 +0100 | [diff] [blame] | 245 | ret = mmc_of_parse(host->mmc); |
| 246 | if (ret) |
| 247 | goto err; |
| 248 | |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 249 | sdhci_get_of_property(pdev); |
| 250 | |
Stefan Wahren | b17b4ab | 2016-01-27 22:25:40 +0000 | [diff] [blame] | 251 | host->mmc->caps |= iproc_host->data->mmc_caps; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 252 | |
| 253 | pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); |
| 254 | if (IS_ERR(pltfm_host->clk)) { |
| 255 | ret = PTR_ERR(pltfm_host->clk); |
| 256 | goto err; |
| 257 | } |
Stefan Wahren | 9f24b0f | 2016-01-17 14:59:01 +0000 | [diff] [blame] | 258 | ret = clk_prepare_enable(pltfm_host->clk); |
| 259 | if (ret) { |
| 260 | dev_err(&pdev->dev, "failed to enable host clk\n"); |
| 261 | goto err; |
| 262 | } |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 263 | |
| 264 | if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) { |
| 265 | host->caps = iproc_host->data->caps; |
| 266 | host->caps1 = iproc_host->data->caps1; |
| 267 | } |
| 268 | |
Stefan Wahren | 1d6ad05 | 2016-01-17 14:59:00 +0000 | [diff] [blame] | 269 | ret = sdhci_add_host(host); |
| 270 | if (ret) |
Stefan Wahren | 9f24b0f | 2016-01-17 14:59:01 +0000 | [diff] [blame] | 271 | goto err_clk; |
Stefan Wahren | 1d6ad05 | 2016-01-17 14:59:00 +0000 | [diff] [blame] | 272 | |
| 273 | return 0; |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 274 | |
Stefan Wahren | 9f24b0f | 2016-01-17 14:59:01 +0000 | [diff] [blame] | 275 | err_clk: |
| 276 | clk_disable_unprepare(pltfm_host->clk); |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 277 | err: |
| 278 | sdhci_pltfm_free(pdev); |
| 279 | return ret; |
| 280 | } |
| 281 | |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 282 | static struct platform_driver sdhci_iproc_driver = { |
| 283 | .driver = { |
| 284 | .name = "sdhci-iproc", |
| 285 | .of_match_table = sdhci_iproc_of_match, |
Ulf Hansson | fa243f6 | 2016-07-27 13:07:21 +0200 | [diff] [blame] | 286 | .pm = &sdhci_pltfm_pmops, |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 287 | }, |
| 288 | .probe = sdhci_iproc_probe, |
Jisheng Zhang | d1a13c5 | 2016-01-26 18:26:03 +0800 | [diff] [blame] | 289 | .remove = sdhci_pltfm_unregister, |
Scott Branden | b580c52 | 2015-02-09 16:06:30 -0800 | [diff] [blame] | 290 | }; |
| 291 | module_platform_driver(sdhci_iproc_driver); |
| 292 | |
| 293 | MODULE_AUTHOR("Broadcom"); |
| 294 | MODULE_DESCRIPTION("IPROC SDHCI driver"); |
| 295 | MODULE_LICENSE("GPL v2"); |