Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 1 | /* |
Gavin Thomas Claugus | 64b389c | 2015-12-10 21:35:35 -0500 | [diff] [blame] | 2 | * This is part of the rtl8192 driver |
| 3 | * released under the GPL (See file COPYING for details). |
| 4 | * |
| 5 | * This files contains programming code for the rtl8256 |
| 6 | * radio frontend. |
| 7 | * |
| 8 | * *Many* thanks to Realtek Corp. for their great support! |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include "r8192U.h" |
| 12 | #include "r8192U_hw.h" |
| 13 | #include "r819xU_phyreg.h" |
| 14 | #include "r819xU_phy.h" |
| 15 | #include "r8190_rtl8256.h" |
| 16 | |
| 17 | /*-------------------------------------------------------------------------- |
Sebastian Hahn | 35997ff | 2012-12-05 21:40:18 +0100 | [diff] [blame] | 18 | * Overview: set RF band width (20M or 40M) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 19 | * Input: struct net_device* dev |
Sebastian Hahn | 35997ff | 2012-12-05 21:40:18 +0100 | [diff] [blame] | 20 | * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 21 | * Output: NONE |
| 22 | * Return: NONE |
| 23 | * Note: 8226 support both 20M and 40 MHz |
Gavin Thomas Claugus | 64b389c | 2015-12-10 21:35:35 -0500 | [diff] [blame] | 24 | *-------------------------------------------------------------------------- |
| 25 | */ |
Mohammad Jamal | 683a686 | 2014-12-16 21:57:44 +0530 | [diff] [blame] | 26 | void PHY_SetRF8256Bandwidth(struct net_device *dev, HT_CHANNEL_WIDTH Bandwidth) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 27 | { |
| 28 | u8 eRFPath; |
| 29 | struct r8192_priv *priv = ieee80211_priv(dev); |
| 30 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 31 | /* for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; |
| 32 | * eRFPath++) |
| 33 | */ |
| 34 | for (eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 35 | if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) |
Loïc Pellegrino | a8d0df2 | 2014-04-06 14:03:39 +0100 | [diff] [blame] | 36 | continue; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 37 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 38 | switch (Bandwidth) { |
| 39 | case HT_CHANNEL_WIDTH_20: |
| 40 | if (priv->card_8192_version == VERSION_819xU_A |
| 41 | || priv->card_8192_version |
| 42 | == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ |
| 43 | rtl8192_phy_SetRFReg(dev, |
| 44 | (RF90_RADIO_PATH_E)eRFPath, |
| 45 | 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ |
| 46 | rtl8192_phy_SetRFReg(dev, |
| 47 | (RF90_RADIO_PATH_E)eRFPath, |
| 48 | 0x2c, bMask12Bits, 0x3d7); |
| 49 | rtl8192_phy_SetRFReg(dev, |
| 50 | (RF90_RADIO_PATH_E)eRFPath, |
| 51 | 0x0e, bMask12Bits, 0x021); |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 52 | rtl8192_phy_SetRFReg(dev, |
| 53 | (RF90_RADIO_PATH_E)eRFPath, |
| 54 | 0x14, bMask12Bits, 0x5ab); |
| 55 | } else { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 56 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 57 | } |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 58 | break; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 59 | case HT_CHANNEL_WIDTH_20_40: |
| 60 | if (priv->card_8192_version == VERSION_819xU_A || priv->card_8192_version == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 61 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:3ba */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 62 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3df); |
| 63 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0a1); |
| 64 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 65 | if (priv->chan == 3 || priv->chan == 9) |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 66 | /* I need to set priv->chan whenever current channel changes */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 67 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b); |
| 68 | else |
| 69 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 70 | } else { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 71 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 72 | } |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 73 | break; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 74 | default: |
| 75 | RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n", Bandwidth); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 76 | break; |
| 77 | |
| 78 | } |
| 79 | } |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 80 | } |
| 81 | /*-------------------------------------------------------------------------- |
| 82 | * Overview: Interface to config 8256 |
| 83 | * Input: struct net_device* dev |
| 84 | * Output: NONE |
| 85 | * Return: NONE |
Gavin Thomas Claugus | 64b389c | 2015-12-10 21:35:35 -0500 | [diff] [blame] | 86 | *-------------------------------------------------------------------------- |
| 87 | */ |
Xenia Ragiadakou | 959674e | 2013-05-11 17:22:23 +0300 | [diff] [blame] | 88 | void PHY_RF8256_Config(struct net_device *dev) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 89 | { |
| 90 | struct r8192_priv *priv = ieee80211_priv(dev); |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 91 | /* Initialize general global value |
| 92 | * |
| 93 | * TODO: Extend RF_PATH_C and RF_PATH_D in the future |
| 94 | */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 95 | priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH; |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 96 | /* Config BB and RF */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 97 | phy_RF8256_Config_ParaFile(dev); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 98 | } |
| 99 | /*-------------------------------------------------------------------------- |
| 100 | * Overview: Interface to config 8256 |
| 101 | * Input: struct net_device* dev |
| 102 | * Output: NONE |
| 103 | * Return: NONE |
Gavin Thomas Claugus | 64b389c | 2015-12-10 21:35:35 -0500 | [diff] [blame] | 104 | *-------------------------------------------------------------------------- |
| 105 | */ |
Xenia Ragiadakou | 959674e | 2013-05-11 17:22:23 +0300 | [diff] [blame] | 106 | void phy_RF8256_Config_ParaFile(struct net_device *dev) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 107 | { |
Sebastian Hahn | 35997ff | 2012-12-05 21:40:18 +0100 | [diff] [blame] | 108 | u32 u4RegValue = 0; |
Sebastian Hahn | 35997ff | 2012-12-05 21:40:18 +0100 | [diff] [blame] | 109 | u8 eRFPath; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 110 | BB_REGISTER_DEFINITION_T *pPhyReg; |
| 111 | struct r8192_priv *priv = ieee80211_priv(dev); |
| 112 | u32 RegOffSetToBeCheck = 0x3; |
Sebastian Hahn | 35997ff | 2012-12-05 21:40:18 +0100 | [diff] [blame] | 113 | u32 RegValueToBeCheck = 0x7f1; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 114 | u32 RF3_Final_Value = 0; |
| 115 | u8 ConstRetryTimes = 5, RetryTimes = 5; |
| 116 | u8 ret = 0; |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 117 | /* Initialize RF */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 118 | for (eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath < priv->NumTotalRFPath; eRFPath++) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 119 | if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) |
Loïc Pellegrino | a8d0df2 | 2014-04-06 14:03:39 +0100 | [diff] [blame] | 120 | continue; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 121 | |
| 122 | pPhyReg = &priv->PHYRegDef[eRFPath]; |
| 123 | |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 124 | /* Joseph test for shorten RF config |
| 125 | * pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord); |
| 126 | * ----Store original RFENV control type |
| 127 | */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 128 | switch (eRFPath) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 129 | case RF90_PATH_A: |
| 130 | case RF90_PATH_C: |
| 131 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); |
| 132 | break; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 133 | case RF90_PATH_B: |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 134 | case RF90_PATH_D: |
| 135 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); |
| 136 | break; |
| 137 | } |
| 138 | |
| 139 | /*----Set RF_ENV enable----*/ |
| 140 | rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); |
| 141 | |
| 142 | /*----Set RF_ENV output high----*/ |
| 143 | rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); |
| 144 | |
| 145 | /* Set bit number of Address and Data for RF register */ |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 146 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 */ |
| 147 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 148 | |
| 149 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf); |
| 150 | |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 151 | /* Check RF block (for FPGA platform only)---- |
| 152 | * TODO: this function should be removed on ASIC , Emily 2007.2.2 |
| 153 | */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 154 | if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath)) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 155 | RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); |
| 156 | goto phy_RF8256_Config_ParaFile_Fail; |
| 157 | } |
| 158 | |
| 159 | RetryTimes = ConstRetryTimes; |
| 160 | RF3_Final_Value = 0; |
| 161 | /*----Initialize RF fom connfiguration file----*/ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 162 | switch (eRFPath) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 163 | case RF90_PATH_A: |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 164 | while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { |
| 165 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 166 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); |
| 167 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); |
| 168 | RetryTimes--; |
| 169 | } |
| 170 | break; |
| 171 | case RF90_PATH_B: |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 172 | while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { |
| 173 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 174 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); |
| 175 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); |
| 176 | RetryTimes--; |
| 177 | } |
| 178 | break; |
| 179 | case RF90_PATH_C: |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 180 | while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { |
| 181 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 182 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); |
| 183 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); |
| 184 | RetryTimes--; |
| 185 | } |
| 186 | break; |
| 187 | case RF90_PATH_D: |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 188 | while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { |
| 189 | ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 190 | RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); |
| 191 | RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); |
| 192 | RetryTimes--; |
| 193 | } |
| 194 | break; |
| 195 | } |
| 196 | |
Sandhya Bankar | 46347b3 | 2016-03-18 09:15:45 +0530 | [diff] [blame] | 197 | /*----Restore RFENV control type----*/ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 198 | switch (eRFPath) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 199 | case RF90_PATH_A: |
| 200 | case RF90_PATH_C: |
| 201 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); |
| 202 | break; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 203 | case RF90_PATH_B: |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 204 | case RF90_PATH_D: |
| 205 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); |
| 206 | break; |
| 207 | } |
| 208 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 209 | if (ret) { |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 210 | RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath); |
| 211 | goto phy_RF8256_Config_ParaFile_Fail; |
| 212 | } |
| 213 | |
| 214 | } |
| 215 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 216 | RT_TRACE(COMP_PHY, "PHY Initialization Success\n"); |
| 217 | return; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 218 | |
| 219 | phy_RF8256_Config_ParaFile_Fail: |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 220 | RT_TRACE(COMP_ERR, "PHY Initialization failed\n"); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 221 | } |
| 222 | |
| 223 | |
Xenia Ragiadakou | 959674e | 2013-05-11 17:22:23 +0300 | [diff] [blame] | 224 | void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 225 | { |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 226 | u32 TxAGC = 0; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 227 | struct r8192_priv *priv = ieee80211_priv(dev); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 228 | TxAGC = powerlevel; |
| 229 | |
Ksenija Stanojevic | 72b16fe | 2015-02-24 21:54:08 +0100 | [diff] [blame] | 230 | if (priv->bDynamicTxLowPower) { |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 231 | if (priv->CustomerID == RT_CID_819x_Netcore) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 232 | TxAGC = 0x22; |
| 233 | else |
Loïc Pellegrino | a8d0df2 | 2014-04-06 14:03:39 +0100 | [diff] [blame] | 234 | TxAGC += priv->CckPwEnl; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 235 | } |
| 236 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 237 | if (TxAGC > 0x24) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 238 | TxAGC = 0x24; |
| 239 | rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); |
| 240 | } |
| 241 | |
| 242 | |
Xenia Ragiadakou | 959674e | 2013-05-11 17:22:23 +0300 | [diff] [blame] | 243 | void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 244 | { |
| 245 | struct r8192_priv *priv = ieee80211_priv(dev); |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 246 | /* Joseph TxPower for 8192 testing */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 247 | u32 writeVal, powerBase0, powerBase1, writeVal_tmp; |
| 248 | u8 index = 0; |
| 249 | u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; |
| 250 | u8 byte0, byte1, byte2, byte3; |
| 251 | |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 252 | powerBase0 = powerlevel + priv->TxPowerDiff; /* OFDM rates */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 253 | powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0; |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 254 | powerBase1 = powerlevel; /* MCS rates */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 255 | powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 256 | |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 257 | for (index = 0; index < 6; index++) { |
| 258 | writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index < 2)?powerBase0:powerBase1); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 259 | byte0 = (u8)(writeVal & 0x7f); |
| 260 | byte1 = (u8)((writeVal & 0x7f00)>>8); |
| 261 | byte2 = (u8)((writeVal & 0x7f0000)>>16); |
| 262 | byte3 = (u8)((writeVal & 0x7f000000)>>24); |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 263 | |
| 264 | if (byte0 > 0x24) |
| 265 | /* Max power index = 0x24 */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 266 | byte0 = 0x24; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 267 | if (byte1 > 0x24) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 268 | byte1 = 0x24; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 269 | if (byte2 > 0x24) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 270 | byte2 = 0x24; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 271 | if (byte3 > 0x24) |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 272 | byte3 = 0x24; |
| 273 | |
Sanjeev Sharma | 93a9f05 | 2014-09-09 09:58:48 +0530 | [diff] [blame] | 274 | /* for tx power track */ |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 275 | if (index == 3) { |
| 276 | writeVal_tmp = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0; |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 277 | priv->Pwr_Track = writeVal_tmp; |
| 278 | } |
| 279 | |
Ksenija Stanojevic | 72b16fe | 2015-02-24 21:54:08 +0100 | [diff] [blame] | 280 | if (priv->bDynamicTxHighPower) { |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 281 | /*Add by Jacken 2008/03/06 |
| 282 | *Emily, 20080613. Set low tx power for both MCS and legacy OFDM |
| 283 | */ |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 284 | writeVal = 0x03030303; |
Sanjeev Sharma | 104cb5c | 2014-07-31 11:13:31 +0530 | [diff] [blame] | 285 | } else { |
| 286 | writeVal = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0; |
| 287 | } |
| 288 | rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); |
Jerry Chuang | 8fc8598 | 2009-11-03 07:17:11 -0200 | [diff] [blame] | 289 | } |
| 290 | return; |
| 291 | |
| 292 | } |