| Jing Zhou | 8184f31 | 2017-01-31 14:06:30 -0800 | [diff] [blame] | 1 | #ifndef __UAPI_CAM_ISP_IFE_H__ |
| 2 | #define __UAPI_CAM_ISP_IFE_H__ |
| 3 | |
| 4 | /* IFE output port resource type (global unique)*/ |
| 5 | #define CAM_ISP_IFE_OUT_RES_BASE 0x3000 |
| 6 | |
| 7 | #define CAM_ISP_IFE_OUT_RES_FULL (CAM_ISP_IFE_OUT_RES_BASE + 0) |
| 8 | #define CAM_ISP_IFE_OUT_RES_DS4 (CAM_ISP_IFE_OUT_RES_BASE + 1) |
| 9 | #define CAM_ISP_IFE_OUT_RES_DS16 (CAM_ISP_IFE_OUT_RES_BASE + 2) |
| 10 | #define CAM_ISP_IFE_OUT_RES_RAW_DUMP (CAM_ISP_IFE_OUT_RES_BASE + 3) |
| 11 | #define CAM_ISP_IFE_OUT_RES_FD (CAM_ISP_IFE_OUT_RES_BASE + 4) |
| 12 | #define CAM_ISP_IFE_OUT_RES_PDAF (CAM_ISP_IFE_OUT_RES_BASE + 5) |
| 13 | #define CAM_ISP_IFE_OUT_RES_RDI_0 (CAM_ISP_IFE_OUT_RES_BASE + 6) |
| 14 | #define CAM_ISP_IFE_OUT_RES_RDI_1 (CAM_ISP_IFE_OUT_RES_BASE + 7) |
| 15 | #define CAM_ISP_IFE_OUT_RES_RDI_2 (CAM_ISP_IFE_OUT_RES_BASE + 8) |
| 16 | #define CAM_ISP_IFE_OUT_RES_RDI_3 (CAM_ISP_IFE_OUT_RES_BASE + 9) |
| 17 | #define CAM_ISP_IFE_OUT_RES_STATS_HDR_BE (CAM_ISP_IFE_OUT_RES_BASE + 10) |
| 18 | #define CAM_ISP_IFE_OUT_RES_STATS_HDR_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 11) |
| 19 | #define CAM_ISP_IFE_OUT_RES_STATS_TL_BG (CAM_ISP_IFE_OUT_RES_BASE + 12) |
| 20 | #define CAM_ISP_IFE_OUT_RES_STATS_BF (CAM_ISP_IFE_OUT_RES_BASE + 13) |
| 21 | #define CAM_ISP_IFE_OUT_RES_STATS_AWB_BG (CAM_ISP_IFE_OUT_RES_BASE + 14) |
| 22 | #define CAM_ISP_IFE_OUT_RES_STATS_BHIST (CAM_ISP_IFE_OUT_RES_BASE + 15) |
| 23 | #define CAM_ISP_IFE_OUT_RES_STATS_RS (CAM_ISP_IFE_OUT_RES_BASE + 16) |
| 24 | #define CAM_ISP_IFE_OUT_RES_STATS_CS (CAM_ISP_IFE_OUT_RES_BASE + 17) |
| 25 | #define CAM_ISP_IFE_OUT_RES_STATS_IHIST (CAM_ISP_IFE_OUT_RES_BASE + 18) |
| Raja Mallik | 70d8a93 | 2018-12-13 16:22:43 +0530 | [diff] [blame] | 26 | #define CAM_ISP_IFE_OUT_RES_FULL_DISP (CAM_ISP_IFE_OUT_RES_BASE + 19) |
| 27 | #define CAM_ISP_IFE_OUT_RES_DS4_DISP (CAM_ISP_IFE_OUT_RES_BASE + 20) |
| 28 | #define CAM_ISP_IFE_OUT_RES_DS16_DISP (CAM_ISP_IFE_OUT_RES_BASE + 21) |
| 29 | #define CAM_ISP_IFE_OUT_RES_2PD (CAM_ISP_IFE_OUT_RES_BASE + 22) |
| Raja Mallik | fe46d93 | 2019-02-12 20:34:07 +0530 | [diff] [blame] | 30 | #define CAM_ISP_IFE_OUT_RES_RDI_RD (CAM_ISP_IFE_OUT_RES_BASE + 23) |
| 31 | #define CAM_ISP_IFE_OUT_RES_MAX (CAM_ISP_IFE_OUT_RES_BASE + 24) |
| Jing Zhou | 8184f31 | 2017-01-31 14:06:30 -0800 | [diff] [blame] | 32 | |
| Raja Mallik | 70d8a93 | 2018-12-13 16:22:43 +0530 | [diff] [blame] | 33 | /*IFE input port resource type (global unique) */ |
| Jing Zhou | 8184f31 | 2017-01-31 14:06:30 -0800 | [diff] [blame] | 34 | #define CAM_ISP_IFE_IN_RES_BASE 0x4000 |
| 35 | |
| 36 | #define CAM_ISP_IFE_IN_RES_TPG (CAM_ISP_IFE_IN_RES_BASE + 0) |
| 37 | #define CAM_ISP_IFE_IN_RES_PHY_0 (CAM_ISP_IFE_IN_RES_BASE + 1) |
| 38 | #define CAM_ISP_IFE_IN_RES_PHY_1 (CAM_ISP_IFE_IN_RES_BASE + 2) |
| 39 | #define CAM_ISP_IFE_IN_RES_PHY_2 (CAM_ISP_IFE_IN_RES_BASE + 3) |
| 40 | #define CAM_ISP_IFE_IN_RES_PHY_3 (CAM_ISP_IFE_IN_RES_BASE + 4) |
| Raja Mallik | fe46d93 | 2019-02-12 20:34:07 +0530 | [diff] [blame] | 41 | #define CAM_ISP_IFE_IN_RES_RD (CAM_ISP_IFE_IN_RES_BASE + 5) |
| 42 | #define CAM_ISP_IFE_IN_RES_MAX (CAM_ISP_IFE_IN_RES_BASE + 6) |
| Jing Zhou | 8184f31 | 2017-01-31 14:06:30 -0800 | [diff] [blame] | 43 | |
| 44 | #endif /* __UAPI_CAM_ISP_IFE_H__ */ |