blob: 8f454571e69de77f6556871965d36519bbe490ff [file] [log] [blame]
Pratap Nirujogi6e759912018-01-17 17:51:17 +05301#ifndef __UAPI_MSMB_PPROC_H
2#define __UAPI_MSMB_PPROC_H
3
4#include <linux/videodev2.h>
5#include <linux/types.h>
6#include <media/msmb_generic_buf_mgr.h>
7
8/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
9#define MAX_PLANES VIDEO_MAX_PLANES
10/* PARTIAL_FRAME_STRIPE_COUNT must be even */
11#define PARTIAL_FRAME_STRIPE_COUNT 4
12
13#define MAX_NUM_CPP_STRIPS 8
14#define MSM_CPP_MAX_NUM_PLANES 3
15#define MSM_CPP_MIN_FRAME_LENGTH 13
16#define MSM_CPP_MAX_FRAME_LENGTH 4096
17#define MSM_CPP_MAX_FW_NAME_LEN 32
18#define MAX_FREQ_TBL 10
19#define MSM_OUTPUT_BUF_CNT 8
20
21enum msm_cpp_frame_type {
22 MSM_CPP_OFFLINE_FRAME,
23 MSM_CPP_REALTIME_FRAME,
24};
25
26enum msm_vpe_frame_type {
27 MSM_VPE_OFFLINE_FRAME,
28 MSM_VPE_REALTIME_FRAME,
29};
30
31struct msm_cpp_buffer_info_t {
32 int32_t fd;
33 uint32_t index;
34 uint32_t offset;
35 uint8_t native_buff;
36 uint8_t processed_divert;
37 uint32_t identity;
38};
39
40struct msm_cpp_stream_buff_info_t {
41 uint32_t identity;
42 uint32_t num_buffs;
43 struct msm_cpp_buffer_info_t *buffer_info;
44};
45
46enum msm_cpp_batch_mode_t {
47 BATCH_MODE_NONE,
48 BATCH_MODE_VIDEO,
49 BATCH_MODE_PREVIEW
50};
51
52struct msm_cpp_batch_info_t {
53 enum msm_cpp_batch_mode_t batch_mode;
54 uint32_t batch_size;
55 uint32_t intra_plane_offset[MAX_PLANES];
56 uint32_t pick_preview_idx;
57 uint32_t cont_idx;
58};
59
60struct msm_cpp_frame_info_t {
61 int32_t frame_id;
62 struct timeval timestamp;
63 uint32_t inst_id;
64 uint32_t identity;
65 uint32_t client_id;
66 enum msm_cpp_frame_type frame_type;
67 uint32_t num_strips;
68 uint32_t msg_len;
69 uint32_t *cpp_cmd_msg;
70 int src_fd;
71 int dst_fd;
72 struct timeval in_time, out_time;
73 void __user *cookie;
74 int32_t *status;
75 int32_t duplicate_output;
76 uint32_t duplicate_identity;
77 uint32_t feature_mask;
78 uint8_t we_disable;
79 struct msm_cpp_buffer_info_t input_buffer_info;
80 struct msm_cpp_buffer_info_t output_buffer_info[MSM_OUTPUT_BUF_CNT];
81 struct msm_cpp_buffer_info_t duplicate_buffer_info;
82 struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2];
83 uint32_t reserved;
84 uint8_t partial_frame_indicator;
85 /* the followings are used only for partial_frame type
86 * and is only used for offline frame processing and
87 * only if payload big enough and need to be split into partial_frame
88 * if first_payload, kernel acquires output buffer
89 * first payload must have the last stripe
90 * buffer addresses from 0 to last_stripe_index are updated.
91 * kernel updates payload with msg_len and stripe_info
92 * kernel sends top level, plane level, then only stripes
93 * starting with first_stripe_index and
94 * ends with last_stripe_index
95 * kernel then sends trailing flag at frame done,
96 * if last payload, kernel queues the output buffer to HAL
97 */
98 uint8_t first_payload;
99 uint8_t last_payload;
100 uint32_t first_stripe_index;
101 uint32_t last_stripe_index;
102 uint32_t stripe_info_offset;
103 uint32_t stripe_info;
104 struct msm_cpp_batch_info_t batch_info;
105};
106
107struct msm_cpp_pop_stream_info_t {
108 int32_t frame_id;
109 uint32_t identity;
110};
111
112struct cpp_hw_info {
113 uint32_t cpp_hw_version;
114 uint32_t cpp_hw_caps;
115 unsigned long freq_tbl[MAX_FREQ_TBL];
116 uint32_t freq_tbl_count;
117};
118
119struct msm_vpe_frame_strip_info {
120 uint32_t src_w;
121 uint32_t src_h;
122 uint32_t dst_w;
123 uint32_t dst_h;
124 uint32_t src_x;
125 uint32_t src_y;
126 uint32_t phase_step_x;
127 uint32_t phase_step_y;
128 uint32_t phase_init_x;
129 uint32_t phase_init_y;
130};
131
132struct msm_vpe_buffer_info_t {
133 int32_t fd;
134 uint32_t index;
135 uint32_t offset;
136 uint8_t native_buff;
137 uint8_t processed_divert;
138};
139
140struct msm_vpe_stream_buff_info_t {
141 uint32_t identity;
142 uint32_t num_buffs;
143 struct msm_vpe_buffer_info_t *buffer_info;
144};
145
146struct msm_vpe_frame_info_t {
147 int32_t frame_id;
148 struct timeval timestamp;
149 uint32_t inst_id;
150 uint32_t identity;
151 uint32_t client_id;
152 enum msm_vpe_frame_type frame_type;
153 struct msm_vpe_frame_strip_info strip_info;
154 unsigned long src_fd;
155 unsigned long dst_fd;
156 struct ion_handle *src_ion_handle;
157 struct ion_handle *dest_ion_handle;
158 unsigned long src_phyaddr;
159 unsigned long dest_phyaddr;
160 unsigned long src_chroma_plane_offset;
161 unsigned long dest_chroma_plane_offset;
162 struct timeval in_time, out_time;
163 void *cookie;
164
165 struct msm_vpe_buffer_info_t input_buffer_info;
166 struct msm_vpe_buffer_info_t output_buffer_info;
167};
168
169struct msm_pproc_queue_buf_info {
170 struct msm_buf_mngr_info buff_mgr_info;
171 uint8_t is_buf_dirty;
172};
173
174struct msm_cpp_clock_settings_t {
175 unsigned long clock_rate;
176 uint64_t avg;
177 uint64_t inst;
178};
179
180#define VIDIOC_MSM_CPP_CFG \
181 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
182
183#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
184 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
185
186#define VIDIOC_MSM_CPP_GET_INST_INFO \
187 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
188
189#define VIDIOC_MSM_CPP_LOAD_FIRMWARE \
190 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
191
192#define VIDIOC_MSM_CPP_GET_HW_INFO \
193 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
194
195#define VIDIOC_MSM_CPP_FLUSH_QUEUE \
196 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
197
198#define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO \
199 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl_t)
200
201#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO \
202 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t)
203
204#define VIDIOC_MSM_VPE_CFG \
205 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
206
207#define VIDIOC_MSM_VPE_TRANSACTION_SETUP \
208 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
209
210#define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD \
211 _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
212
213#define VIDIOC_MSM_VPE_GET_INST_INFO \
214 _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t)
215
216#define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO \
217 _IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl_t)
218
219#define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO \
220 _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl_t)
221
222#define VIDIOC_MSM_CPP_QUEUE_BUF \
223 _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t)
224
225#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO \
226 _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t)
227
228#define VIDIOC_MSM_CPP_SET_CLOCK \
229 _IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl_t)
230
231#define VIDIOC_MSM_CPP_POP_STREAM_BUFFER \
232 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl_t)
233
234#define VIDIOC_MSM_CPP_IOMMU_ATTACH \
235 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl_t)
236
237#define VIDIOC_MSM_CPP_IOMMU_DETACH \
238 _IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t)
239
240#define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF\
241 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl_t)
242
243
244#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
245#define V4L2_EVENT_VPE_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 1)
246
247struct msm_camera_v4l2_ioctl_t {
248 uint32_t id;
249 size_t len;
250 int32_t trans_code;
251 void __user *ioctl_ptr;
252};
253
254#endif
255