blob: 1eb605b6f0492397d16fd1aec4032fd501232136 [file] [log] [blame]
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
Graeme Gregory7be859f2013-03-07 13:17:48 +00004 * Copyright 2011-2013 Texas Instruments Inc.
Graeme Gregorye5ce4202012-05-18 16:53:57 +01005 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
Graeme Gregorya7dddf22013-02-23 16:35:40 +00007 * Author: Ian Lartey <ian@slimlogic.co.uk>
Graeme Gregorye5ce4202012-05-18 16:53:57 +01008 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
Graeme Gregorya361cd92012-08-28 13:47:40 +020026#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
Graeme Gregorye5ce4202012-05-18 16:53:57 +010029
Keerthydbabd622014-05-22 14:48:29 +053030static const struct regulator_linear_range smps_low_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050031 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053032 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
35};
36
37static const struct regulator_linear_range smps_high_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050038 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053039 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
42};
43
Nishanth Menon6839cd62014-06-30 10:57:37 -050044static struct palmas_regs_info palmas_generic_regs_info[] = {
Graeme Gregorye5ce4202012-05-18 16:53:57 +010045 {
46 .name = "SMPS12",
Laxman Dewangan504382c2013-03-20 19:26:37 +053047 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010048 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
49 .ctrl_addr = PALMAS_SMPS12_CTRL,
50 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053051 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010052 },
53 {
54 .name = "SMPS123",
Laxman Dewangan504382c2013-03-20 19:26:37 +053055 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010056 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
57 .ctrl_addr = PALMAS_SMPS12_CTRL,
58 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053059 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010060 },
61 {
62 .name = "SMPS3",
Laxman Dewangan504382c2013-03-20 19:26:37 +053063 .sname = "smps3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010064 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
65 .ctrl_addr = PALMAS_SMPS3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053066 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010067 },
68 {
69 .name = "SMPS45",
Laxman Dewangan504382c2013-03-20 19:26:37 +053070 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010071 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
72 .ctrl_addr = PALMAS_SMPS45_CTRL,
73 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053074 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010075 },
76 {
77 .name = "SMPS457",
Laxman Dewangan504382c2013-03-20 19:26:37 +053078 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010079 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
80 .ctrl_addr = PALMAS_SMPS45_CTRL,
81 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053082 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010083 },
84 {
85 .name = "SMPS6",
Laxman Dewangan504382c2013-03-20 19:26:37 +053086 .sname = "smps6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010087 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
88 .ctrl_addr = PALMAS_SMPS6_CTRL,
89 .tstep_addr = PALMAS_SMPS6_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053090 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010091 },
92 {
93 .name = "SMPS7",
Laxman Dewangan504382c2013-03-20 19:26:37 +053094 .sname = "smps7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010095 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
96 .ctrl_addr = PALMAS_SMPS7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053097 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010098 },
99 {
100 .name = "SMPS8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530101 .sname = "smps8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100102 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
103 .ctrl_addr = PALMAS_SMPS8_CTRL,
104 .tstep_addr = PALMAS_SMPS8_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100106 },
107 {
108 .name = "SMPS9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530109 .sname = "smps9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100110 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
111 .ctrl_addr = PALMAS_SMPS9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100113 },
114 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530115 .name = "SMPS10_OUT2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530116 .sname = "smps10-in",
Axel Line31089c2013-04-19 20:33:45 +0800117 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100119 },
120 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530121 .name = "SMPS10_OUT1",
122 .sname = "smps10-out2",
123 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530125 },
126 {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100127 .name = "LDO1",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530128 .sname = "ldo1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100129 .vsel_addr = PALMAS_LDO1_VOLTAGE,
130 .ctrl_addr = PALMAS_LDO1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100132 },
133 {
134 .name = "LDO2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530135 .sname = "ldo2-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100136 .vsel_addr = PALMAS_LDO2_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100139 },
140 {
141 .name = "LDO3",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530142 .sname = "ldo3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100143 .vsel_addr = PALMAS_LDO3_VOLTAGE,
144 .ctrl_addr = PALMAS_LDO3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100146 },
147 {
148 .name = "LDO4",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530149 .sname = "ldo4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100150 .vsel_addr = PALMAS_LDO4_VOLTAGE,
151 .ctrl_addr = PALMAS_LDO4_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100153 },
154 {
155 .name = "LDO5",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530156 .sname = "ldo5-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100157 .vsel_addr = PALMAS_LDO5_VOLTAGE,
158 .ctrl_addr = PALMAS_LDO5_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100160 },
161 {
162 .name = "LDO6",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530163 .sname = "ldo6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100164 .vsel_addr = PALMAS_LDO6_VOLTAGE,
165 .ctrl_addr = PALMAS_LDO6_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100167 },
168 {
169 .name = "LDO7",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530170 .sname = "ldo7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100171 .vsel_addr = PALMAS_LDO7_VOLTAGE,
172 .ctrl_addr = PALMAS_LDO7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100174 },
175 {
176 .name = "LDO8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530177 .sname = "ldo8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100178 .vsel_addr = PALMAS_LDO8_VOLTAGE,
179 .ctrl_addr = PALMAS_LDO8_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100181 },
182 {
183 .name = "LDO9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530184 .sname = "ldo9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100185 .vsel_addr = PALMAS_LDO9_VOLTAGE,
186 .ctrl_addr = PALMAS_LDO9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100188 },
189 {
190 .name = "LDOLN",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530191 .sname = "ldoln-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100192 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
193 .ctrl_addr = PALMAS_LDOLN_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100195 },
196 {
197 .name = "LDOUSB",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530198 .sname = "ldousb-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
200 .ctrl_addr = PALMAS_LDOUSB_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100202 },
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530203 {
204 .name = "REGEN1",
205 .ctrl_addr = PALMAS_REGEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530207 },
208 {
209 .name = "REGEN2",
210 .ctrl_addr = PALMAS_REGEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530212 },
213 {
214 .name = "REGEN3",
215 .ctrl_addr = PALMAS_REGEN3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530217 },
218 {
219 .name = "SYSEN1",
220 .ctrl_addr = PALMAS_SYSEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530222 },
223 {
224 .name = "SYSEN2",
225 .ctrl_addr = PALMAS_SYSEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530227 },
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100228};
229
Nishanth Menone7cf34e2014-06-30 10:57:35 -0500230static struct palmas_regs_info tps65917_regs_info[] = {
Keerthyd6f83372014-06-18 15:29:00 +0530231 {
232 .name = "SMPS1",
233 .sname = "smps1-in",
234 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
235 .ctrl_addr = TPS65917_SMPS1_CTRL,
236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
237 },
238 {
239 .name = "SMPS2",
240 .sname = "smps2-in",
241 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
242 .ctrl_addr = TPS65917_SMPS2_CTRL,
243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
244 },
245 {
246 .name = "SMPS3",
247 .sname = "smps3-in",
248 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
249 .ctrl_addr = TPS65917_SMPS3_CTRL,
250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
251 },
252 {
253 .name = "SMPS4",
254 .sname = "smps4-in",
255 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
256 .ctrl_addr = TPS65917_SMPS4_CTRL,
257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
258 },
259 {
260 .name = "SMPS5",
261 .sname = "smps5-in",
262 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
263 .ctrl_addr = TPS65917_SMPS5_CTRL,
264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
265 },
266 {
267 .name = "LDO1",
268 .sname = "ldo1-in",
269 .vsel_addr = TPS65917_LDO1_VOLTAGE,
270 .ctrl_addr = TPS65917_LDO1_CTRL,
271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
272 },
273 {
274 .name = "LDO2",
275 .sname = "ldo2-in",
276 .vsel_addr = TPS65917_LDO2_VOLTAGE,
277 .ctrl_addr = TPS65917_LDO2_CTRL,
278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
279 },
280 {
281 .name = "LDO3",
282 .sname = "ldo3-in",
283 .vsel_addr = TPS65917_LDO3_VOLTAGE,
284 .ctrl_addr = TPS65917_LDO3_CTRL,
285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
286 },
287 {
288 .name = "LDO4",
289 .sname = "ldo4-in",
290 .vsel_addr = TPS65917_LDO4_VOLTAGE,
291 .ctrl_addr = TPS65917_LDO4_CTRL,
292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
293 },
294 {
295 .name = "LDO5",
296 .sname = "ldo5-in",
297 .vsel_addr = TPS65917_LDO5_VOLTAGE,
298 .ctrl_addr = TPS65917_LDO5_CTRL,
299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
300 },
301 {
302 .name = "REGEN1",
303 .ctrl_addr = TPS65917_REGEN1_CTRL,
304 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
305 },
306 {
307 .name = "REGEN2",
308 .ctrl_addr = TPS65917_REGEN2_CTRL,
309 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
310 },
311 {
312 .name = "REGEN3",
313 .ctrl_addr = TPS65917_REGEN3_CTRL,
314 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
315 },
316};
317
Keerthycac9e912014-06-18 15:28:59 +0530318#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
319 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
320 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
321 .reg_offset = _offset, \
322 .bit_pos = _pos, \
323 }
324
Nishanth Menon4b09e172014-06-30 10:57:34 -0500325static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
Keerthycac9e912014-06-18 15:28:59 +0530326 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
327 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
328 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
329 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
330 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
331 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
332 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
333 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
334 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
335 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
336 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
337 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
338 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
339 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
340 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
341 EXTERNAL_REQUESTOR(LDO1, 2, 0),
342 EXTERNAL_REQUESTOR(LDO2, 2, 1),
343 EXTERNAL_REQUESTOR(LDO3, 2, 2),
344 EXTERNAL_REQUESTOR(LDO4, 2, 3),
345 EXTERNAL_REQUESTOR(LDO5, 2, 4),
346 EXTERNAL_REQUESTOR(LDO6, 2, 5),
347 EXTERNAL_REQUESTOR(LDO7, 2, 6),
348 EXTERNAL_REQUESTOR(LDO8, 2, 7),
349 EXTERNAL_REQUESTOR(LDO9, 3, 0),
350 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
351 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
352};
353
Keerthyd6f83372014-06-18 15:29:00 +0530354#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
355 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
356 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
357 .reg_offset = _offset, \
358 .bit_pos = _pos, \
359 }
360
361static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
362 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
363 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
365 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
370 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
371 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
372 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
373 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
374 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
375};
376
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530377static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
378
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100379#define SMPS_CTRL_MODE_OFF 0x00
380#define SMPS_CTRL_MODE_ON 0x01
381#define SMPS_CTRL_MODE_ECO 0x02
382#define SMPS_CTRL_MODE_PWM 0x03
383
Laxman Dewangan0f45aa82013-09-04 15:20:06 +0530384#define PALMAS_SMPS_NUM_VOLTAGES 122
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100385#define PALMAS_SMPS10_NUM_VOLTAGES 2
386#define PALMAS_LDO_NUM_VOLTAGES 50
387
388#define SMPS10_VSEL (1<<3)
389#define SMPS10_BOOST_EN (1<<2)
390#define SMPS10_BYPASS_EN (1<<1)
391#define SMPS10_SWITCH_EN (1<<0)
392
393#define REGULATOR_SLAVE 0
394
395static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
396 unsigned int *dest)
397{
398 unsigned int addr;
399
400 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
401
402 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
403}
404
405static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
406 unsigned int value)
407{
408 unsigned int addr;
409
410 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
411
412 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
413}
414
415static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
416 unsigned int *dest)
417{
418 unsigned int addr;
419
420 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
421
422 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
423}
424
425static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
426 unsigned int value)
427{
428 unsigned int addr;
429
430 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
431
432 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
433}
434
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100435static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
436{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500437 int id = rdev_get_id(dev);
Kangjie Lu608024a2018-12-18 23:04:13 -0600438 int ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100439 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530440 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500441 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100442 unsigned int reg;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530443 bool rail_enable = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100444
Kangjie Lu608024a2018-12-18 23:04:13 -0600445 ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
446 if (ret)
447 return ret;
Keerthycac9e912014-06-18 15:28:59 +0530448
Axel Lin999f0c72012-06-07 17:08:21 +0800449 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100450
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530451 if (reg == SMPS_CTRL_MODE_OFF)
452 rail_enable = false;
453
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100454 switch (mode) {
455 case REGULATOR_MODE_NORMAL:
456 reg |= SMPS_CTRL_MODE_ON;
457 break;
458 case REGULATOR_MODE_IDLE:
459 reg |= SMPS_CTRL_MODE_ECO;
460 break;
461 case REGULATOR_MODE_FAST:
462 reg |= SMPS_CTRL_MODE_PWM;
463 break;
464 default:
465 return -EINVAL;
466 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100467
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530468 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
469 if (rail_enable)
Nishanth Menoncf910b62014-06-30 10:57:36 -0500470 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
Nishanth Menon318dbb02014-06-20 12:26:23 -0500471
472 /* Switch the enable value to ensure this is used for enable */
473 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
474
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100475 return 0;
476}
477
478static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
479{
480 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
481 int id = rdev_get_id(dev);
482 unsigned int reg;
483
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530484 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100485
486 switch (reg) {
487 case SMPS_CTRL_MODE_ON:
488 return REGULATOR_MODE_NORMAL;
489 case SMPS_CTRL_MODE_ECO:
490 return REGULATOR_MODE_IDLE;
491 case SMPS_CTRL_MODE_PWM:
492 return REGULATOR_MODE_FAST;
493 }
494
495 return 0;
496}
497
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530498static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
499 int ramp_delay)
500{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500501 int id = rdev_get_id(rdev);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530502 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
Keerthycac9e912014-06-18 15:28:59 +0530503 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500504 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530505 unsigned int reg = 0;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530506 int ret;
507
Axel Linf22c2ba2013-04-19 14:18:48 +0800508 /* SMPS3 and SMPS7 do not have tstep_addr setting */
509 switch (id) {
510 case PALMAS_REG_SMPS3:
511 case PALMAS_REG_SMPS7:
512 return 0;
513 }
514
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530515 if (ramp_delay <= 0)
516 reg = 0;
Axel Lin0ea34b52013-04-22 18:22:49 +0800517 else if (ramp_delay <= 2500)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530518 reg = 3;
Axel Lin0ea34b52013-04-22 18:22:49 +0800519 else if (ramp_delay <= 5000)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530520 reg = 2;
521 else
522 reg = 1;
523
Nishanth Menoncf910b62014-06-30 10:57:36 -0500524 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530525 if (ret < 0) {
526 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
527 return ret;
528 }
529
530 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
531 return ret;
532}
533
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100534static struct regulator_ops palmas_ops_smps = {
Keerthydbabd622014-05-22 14:48:29 +0530535 .is_enabled = regulator_is_enabled_regmap,
536 .enable = regulator_enable_regmap,
537 .disable = regulator_disable_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100538 .set_mode = palmas_set_mode_smps,
539 .get_mode = palmas_get_mode_smps,
Axel Linbdc4baa2012-11-29 10:01:44 +0800540 .get_voltage_sel = regulator_get_voltage_sel_regmap,
541 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530542 .list_voltage = regulator_list_voltage_linear_range,
543 .map_voltage = regulator_map_voltage_linear_range,
544 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530545 .set_ramp_delay = palmas_smps_set_ramp_delay,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100546};
547
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530548static struct regulator_ops palmas_ops_ext_control_smps = {
549 .set_mode = palmas_set_mode_smps,
550 .get_mode = palmas_get_mode_smps,
551 .get_voltage_sel = regulator_get_voltage_sel_regmap,
552 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530553 .list_voltage = regulator_list_voltage_linear_range,
554 .map_voltage = regulator_map_voltage_linear_range,
555 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530556 .set_ramp_delay = palmas_smps_set_ramp_delay,
557};
558
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100559static struct regulator_ops palmas_ops_smps10 = {
560 .is_enabled = regulator_is_enabled_regmap,
561 .enable = regulator_enable_regmap,
562 .disable = regulator_disable_regmap,
563 .get_voltage_sel = regulator_get_voltage_sel_regmap,
564 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin8029a002012-05-22 12:26:42 +0800565 .list_voltage = regulator_list_voltage_linear,
566 .map_voltage = regulator_map_voltage_linear,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530567 .set_bypass = regulator_set_bypass_regmap,
568 .get_bypass = regulator_get_bypass_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100569};
570
Keerthyd6f83372014-06-18 15:29:00 +0530571static struct regulator_ops tps65917_ops_smps = {
572 .is_enabled = regulator_is_enabled_regmap,
573 .enable = regulator_enable_regmap,
574 .disable = regulator_disable_regmap,
575 .set_mode = palmas_set_mode_smps,
576 .get_mode = palmas_get_mode_smps,
577 .get_voltage_sel = regulator_get_voltage_sel_regmap,
578 .set_voltage_sel = regulator_set_voltage_sel_regmap,
579 .list_voltage = regulator_list_voltage_linear_range,
580 .map_voltage = regulator_map_voltage_linear_range,
581 .set_voltage_time_sel = regulator_set_voltage_time_sel,
582};
583
584static struct regulator_ops tps65917_ops_ext_control_smps = {
585 .set_mode = palmas_set_mode_smps,
586 .get_mode = palmas_get_mode_smps,
587 .get_voltage_sel = regulator_get_voltage_sel_regmap,
588 .set_voltage_sel = regulator_set_voltage_sel_regmap,
589 .list_voltage = regulator_list_voltage_linear_range,
590 .map_voltage = regulator_map_voltage_linear_range,
591};
592
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100593static int palmas_is_enabled_ldo(struct regulator_dev *dev)
594{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500595 int id = rdev_get_id(dev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100596 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530597 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500598 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100599 unsigned int reg;
600
Nishanth Menoncf910b62014-06-30 10:57:36 -0500601 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100602
603 reg &= PALMAS_LDO1_CTRL_STATUS;
604
605 return !!(reg);
606}
607
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100608static struct regulator_ops palmas_ops_ldo = {
609 .is_enabled = palmas_is_enabled_ldo,
610 .enable = regulator_enable_regmap,
611 .disable = regulator_disable_regmap,
Axel Lin4a247a92012-07-18 12:34:08 +0800612 .get_voltage_sel = regulator_get_voltage_sel_regmap,
613 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin9119ff62012-11-27 10:27:34 +0800614 .list_voltage = regulator_list_voltage_linear,
615 .map_voltage = regulator_map_voltage_linear,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100616};
617
Keerthyb554e142015-12-14 12:06:55 +0530618static struct regulator_ops palmas_ops_ldo9 = {
619 .is_enabled = palmas_is_enabled_ldo,
620 .enable = regulator_enable_regmap,
621 .disable = regulator_disable_regmap,
622 .get_voltage_sel = regulator_get_voltage_sel_regmap,
623 .set_voltage_sel = regulator_set_voltage_sel_regmap,
624 .list_voltage = regulator_list_voltage_linear,
625 .map_voltage = regulator_map_voltage_linear,
626 .set_bypass = regulator_set_bypass_regmap,
627 .get_bypass = regulator_get_bypass_regmap,
628};
629
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530630static struct regulator_ops palmas_ops_ext_control_ldo = {
631 .get_voltage_sel = regulator_get_voltage_sel_regmap,
632 .set_voltage_sel = regulator_set_voltage_sel_regmap,
633 .list_voltage = regulator_list_voltage_linear,
634 .map_voltage = regulator_map_voltage_linear,
635};
636
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530637static struct regulator_ops palmas_ops_extreg = {
638 .is_enabled = regulator_is_enabled_regmap,
639 .enable = regulator_enable_regmap,
640 .disable = regulator_disable_regmap,
641};
642
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530643static struct regulator_ops palmas_ops_ext_control_extreg = {
644};
645
Keerthyd6f83372014-06-18 15:29:00 +0530646static struct regulator_ops tps65917_ops_ldo = {
647 .is_enabled = palmas_is_enabled_ldo,
648 .enable = regulator_enable_regmap,
649 .disable = regulator_disable_regmap,
650 .get_voltage_sel = regulator_get_voltage_sel_regmap,
651 .set_voltage_sel = regulator_set_voltage_sel_regmap,
652 .list_voltage = regulator_list_voltage_linear,
653 .map_voltage = regulator_map_voltage_linear,
654 .set_voltage_time_sel = regulator_set_voltage_time_sel,
655};
656
Keerthyb554e142015-12-14 12:06:55 +0530657static struct regulator_ops tps65917_ops_ldo_1_2 = {
658 .is_enabled = palmas_is_enabled_ldo,
659 .enable = regulator_enable_regmap,
660 .disable = regulator_disable_regmap,
661 .get_voltage_sel = regulator_get_voltage_sel_regmap,
662 .set_voltage_sel = regulator_set_voltage_sel_regmap,
663 .list_voltage = regulator_list_voltage_linear,
664 .map_voltage = regulator_map_voltage_linear,
665 .set_voltage_time_sel = regulator_set_voltage_time_sel,
666 .set_bypass = regulator_set_bypass_regmap,
667 .get_bypass = regulator_get_bypass_regmap,
668};
669
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530670static int palmas_regulator_config_external(struct palmas *palmas, int id,
671 struct palmas_reg_init *reg_init)
672{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500673 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
674 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530675 int ret;
676
Nishanth Menoncf910b62014-06-30 10:57:36 -0500677 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
678 reg_init->roof_floor, true);
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530679 if (ret < 0)
680 dev_err(palmas->dev,
681 "Ext control config for regulator %d failed %d\n",
682 id, ret);
683 return ret;
684}
685
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100686/*
687 * setup the hardware based sleep configuration of the SMPS/LDO regulators
688 * from the platform data. This is different to the software based control
689 * supported by the regulator framework as it is controlled by toggling
690 * pins on the PMIC such as PREQ, SYSEN, ...
691 */
692static int palmas_smps_init(struct palmas *palmas, int id,
693 struct palmas_reg_init *reg_init)
694{
695 unsigned int reg;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100696 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530697 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500698 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
699 unsigned int addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100700
701 ret = palmas_smps_read(palmas, addr, &reg);
702 if (ret)
703 return ret;
704
Axel Linfedd89b2012-06-06 20:01:38 +0800705 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530706 case PALMAS_REG_SMPS10_OUT1:
707 case PALMAS_REG_SMPS10_OUT2:
Laxman Dewangan30590d02013-04-17 15:13:11 +0530708 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
709 if (reg_init->mode_sleep)
Axel Linfedd89b2012-06-06 20:01:38 +0800710 reg |= reg_init->mode_sleep <<
711 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
Axel Linfedd89b2012-06-06 20:01:38 +0800712 break;
713 default:
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100714 if (reg_init->warm_reset)
715 reg |= PALMAS_SMPS12_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530716 else
717 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100718
719 if (reg_init->roof_floor)
720 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530721 else
722 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100723
Laxman Dewangan30590d02013-04-17 15:13:11 +0530724 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
725 if (reg_init->mode_sleep)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100726 reg |= reg_init->mode_sleep <<
727 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100728 }
Axel Linfedd89b2012-06-06 20:01:38 +0800729
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100730 ret = palmas_smps_write(palmas, addr, reg);
731 if (ret)
732 return ret;
733
Nishanth Menoncf910b62014-06-30 10:57:36 -0500734 if (rinfo->vsel_addr && reg_init->vsel) {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100735
736 reg = reg_init->vsel;
737
Nishanth Menoncf910b62014-06-30 10:57:36 -0500738 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100739 if (ret)
740 return ret;
741 }
742
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530743 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
744 (id != PALMAS_REG_SMPS10_OUT2)) {
745 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530746 ret = palmas_smps_read(palmas, addr, &reg);
747 if (ret < 0)
748 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100749
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530750 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
751 reg |= SMPS_CTRL_MODE_ON;
752 ret = palmas_smps_write(palmas, addr, reg);
753 if (ret < 0)
754 return ret;
755 }
756 return palmas_regulator_config_external(palmas, id, reg_init);
757 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100758 return 0;
759}
760
761static int palmas_ldo_init(struct palmas *palmas, int id,
762 struct palmas_reg_init *reg_init)
763{
764 unsigned int reg;
765 unsigned int addr;
766 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530767 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500768 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530769
Nishanth Menoncf910b62014-06-30 10:57:36 -0500770 addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100771
Axel Lin2735dae2012-07-18 12:31:59 +0800772 ret = palmas_ldo_read(palmas, addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100773 if (ret)
774 return ret;
775
776 if (reg_init->warm_reset)
777 reg |= PALMAS_LDO1_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530778 else
779 reg &= ~PALMAS_LDO1_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100780
781 if (reg_init->mode_sleep)
782 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530783 else
784 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100785
Axel Lin2735dae2012-07-18 12:31:59 +0800786 ret = palmas_ldo_write(palmas, addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100787 if (ret)
788 return ret;
789
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530790 if (reg_init->roof_floor) {
791 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530792 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
793 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
794 PALMAS_LDO1_CTRL_MODE_ACTIVE);
795 if (ret < 0) {
796 dev_err(palmas->dev,
797 "LDO Register 0x%02x update failed %d\n",
798 addr, ret);
799 return ret;
800 }
801 return palmas_regulator_config_external(palmas, id, reg_init);
802 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100803 return 0;
804}
805
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530806static int palmas_extreg_init(struct palmas *palmas, int id,
807 struct palmas_reg_init *reg_init)
808{
809 unsigned int addr;
810 int ret;
811 unsigned int val = 0;
Keerthycac9e912014-06-18 15:28:59 +0530812 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500813 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530814
Nishanth Menoncf910b62014-06-30 10:57:36 -0500815 addr = rinfo->ctrl_addr;
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530816
817 if (reg_init->mode_sleep)
818 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
819
820 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
821 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
822 if (ret < 0) {
823 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
824 addr, ret);
825 return ret;
826 }
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530827
828 if (reg_init->roof_floor) {
829 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530830 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
831 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
832 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
833 if (ret < 0) {
834 dev_err(palmas->dev,
835 "Resource Register 0x%02x update failed %d\n",
836 addr, ret);
837 return ret;
838 }
839 return palmas_regulator_config_external(palmas, id, reg_init);
840 }
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530841 return 0;
842}
843
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530844static void palmas_enable_ldo8_track(struct palmas *palmas)
845{
846 unsigned int reg;
847 unsigned int addr;
848 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530849 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500850 struct palmas_regs_info *rinfo;
Keerthycac9e912014-06-18 15:28:59 +0530851
Nishanth Menoncf910b62014-06-30 10:57:36 -0500852 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
853 addr = rinfo->ctrl_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530854
855 ret = palmas_ldo_read(palmas, addr, &reg);
856 if (ret) {
857 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
858 return;
859 }
860
861 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
862 ret = palmas_ldo_write(palmas, addr, reg);
863 if (ret < 0) {
864 dev_err(palmas->dev, "Error in enabling tracking mode\n");
865 return;
866 }
867 /*
868 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
869 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
870 * and can be set from 0.45 to 1.65 V.
871 */
Nishanth Menoncf910b62014-06-30 10:57:36 -0500872 addr = rinfo->vsel_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530873 ret = palmas_ldo_read(palmas, addr, &reg);
874 if (ret) {
875 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
876 return;
877 }
878
879 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
880 ret = palmas_ldo_write(palmas, addr, reg);
881 if (ret < 0)
882 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
883
884 return;
885}
886
Keerthycac9e912014-06-18 15:28:59 +0530887static int palmas_ldo_registration(struct palmas_pmic *pmic,
888 struct palmas_pmic_driver_data *ddata,
889 struct palmas_pmic_platform_data *pdata,
890 const char *pdev_name,
891 struct regulator_config config)
Graeme Gregorya361cd92012-08-28 13:47:40 +0200892{
Keerthycac9e912014-06-18 15:28:59 +0530893 int id, ret;
894 struct regulator_dev *rdev;
895 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500896 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -0500897 struct regulator_desc *desc;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200898
Keerthycac9e912014-06-18 15:28:59 +0530899 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
900 if (pdata && pdata->reg_init[id])
901 reg_init = pdata->reg_init[id];
902 else
903 reg_init = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200904
Nishanth Menoncf910b62014-06-30 10:57:36 -0500905 rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530906 /* Miss out regulators which are not available due
907 * to alternate functions.
908 */
Graeme Gregorya361cd92012-08-28 13:47:40 +0200909
Keerthycac9e912014-06-18 15:28:59 +0530910 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -0500911 desc = &pmic->desc[id];
912 desc->name = rinfo->name;
913 desc->id = id;
914 desc->type = REGULATOR_VOLTAGE;
915 desc->owner = THIS_MODULE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200916
Keerthycac9e912014-06-18 15:28:59 +0530917 if (id < PALMAS_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -0500918 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthycac9e912014-06-18 15:28:59 +0530919 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500920 desc->ops = &palmas_ops_ext_control_ldo;
Keerthycac9e912014-06-18 15:28:59 +0530921 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500922 desc->ops = &palmas_ops_ldo;
923 desc->min_uV = 900000;
924 desc->uV_step = 50000;
925 desc->linear_min_sel = 1;
926 desc->enable_time = 500;
927 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
928 rinfo->vsel_addr);
929 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
930 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
931 rinfo->ctrl_addr);
932 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200933
Keerthycac9e912014-06-18 15:28:59 +0530934 /* Check if LDO8 is in tracking mode or not */
935 if (pdata && (id == PALMAS_REG_LDO8) &&
936 pdata->enable_ldo8_tracking) {
937 palmas_enable_ldo8_track(pmic->palmas);
Nishanth Menon429222d2014-06-30 10:57:38 -0500938 desc->min_uV = 450000;
939 desc->uV_step = 25000;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530940 }
Keerthycac9e912014-06-18 15:28:59 +0530941
942 /* LOD6 in vibrator mode will have enable time 2000us */
943 if (pdata && pdata->ldo6_vibrator &&
944 (id == PALMAS_REG_LDO6))
Nishanth Menon429222d2014-06-30 10:57:38 -0500945 desc->enable_time = 2000;
Keerthyb554e142015-12-14 12:06:55 +0530946
947 if (id == PALMAS_REG_LDO9) {
948 desc->ops = &palmas_ops_ldo9;
949 desc->bypass_reg = desc->enable_reg;
Nishanth Menone0341f12016-04-26 11:36:42 -0500950 desc->bypass_val_on =
951 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
Keerthyb554e142015-12-14 12:06:55 +0530952 desc->bypass_mask =
953 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
954 }
Keerthycac9e912014-06-18 15:28:59 +0530955 } else {
Keerthye999c722015-03-17 15:56:05 +0530956 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
957 continue;
958
Nishanth Menon429222d2014-06-30 10:57:38 -0500959 desc->n_voltages = 1;
Keerthycac9e912014-06-18 15:28:59 +0530960 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500961 desc->ops = &palmas_ops_ext_control_extreg;
Keerthycac9e912014-06-18 15:28:59 +0530962 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500963 desc->ops = &palmas_ops_extreg;
964 desc->enable_reg =
Keerthycac9e912014-06-18 15:28:59 +0530965 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -0500966 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -0500967 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530968 }
Graeme Gregorya361cd92012-08-28 13:47:40 +0200969
Keerthycac9e912014-06-18 15:28:59 +0530970 if (pdata)
971 config.init_data = pdata->reg_data[id];
972 else
973 config.init_data = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200974
Nishanth Menon429222d2014-06-30 10:57:38 -0500975 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +0530976 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200977
Nishanth Menon429222d2014-06-30 10:57:38 -0500978 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthycac9e912014-06-18 15:28:59 +0530979 if (IS_ERR(rdev)) {
980 dev_err(pmic->dev,
981 "failed to register %s regulator\n",
982 pdev_name);
983 return PTR_ERR(rdev);
984 }
985
986 /* Save regulator for cleanup */
987 pmic->rdev[id] = rdev;
988
989 /* Initialise sleep/init values from platform data */
990 if (pdata) {
991 reg_init = pdata->reg_init[id];
992 if (reg_init) {
993 if (id <= ddata->ldo_end)
994 ret = palmas_ldo_init(pmic->palmas, id,
995 reg_init);
996 else
997 ret = palmas_extreg_init(pmic->palmas,
998 id, reg_init);
999 if (ret)
1000 return ret;
1001 }
1002 }
Graeme Gregorya361cd92012-08-28 13:47:40 +02001003 }
1004
Keerthycac9e912014-06-18 15:28:59 +05301005 return 0;
Graeme Gregorya361cd92012-08-28 13:47:40 +02001006}
1007
Keerthyd6f83372014-06-18 15:29:00 +05301008static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1009 struct palmas_pmic_driver_data *ddata,
1010 struct palmas_pmic_platform_data *pdata,
1011 const char *pdev_name,
1012 struct regulator_config config)
1013{
1014 int id, ret;
1015 struct regulator_dev *rdev;
1016 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001017 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001018 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +05301019
1020 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1021 if (pdata && pdata->reg_init[id])
1022 reg_init = pdata->reg_init[id];
1023 else
1024 reg_init = NULL;
1025
1026 /* Miss out regulators which are not available due
1027 * to alternate functions.
1028 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001029 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +05301030
1031 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001032 desc = &pmic->desc[id];
1033 desc->name = rinfo->name;
1034 desc->id = id;
1035 desc->type = REGULATOR_VOLTAGE;
1036 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +05301037
1038 if (id < TPS65917_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -05001039 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthyd6f83372014-06-18 15:29:00 +05301040 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001041 desc->ops = &palmas_ops_ext_control_ldo;
Keerthyd6f83372014-06-18 15:29:00 +05301042 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001043 desc->ops = &tps65917_ops_ldo;
1044 desc->min_uV = 900000;
1045 desc->uV_step = 50000;
1046 desc->linear_min_sel = 1;
1047 desc->enable_time = 500;
1048 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1049 rinfo->vsel_addr);
1050 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1051 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1052 rinfo->ctrl_addr);
1053 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301054 /*
1055 * To be confirmed. Discussion on going with PMIC Team.
1056 * It is of the order of ~60mV/uS.
1057 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001058 desc->ramp_delay = 2500;
Keerthyb554e142015-12-14 12:06:55 +05301059 if (id == TPS65917_REG_LDO1 ||
1060 id == TPS65917_REG_LDO2) {
1061 desc->ops = &tps65917_ops_ldo_1_2;
1062 desc->bypass_reg = desc->enable_reg;
Nishanth Menone0341f12016-04-26 11:36:42 -05001063 desc->bypass_val_on =
1064 TPS65917_LDO1_CTRL_BYPASS_EN;
Keerthyb554e142015-12-14 12:06:55 +05301065 desc->bypass_mask =
1066 TPS65917_LDO1_CTRL_BYPASS_EN;
1067 }
Keerthyd6f83372014-06-18 15:29:00 +05301068 } else {
Nishanth Menon429222d2014-06-30 10:57:38 -05001069 desc->n_voltages = 1;
Keerthyd6f83372014-06-18 15:29:00 +05301070 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001071 desc->ops = &palmas_ops_ext_control_extreg;
Keerthyd6f83372014-06-18 15:29:00 +05301072 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001073 desc->ops = &palmas_ops_extreg;
1074 desc->enable_reg =
Keerthyd6f83372014-06-18 15:29:00 +05301075 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -05001076 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -05001077 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301078 }
1079
1080 if (pdata)
1081 config.init_data = pdata->reg_data[id];
1082 else
1083 config.init_data = NULL;
1084
Nishanth Menon429222d2014-06-30 10:57:38 -05001085 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301086 config.of_node = ddata->palmas_matches[id].of_node;
1087
Nishanth Menon429222d2014-06-30 10:57:38 -05001088 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301089 if (IS_ERR(rdev)) {
1090 dev_err(pmic->dev,
1091 "failed to register %s regulator\n",
1092 pdev_name);
1093 return PTR_ERR(rdev);
1094 }
1095
1096 /* Save regulator for cleanup */
1097 pmic->rdev[id] = rdev;
1098
1099 /* Initialise sleep/init values from platform data */
1100 if (pdata) {
1101 reg_init = pdata->reg_init[id];
1102 if (reg_init) {
1103 if (id < TPS65917_REG_REGEN1)
1104 ret = palmas_ldo_init(pmic->palmas,
1105 id, reg_init);
1106 else
1107 ret = palmas_extreg_init(pmic->palmas,
1108 id, reg_init);
1109 if (ret)
1110 return ret;
1111 }
1112 }
1113 }
1114
1115 return 0;
1116}
1117
Keerthycac9e912014-06-18 15:28:59 +05301118static int palmas_smps_registration(struct palmas_pmic *pmic,
1119 struct palmas_pmic_driver_data *ddata,
1120 struct palmas_pmic_platform_data *pdata,
1121 const char *pdev_name,
1122 struct regulator_config config)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001123{
Keerthycac9e912014-06-18 15:28:59 +05301124 int id, ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001125 unsigned int addr, reg;
Keerthycac9e912014-06-18 15:28:59 +05301126 struct regulator_dev *rdev;
1127 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001128 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001129 struct regulator_desc *desc;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001130
Keerthycac9e912014-06-18 15:28:59 +05301131 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301132 bool ramp_delay_support = false;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001133
1134 /*
1135 * Miss out regulators which are not available due
1136 * to slaving configurations.
1137 */
1138 switch (id) {
1139 case PALMAS_REG_SMPS12:
1140 case PALMAS_REG_SMPS3:
1141 if (pmic->smps123)
1142 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301143 if (id == PALMAS_REG_SMPS12)
1144 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001145 break;
1146 case PALMAS_REG_SMPS123:
1147 if (!pmic->smps123)
1148 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301149 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001150 break;
1151 case PALMAS_REG_SMPS45:
1152 case PALMAS_REG_SMPS7:
1153 if (pmic->smps457)
1154 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301155 if (id == PALMAS_REG_SMPS45)
1156 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001157 break;
1158 case PALMAS_REG_SMPS457:
1159 if (!pmic->smps457)
1160 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301161 ramp_delay_support = true;
1162 break;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301163 case PALMAS_REG_SMPS10_OUT1:
1164 case PALMAS_REG_SMPS10_OUT2:
Keerthycac9e912014-06-18 15:28:59 +05301165 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
J Keerthy1ffb0be2013-06-19 11:27:48 +05301166 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301167 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001168 rinfo = &ddata->palmas_regs_info[id];
Nishanth Menon429222d2014-06-30 10:57:38 -05001169 desc = &pmic->desc[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301170
Sachin Kamat3f4d6362013-05-08 16:09:06 +05301171 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301172 ramp_delay_support = true;
1173
1174 if (ramp_delay_support) {
Nishanth Menoncf910b62014-06-30 10:57:36 -05001175 addr = rinfo->tstep_addr;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301176 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1177 if (ret < 0) {
Keerthycac9e912014-06-18 15:28:59 +05301178 dev_err(pmic->dev,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301179 "reading TSTEP reg failed: %d\n", ret);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301180 return ret;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301181 }
Nishanth Menon429222d2014-06-30 10:57:38 -05001182 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1183 pmic->ramp_delay[id] = desc->ramp_delay;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001184 }
1185
Axel Linbdc4baa2012-11-29 10:01:44 +08001186 /* Initialise sleep/init values from platform data */
1187 if (pdata && pdata->reg_init[id]) {
1188 reg_init = pdata->reg_init[id];
Keerthycac9e912014-06-18 15:28:59 +05301189 ret = palmas_smps_init(pmic->palmas, id, reg_init);
Axel Linbdc4baa2012-11-29 10:01:44 +08001190 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301191 return ret;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301192 } else {
1193 reg_init = NULL;
Axel Linbdc4baa2012-11-29 10:01:44 +08001194 }
1195
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001196 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001197 desc->name = rinfo->name;
1198 desc->id = id;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001199
Axel Linfedd89b2012-06-06 20:01:38 +08001200 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301201 case PALMAS_REG_SMPS10_OUT1:
1202 case PALMAS_REG_SMPS10_OUT2:
Nishanth Menon429222d2014-06-30 10:57:38 -05001203 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1204 desc->ops = &palmas_ops_smps10;
1205 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1206 PALMAS_SMPS10_CTRL);
1207 desc->vsel_mask = SMPS10_VSEL;
1208 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1209 PALMAS_SMPS10_CTRL);
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301210 if (id == PALMAS_REG_SMPS10_OUT1)
Nishanth Menon429222d2014-06-30 10:57:38 -05001211 desc->enable_mask = SMPS10_SWITCH_EN;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301212 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001213 desc->enable_mask = SMPS10_BOOST_EN;
1214 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1215 PALMAS_SMPS10_CTRL);
Nishanth Menone0341f12016-04-26 11:36:42 -05001216 desc->bypass_val_on = SMPS10_BYPASS_EN;
Nishanth Menon429222d2014-06-30 10:57:38 -05001217 desc->bypass_mask = SMPS10_BYPASS_EN;
1218 desc->min_uV = 3750000;
1219 desc->uV_step = 1250000;
Axel Linfedd89b2012-06-06 20:01:38 +08001220 break;
1221 default:
Axel Linbdc4baa2012-11-29 10:01:44 +08001222 /*
1223 * Read and store the RANGE bit for later use
1224 * This must be done before regulator is probed,
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301225 * otherwise we error in probe with unsupportable
1226 * ranges. Read the current smps mode for later use.
Axel Linbdc4baa2012-11-29 10:01:44 +08001227 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001228 addr = rinfo->vsel_addr;
Nishanth Menon429222d2014-06-30 10:57:38 -05001229 desc->n_linear_ranges = 3;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001230
1231 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1232 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301233 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001234 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1235 pmic->range[id] = 1;
Keerthydbabd622014-05-22 14:48:29 +05301236 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001237 desc->linear_ranges = smps_high_ranges;
Keerthydbabd622014-05-22 14:48:29 +05301238 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001239 desc->linear_ranges = smps_low_ranges;
Axel Linbdc4baa2012-11-29 10:01:44 +08001240
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301241 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001242 desc->ops = &palmas_ops_ext_control_smps;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301243 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001244 desc->ops = &palmas_ops_smps;
1245 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1246 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1247 rinfo->vsel_addr);
1248 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301249
1250 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001251 addr = rinfo->ctrl_addr;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301252 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1253 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301254 return ret;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301255 pmic->current_reg_mode[id] = reg &
1256 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001257
Nishanth Menon429222d2014-06-30 10:57:38 -05001258 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1259 rinfo->ctrl_addr);
1260 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001261 /* set_mode overrides this value */
Nishanth Menon429222d2014-06-30 10:57:38 -05001262 desc->enable_val = SMPS_CTRL_MODE_ON;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001263 }
1264
Nishanth Menon429222d2014-06-30 10:57:38 -05001265 desc->type = REGULATOR_VOLTAGE;
1266 desc->owner = THIS_MODULE;
Axel Linbdc4baa2012-11-29 10:01:44 +08001267
Graeme Gregorya361cd92012-08-28 13:47:40 +02001268 if (pdata)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001269 config.init_data = pdata->reg_data[id];
1270 else
1271 config.init_data = NULL;
1272
Nishanth Menon429222d2014-06-30 10:57:38 -05001273 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +05301274 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +02001275
Nishanth Menon429222d2014-06-30 10:57:38 -05001276 rdev = devm_regulator_register(pmic->dev, desc, &config);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001277 if (IS_ERR(rdev)) {
Keerthycac9e912014-06-18 15:28:59 +05301278 dev_err(pmic->dev,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001279 "failed to register %s regulator\n",
Keerthycac9e912014-06-18 15:28:59 +05301280 pdev_name);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301281 return PTR_ERR(rdev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001282 }
1283
1284 /* Save regulator for cleanup */
1285 pmic->rdev[id] = rdev;
1286 }
1287
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001288 return 0;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001289}
1290
Keerthyd6f83372014-06-18 15:29:00 +05301291static int tps65917_smps_registration(struct palmas_pmic *pmic,
1292 struct palmas_pmic_driver_data *ddata,
1293 struct palmas_pmic_platform_data *pdata,
1294 const char *pdev_name,
1295 struct regulator_config config)
1296{
1297 int id, ret;
1298 unsigned int addr, reg;
1299 struct regulator_dev *rdev;
1300 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001301 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001302 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +05301303
1304 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1305 /*
1306 * Miss out regulators which are not available due
1307 * to slaving configurations.
1308 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001309 desc = &pmic->desc[id];
1310 desc->n_linear_ranges = 3;
Keerthyd6f83372014-06-18 15:29:00 +05301311 if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
1312 continue;
1313
1314 /* Initialise sleep/init values from platform data */
1315 if (pdata && pdata->reg_init[id]) {
1316 reg_init = pdata->reg_init[id];
1317 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1318 if (ret)
1319 return ret;
1320 } else {
1321 reg_init = NULL;
1322 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001323 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +05301324
1325 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001326 desc->name = rinfo->name;
1327 desc->id = id;
Keerthyd6f83372014-06-18 15:29:00 +05301328
1329 /*
1330 * Read and store the RANGE bit for later use
1331 * This must be done before regulator is probed,
1332 * otherwise we error in probe with unsupportable
1333 * ranges. Read the current smps mode for later use.
1334 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001335 addr = rinfo->vsel_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301336
1337 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1338 if (ret)
1339 return ret;
1340 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1341 pmic->range[id] = 1;
1342
1343 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001344 desc->linear_ranges = smps_high_ranges;
1345 else
1346 desc->linear_ranges = smps_low_ranges;
Keerthyd6f83372014-06-18 15:29:00 +05301347
1348 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001349 desc->ops = &tps65917_ops_ext_control_smps;
Keerthyd6f83372014-06-18 15:29:00 +05301350 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001351 desc->ops = &tps65917_ops_smps;
1352 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1353 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1354 rinfo->vsel_addr);
1355 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1356 desc->ramp_delay = 2500;
Keerthyd6f83372014-06-18 15:29:00 +05301357
1358 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001359 addr = rinfo->ctrl_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301360 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1361 if (ret)
1362 return ret;
1363 pmic->current_reg_mode[id] = reg &
1364 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menonb6328152014-06-30 10:57:39 -05001365 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1366 rinfo->ctrl_addr);
1367 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1368 /* set_mode overrides this value */
1369 desc->enable_val = SMPS_CTRL_MODE_ON;
Keerthyd6f83372014-06-18 15:29:00 +05301370
Nishanth Menon429222d2014-06-30 10:57:38 -05001371 desc->type = REGULATOR_VOLTAGE;
1372 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +05301373
1374 if (pdata)
1375 config.init_data = pdata->reg_data[id];
1376 else
1377 config.init_data = NULL;
1378
Nishanth Menon429222d2014-06-30 10:57:38 -05001379 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301380 config.of_node = ddata->palmas_matches[id].of_node;
1381
Nishanth Menon429222d2014-06-30 10:57:38 -05001382 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301383 if (IS_ERR(rdev)) {
1384 dev_err(pmic->dev,
1385 "failed to register %s regulator\n",
1386 pdev_name);
1387 return PTR_ERR(rdev);
1388 }
1389
1390 /* Save regulator for cleanup */
1391 pmic->rdev[id] = rdev;
1392 }
1393
1394 return 0;
1395}
1396
Keerthycac9e912014-06-18 15:28:59 +05301397static struct of_regulator_match palmas_matches[] = {
1398 { .name = "smps12", },
1399 { .name = "smps123", },
1400 { .name = "smps3", },
1401 { .name = "smps45", },
1402 { .name = "smps457", },
1403 { .name = "smps6", },
1404 { .name = "smps7", },
1405 { .name = "smps8", },
1406 { .name = "smps9", },
1407 { .name = "smps10_out2", },
1408 { .name = "smps10_out1", },
1409 { .name = "ldo1", },
1410 { .name = "ldo2", },
1411 { .name = "ldo3", },
1412 { .name = "ldo4", },
1413 { .name = "ldo5", },
1414 { .name = "ldo6", },
1415 { .name = "ldo7", },
1416 { .name = "ldo8", },
1417 { .name = "ldo9", },
1418 { .name = "ldoln", },
1419 { .name = "ldousb", },
1420 { .name = "regen1", },
1421 { .name = "regen2", },
1422 { .name = "regen3", },
1423 { .name = "sysen1", },
1424 { .name = "sysen2", },
1425};
1426
Keerthyd6f83372014-06-18 15:29:00 +05301427static struct of_regulator_match tps65917_matches[] = {
1428 { .name = "smps1", },
1429 { .name = "smps2", },
1430 { .name = "smps3", },
1431 { .name = "smps4", },
1432 { .name = "smps5", },
1433 { .name = "ldo1", },
1434 { .name = "ldo2", },
1435 { .name = "ldo3", },
1436 { .name = "ldo4", },
1437 { .name = "ldo5", },
1438 { .name = "regen1", },
1439 { .name = "regen2", },
1440 { .name = "regen3", },
1441 { .name = "sysen1", },
1442 { .name = "sysen2", },
1443};
1444
Nishanth Menon4b09e172014-06-30 10:57:34 -05001445static struct palmas_pmic_driver_data palmas_ddata = {
Keerthycac9e912014-06-18 15:28:59 +05301446 .smps_start = PALMAS_REG_SMPS12,
1447 .smps_end = PALMAS_REG_SMPS10_OUT1,
1448 .ldo_begin = PALMAS_REG_LDO1,
1449 .ldo_end = PALMAS_REG_LDOUSB,
1450 .max_reg = PALMAS_NUM_REGS,
Keerthye999c722015-03-17 15:56:05 +05301451 .has_regen3 = true,
Nishanth Menon6839cd62014-06-30 10:57:37 -05001452 .palmas_regs_info = palmas_generic_regs_info,
Keerthycac9e912014-06-18 15:28:59 +05301453 .palmas_matches = palmas_matches,
1454 .sleep_req_info = palma_sleep_req_info,
1455 .smps_register = palmas_smps_registration,
1456 .ldo_register = palmas_ldo_registration,
1457};
1458
Nishanth Menon4b09e172014-06-30 10:57:34 -05001459static struct palmas_pmic_driver_data tps65917_ddata = {
Keerthyd6f83372014-06-18 15:29:00 +05301460 .smps_start = TPS65917_REG_SMPS1,
1461 .smps_end = TPS65917_REG_SMPS5,
1462 .ldo_begin = TPS65917_REG_LDO1,
1463 .ldo_end = TPS65917_REG_LDO5,
1464 .max_reg = TPS65917_NUM_REGS,
Keerthye999c722015-03-17 15:56:05 +05301465 .has_regen3 = true,
Keerthyd6f83372014-06-18 15:29:00 +05301466 .palmas_regs_info = tps65917_regs_info,
1467 .palmas_matches = tps65917_matches,
1468 .sleep_req_info = tps65917_sleep_req_info,
1469 .smps_register = tps65917_smps_registration,
1470 .ldo_register = tps65917_ldo_registration,
1471};
1472
Nishanth Menon7f091e52016-05-05 19:29:51 -05001473static int palmas_dt_to_pdata(struct device *dev,
1474 struct device_node *node,
1475 struct palmas_pmic_platform_data *pdata,
1476 struct palmas_pmic_driver_data *ddata)
Keerthycac9e912014-06-18 15:28:59 +05301477{
1478 struct device_node *regulators;
1479 u32 prop;
1480 int idx, ret;
1481
Keerthycac9e912014-06-18 15:28:59 +05301482 regulators = of_get_child_by_name(node, "regulators");
1483 if (!regulators) {
1484 dev_info(dev, "regulator node not found\n");
Nishanth Menon7f091e52016-05-05 19:29:51 -05001485 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301486 }
1487
1488 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1489 ddata->max_reg);
1490 of_node_put(regulators);
1491 if (ret < 0) {
1492 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
Nishanth Menon7f091e52016-05-05 19:29:51 -05001493 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301494 }
1495
1496 for (idx = 0; idx < ddata->max_reg; idx++) {
Nishanth Menon036d1932016-05-05 19:29:49 -05001497 static struct of_regulator_match *match;
Nishanth Menon1b424432016-05-05 19:29:50 -05001498 struct palmas_reg_init *rinit;
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001499 struct device_node *np;
Nishanth Menon036d1932016-05-05 19:29:49 -05001500
1501 match = &ddata->palmas_matches[idx];
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001502 np = match->of_node;
Nishanth Menon036d1932016-05-05 19:29:49 -05001503
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001504 if (!match->init_data || !np)
Keerthycac9e912014-06-18 15:28:59 +05301505 continue;
1506
Nishanth Menon1b424432016-05-05 19:29:50 -05001507 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
Nishanth Menon7f091e52016-05-05 19:29:51 -05001508 if (!rinit)
1509 return -ENOMEM;
1510
Nishanth Menon036d1932016-05-05 19:29:49 -05001511 pdata->reg_data[idx] = match->init_data;
Nishanth Menon1b424432016-05-05 19:29:50 -05001512 pdata->reg_init[idx] = rinit;
Keerthycac9e912014-06-18 15:28:59 +05301513
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001514 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1515 ret = of_property_read_u32(np, "ti,roof-floor", &prop);
Keerthycac9e912014-06-18 15:28:59 +05301516 /* EINVAL: Property not found */
1517 if (ret != -EINVAL) {
1518 int econtrol;
1519
1520 /* use default value, when no value is specified */
1521 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1522 if (!ret) {
1523 switch (prop) {
1524 case 1:
1525 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1526 break;
1527 case 2:
1528 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1529 break;
1530 case 3:
1531 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1532 break;
1533 default:
1534 WARN_ON(1);
1535 dev_warn(dev,
1536 "%s: Invalid roof-floor option: %u\n",
Nishanth Menon036d1932016-05-05 19:29:49 -05001537 match->name, prop);
Keerthycac9e912014-06-18 15:28:59 +05301538 break;
1539 }
1540 }
Nishanth Menon1b424432016-05-05 19:29:50 -05001541 rinit->roof_floor = econtrol;
Keerthycac9e912014-06-18 15:28:59 +05301542 }
1543
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001544 ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
Keerthycac9e912014-06-18 15:28:59 +05301545 if (!ret)
Nishanth Menon1b424432016-05-05 19:29:50 -05001546 rinit->mode_sleep = prop;
Keerthycac9e912014-06-18 15:28:59 +05301547
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001548 ret = of_property_read_bool(np, "ti,smps-range");
Keerthycac9e912014-06-18 15:28:59 +05301549 if (ret)
Nishanth Menon1b424432016-05-05 19:29:50 -05001550 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
Keerthycac9e912014-06-18 15:28:59 +05301551
1552 if (idx == PALMAS_REG_LDO8)
1553 pdata->enable_ldo8_tracking = of_property_read_bool(
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001554 np, "ti,enable-ldo8-tracking");
Keerthycac9e912014-06-18 15:28:59 +05301555 }
1556
1557 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
Nishanth Menon7f091e52016-05-05 19:29:51 -05001558
1559 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301560}
1561
Fabian Frederickcdbf6f02015-03-16 20:17:08 +01001562static const struct of_device_id of_palmas_match_tbl[] = {
Keerthycac9e912014-06-18 15:28:59 +05301563 {
1564 .compatible = "ti,palmas-pmic",
1565 .data = &palmas_ddata,
1566 },
1567 {
1568 .compatible = "ti,twl6035-pmic",
1569 .data = &palmas_ddata,
1570 },
1571 {
1572 .compatible = "ti,twl6036-pmic",
1573 .data = &palmas_ddata,
1574 },
1575 {
1576 .compatible = "ti,twl6037-pmic",
1577 .data = &palmas_ddata,
1578 },
1579 {
1580 .compatible = "ti,tps65913-pmic",
1581 .data = &palmas_ddata,
1582 },
1583 {
1584 .compatible = "ti,tps65914-pmic",
1585 .data = &palmas_ddata,
1586 },
1587 {
1588 .compatible = "ti,tps80036-pmic",
1589 .data = &palmas_ddata,
1590 },
1591 {
1592 .compatible = "ti,tps659038-pmic",
1593 .data = &palmas_ddata,
1594 },
Keerthyd6f83372014-06-18 15:29:00 +05301595 {
1596 .compatible = "ti,tps65917-pmic",
1597 .data = &tps65917_ddata,
1598 },
Graeme Gregorya361cd92012-08-28 13:47:40 +02001599 { /* end */ }
1600};
1601
Keerthycac9e912014-06-18 15:28:59 +05301602static int palmas_regulators_probe(struct platform_device *pdev)
1603{
1604 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1605 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1606 struct device_node *node = pdev->dev.of_node;
1607 struct palmas_pmic_driver_data *driver_data;
1608 struct regulator_config config = { };
1609 struct palmas_pmic *pmic;
1610 const char *pdev_name;
1611 const struct of_device_id *match;
1612 int ret = 0;
1613 unsigned int reg;
1614
1615 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1616
1617 if (!match)
1618 return -ENODATA;
1619
1620 driver_data = (struct palmas_pmic_driver_data *)match->data;
1621 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1622 if (!pdata)
1623 return -ENOMEM;
1624
1625 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1626 if (!pmic)
1627 return -ENOMEM;
1628
Keerthye999c722015-03-17 15:56:05 +05301629 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
Keerthye03826d2015-03-17 15:56:04 +05301630 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1631 TPS659038_REGEN2_CTRL;
Keerthye999c722015-03-17 15:56:05 +05301632 palmas_ddata.has_regen3 = false;
1633 }
Keerthye03826d2015-03-17 15:56:04 +05301634
Keerthycac9e912014-06-18 15:28:59 +05301635 pmic->dev = &pdev->dev;
1636 pmic->palmas = palmas;
1637 palmas->pmic = pmic;
1638 platform_set_drvdata(pdev, pmic);
1639 pmic->palmas->pmic_ddata = driver_data;
1640
Nishanth Menon7f091e52016-05-05 19:29:51 -05001641 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1642 if (ret)
1643 return ret;
Keerthycac9e912014-06-18 15:28:59 +05301644
1645 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
1646 if (ret)
1647 return ret;
1648
1649 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
1650 pmic->smps123 = 1;
1651
1652 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1653 pmic->smps457 = 1;
1654
1655 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1656 config.dev = &pdev->dev;
1657 config.driver_data = pmic;
1658 pdev_name = pdev->name;
1659
1660 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1661 config);
1662 if (ret)
1663 return ret;
1664
1665 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1666 config);
1667
1668 return ret;
1669}
1670
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001671static struct platform_driver palmas_driver = {
1672 .driver = {
1673 .name = "palmas-pmic",
Graeme Gregorya361cd92012-08-28 13:47:40 +02001674 .of_match_table = of_palmas_match_tbl,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001675 },
Laxman Dewanganbbcf50b2013-03-18 14:59:49 +05301676 .probe = palmas_regulators_probe,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001677};
1678
1679static int __init palmas_init(void)
1680{
1681 return platform_driver_register(&palmas_driver);
1682}
1683subsys_initcall(palmas_init);
1684
1685static void __exit palmas_exit(void)
1686{
1687 platform_driver_unregister(&palmas_driver);
1688}
1689module_exit(palmas_exit);
1690
1691MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1692MODULE_DESCRIPTION("Palmas voltage regulator driver");
1693MODULE_LICENSE("GPL");
1694MODULE_ALIAS("platform:palmas-pmic");
Graeme Gregorya361cd92012-08-28 13:47:40 +02001695MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);