Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 1 | |
Christoph Hellwig | d824e66 | 2006-04-10 22:54:04 -0700 | [diff] [blame] | 2 | #include <linux/irq.h> |
Yinghai Lu | 57b150c | 2009-04-27 17:59:53 -0700 | [diff] [blame] | 3 | #include <linux/interrupt.h> |
| 4 | |
| 5 | #include "internals.h" |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 6 | |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 7 | void irq_move_masked_irq(struct irq_data *idata) |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 8 | { |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 9 | struct irq_desc *desc = irq_data_to_desc(idata); |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 10 | struct irq_data *data = &desc->irq_data; |
| 11 | struct irq_chip *chip = data->chip; |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 12 | |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 13 | if (likely(!irqd_is_setaffinity_pending(data))) |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 14 | return; |
| 15 | |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 16 | irqd_clr_move_pending(data); |
Thomas Gleixner | a614a61 | 2015-06-20 12:05:40 +0200 | [diff] [blame] | 17 | |
Bryan Holty | 501f249 | 2006-03-25 03:07:37 -0800 | [diff] [blame] | 18 | /* |
| 19 | * Paranoia: cpu-local interrupts shouldn't be calling in here anyway. |
| 20 | */ |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 21 | if (irqd_is_per_cpu(data)) { |
Bryan Holty | 501f249 | 2006-03-25 03:07:37 -0800 | [diff] [blame] | 22 | WARN_ON(1); |
| 23 | return; |
| 24 | } |
| 25 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 26 | if (unlikely(cpumask_empty(desc->pending_mask))) |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 27 | return; |
| 28 | |
Thomas Gleixner | c96b3b3 | 2010-09-27 12:45:41 +0000 | [diff] [blame] | 29 | if (!chip->irq_set_affinity) |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 30 | return; |
| 31 | |
Thomas Gleixner | 239007b | 2009-11-17 16:46:45 +0100 | [diff] [blame] | 32 | assert_raw_spin_locked(&desc->lock); |
Bryan Holty | 501f249 | 2006-03-25 03:07:37 -0800 | [diff] [blame] | 33 | |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 34 | /* |
| 35 | * If there was a valid mask to work with, please |
| 36 | * do the disable, re-program, enable sequence. |
| 37 | * This is *not* particularly important for level triggered |
| 38 | * but in a edge trigger case, we might be setting rte |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 39 | * when an active trigger is coming in. This could |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 40 | * cause some ioapics to mal-function. |
| 41 | * Being paranoid i guess! |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 42 | * |
| 43 | * For correct operation this depends on the caller |
| 44 | * masking the irqs. |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 45 | */ |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 46 | if (cpumask_any_and(desc->pending_mask, cpu_online_mask) < nr_cpu_ids) { |
| 47 | int ret; |
Yinghai Lu | 57b150c | 2009-04-27 17:59:53 -0700 | [diff] [blame] | 48 | |
Thomas Gleixner | 6e3885a | 2018-06-04 17:33:54 +0200 | [diff] [blame] | 49 | ret = irq_do_set_affinity(data, desc->pending_mask, false); |
| 50 | /* |
| 51 | * If the there is a cleanup pending in the underlying |
| 52 | * vector management, reschedule the move for the next |
| 53 | * interrupt. Leave desc->pending_mask intact. |
| 54 | */ |
| 55 | if (ret == -EBUSY) { |
| 56 | irqd_set_move_pending(data); |
| 57 | return; |
| 58 | } |
| 59 | } |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 60 | cpumask_clear(desc->pending_mask); |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 61 | } |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 62 | |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 63 | void irq_move_irq(struct irq_data *idata) |
| 64 | { |
Thomas Gleixner | f1a0639 | 2011-01-28 08:47:15 +0100 | [diff] [blame] | 65 | bool masked; |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 66 | |
Jiang Liu | 77ed42f | 2015-06-01 16:05:11 +0800 | [diff] [blame] | 67 | /* |
| 68 | * Get top level irq_data when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled, |
| 69 | * and it should be optimized away when CONFIG_IRQ_DOMAIN_HIERARCHY is |
| 70 | * disabled. So we avoid an "#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY" here. |
| 71 | */ |
| 72 | idata = irq_desc_get_irq_data(irq_data_to_desc(idata)); |
| 73 | |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 74 | if (likely(!irqd_is_setaffinity_pending(idata))) |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 75 | return; |
| 76 | |
Thomas Gleixner | 32f4125 | 2011-03-28 14:10:52 +0200 | [diff] [blame] | 77 | if (unlikely(irqd_irq_disabled(idata))) |
Eric W. Biederman | 2a786b4 | 2007-02-23 04:46:20 -0700 | [diff] [blame] | 78 | return; |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 79 | |
Thomas Gleixner | f1a0639 | 2011-01-28 08:47:15 +0100 | [diff] [blame] | 80 | /* |
| 81 | * Be careful vs. already masked interrupts. If this is a |
| 82 | * threaded interrupt with ONESHOT set, we can end up with an |
| 83 | * interrupt storm. |
| 84 | */ |
Thomas Gleixner | 32f4125 | 2011-03-28 14:10:52 +0200 | [diff] [blame] | 85 | masked = irqd_irq_masked(idata); |
Thomas Gleixner | f1a0639 | 2011-01-28 08:47:15 +0100 | [diff] [blame] | 86 | if (!masked) |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 87 | idata->chip->irq_mask(idata); |
| 88 | irq_move_masked_irq(idata); |
Thomas Gleixner | f1a0639 | 2011-01-28 08:47:15 +0100 | [diff] [blame] | 89 | if (!masked) |
Thomas Gleixner | a439520 | 2011-02-04 18:46:16 +0100 | [diff] [blame] | 90 | idata->chip->irq_unmask(idata); |
| 91 | } |