blob: ec7c7eda0774a3fab9f6fc900256c9053ef3c6f4 [file] [log] [blame]
Andrew Mortonc777ac52006-03-25 03:07:36 -08001
Christoph Hellwigd824e662006-04-10 22:54:04 -07002#include <linux/irq.h>
Yinghai Lu57b150c2009-04-27 17:59:53 -07003#include <linux/interrupt.h>
4
5#include "internals.h"
Andrew Mortonc777ac52006-03-25 03:07:36 -08006
Thomas Gleixnera4395202011-02-04 18:46:16 +01007void irq_move_masked_irq(struct irq_data *idata)
Andrew Mortonc777ac52006-03-25 03:07:36 -08008{
Thomas Gleixnera4395202011-02-04 18:46:16 +01009 struct irq_desc *desc = irq_data_to_desc(idata);
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020010 struct irq_data *data = &desc->irq_data;
11 struct irq_chip *chip = data->chip;
Andrew Mortonc777ac52006-03-25 03:07:36 -080012
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020013 if (likely(!irqd_is_setaffinity_pending(data)))
Andrew Mortonc777ac52006-03-25 03:07:36 -080014 return;
15
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020016 irqd_clr_move_pending(data);
Thomas Gleixnera614a612015-06-20 12:05:40 +020017
Bryan Holty501f2492006-03-25 03:07:37 -080018 /*
19 * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
20 */
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020021 if (irqd_is_per_cpu(data)) {
Bryan Holty501f2492006-03-25 03:07:37 -080022 WARN_ON(1);
23 return;
24 }
25
Mike Travis7f7ace02009-01-10 21:58:08 -080026 if (unlikely(cpumask_empty(desc->pending_mask)))
Andrew Mortonc777ac52006-03-25 03:07:36 -080027 return;
28
Thomas Gleixnerc96b3b32010-09-27 12:45:41 +000029 if (!chip->irq_set_affinity)
Andrew Mortonc777ac52006-03-25 03:07:36 -080030 return;
31
Thomas Gleixner239007b2009-11-17 16:46:45 +010032 assert_raw_spin_locked(&desc->lock);
Bryan Holty501f2492006-03-25 03:07:37 -080033
Andrew Mortonc777ac52006-03-25 03:07:36 -080034 /*
35 * If there was a valid mask to work with, please
36 * do the disable, re-program, enable sequence.
37 * This is *not* particularly important for level triggered
38 * but in a edge trigger case, we might be setting rte
Lucas De Marchi25985ed2011-03-30 22:57:33 -030039 * when an active trigger is coming in. This could
Andrew Mortonc777ac52006-03-25 03:07:36 -080040 * cause some ioapics to mal-function.
41 * Being paranoid i guess!
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070042 *
43 * For correct operation this depends on the caller
44 * masking the irqs.
Andrew Mortonc777ac52006-03-25 03:07:36 -080045 */
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020046 if (cpumask_any_and(desc->pending_mask, cpu_online_mask) < nr_cpu_ids) {
47 int ret;
Yinghai Lu57b150c2009-04-27 17:59:53 -070048
Thomas Gleixner6e3885a2018-06-04 17:33:54 +020049 ret = irq_do_set_affinity(data, desc->pending_mask, false);
50 /*
51 * If the there is a cleanup pending in the underlying
52 * vector management, reschedule the move for the next
53 * interrupt. Leave desc->pending_mask intact.
54 */
55 if (ret == -EBUSY) {
56 irqd_set_move_pending(data);
57 return;
58 }
59 }
Mike Travis7f7ace02009-01-10 21:58:08 -080060 cpumask_clear(desc->pending_mask);
Andrew Mortonc777ac52006-03-25 03:07:36 -080061}
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070062
Thomas Gleixnera4395202011-02-04 18:46:16 +010063void irq_move_irq(struct irq_data *idata)
64{
Thomas Gleixnerf1a06392011-01-28 08:47:15 +010065 bool masked;
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070066
Jiang Liu77ed42f2015-06-01 16:05:11 +080067 /*
68 * Get top level irq_data when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled,
69 * and it should be optimized away when CONFIG_IRQ_DOMAIN_HIERARCHY is
70 * disabled. So we avoid an "#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY" here.
71 */
72 idata = irq_desc_get_irq_data(irq_data_to_desc(idata));
73
Thomas Gleixnera4395202011-02-04 18:46:16 +010074 if (likely(!irqd_is_setaffinity_pending(idata)))
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070075 return;
76
Thomas Gleixner32f41252011-03-28 14:10:52 +020077 if (unlikely(irqd_irq_disabled(idata)))
Eric W. Biederman2a786b42007-02-23 04:46:20 -070078 return;
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070079
Thomas Gleixnerf1a06392011-01-28 08:47:15 +010080 /*
81 * Be careful vs. already masked interrupts. If this is a
82 * threaded interrupt with ONESHOT set, we can end up with an
83 * interrupt storm.
84 */
Thomas Gleixner32f41252011-03-28 14:10:52 +020085 masked = irqd_irq_masked(idata);
Thomas Gleixnerf1a06392011-01-28 08:47:15 +010086 if (!masked)
Thomas Gleixnera4395202011-02-04 18:46:16 +010087 idata->chip->irq_mask(idata);
88 irq_move_masked_irq(idata);
Thomas Gleixnerf1a06392011-01-28 08:47:15 +010089 if (!masked)
Thomas Gleixnera4395202011-02-04 18:46:16 +010090 idata->chip->irq_unmask(idata);
91}