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gerrit-public.fairphone.software / kernel / msm-4.9 / 30142273a3e83936fd7b45aa5339311a9295ca51
  1. 3014227 drm/i915: Add CHV PHY LDO power sanity checks by Ville Syrjälä · 9 years ago
  2. 6669e39 drm/i915: Add some CHV DPIO lane power state asserts by Ville Syrjälä · 9 years ago
  3. a8f327f drm/i915: Clean up CHV lane soft reset programming by Ville Syrjälä · 9 years ago
  4. 2bbe6bb drm/i915: Bump command parser version number. by Francisco Jerez · 9 years ago
  5. caa860d drm/i915/dp: use the drm dp helper for determining sink tps3 support by Jani Nikula · 9 years ago
  6. 7cc53cf drm/dp: add drm_dp_tps3_supported helper by Jani Nikula · 9 years ago
  7. 01302d4 drm/i915: Update DRIVER_DATE to 20150828 by Daniel Vetter · 9 years ago
  8. c5b852f Partially revert "drm/i915: Use full atomic modeset." by Maarten Lankhorst · 9 years ago
  9. 6c908bf drm/i915: gen 9 can check for unclaimed registers too by Paulo Zanoni · 9 years ago
  10. 3e28878 drm/i915: Force CL2 off in CHV x1 PHY by Ville Syrjälä · 9 years ago
  11. ee27921 drm/i915: Enable DPIO SUS clock gating on CHV by Ville Syrjälä · 9 years ago
  12. 0047eed drm/i915: Force common lane on for the PPS kick on CHV by Ville Syrjälä · 9 years ago
  13. b0b3384 drm/i915: Trick CL2 into life on CHV when using pipe B with port B by Ville Syrjälä · 9 years ago
  14. e0fce78 drm/i915: Implement PHY lane power gating for CHV by Ville Syrjälä · 9 years ago
  15. 5a8fbb7 drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enable by Ville Syrjälä · 9 years ago
  16. 4d9194d drm/i915: Make some string arrays const by Ville Syrjälä · 9 years ago
  17. 53abb67 drm/i915: Use ARRAY_SIZE() instead of hand rolling it by Ville Syrjälä · 9 years ago
  18. 0a0b457 drm/i915: Fix some gcc warnings by Ville Syrjälä · 9 years ago
  19. e464bfd drm/i915/bxt: Use correct live status register for BXT platform by Jani Nikula · 9 years ago
  20. 9642c81 drm/i915: split g4x_digital_port_connected to g4x and vlv variants by Jani Nikula · 9 years ago
  21. 0df53b7 drm/i915: split ibx_digital_port_connected to ibx and cpt variants by Jani Nikula · 9 years ago
  22. 7e66bcf drm/i915: add common intel_digital_port_connected function by Jani Nikula · 9 years ago
  23. 196cabd drm/i915: add MISSING_CASE annotation to ibx_digital_port_connected by Jani Nikula · 9 years ago
  24. 1d24598 drm/i915: make g4x_digital_port_connected return boolean status by Jani Nikula · 9 years ago
  25. b93433c drm/i915: move ibx_digital_port_connected to intel_dp.c by Jani Nikula · 9 years ago
  26. 26a9155 drm/i915: DVO pixel clock check by Mika Kahola · 9 years ago
  27. 759a1e9 drm/i915: DSI pixel clock check by Mika Kahola · 9 years ago
  28. 7f7b58c drm/i915: LVDS pixel clock check by Mika Kahola · 9 years ago
  29. adafdc6 drm/i915: Store max dotclock by Mika Kahola · 9 years ago
  30. 65d64cc drm/i915: Add vlv_dport_to_phy() by Ville Syrjälä · 9 years ago
  31. c0b4c66 drm/i915: Move VLV/CHV prepare_pll later by Ville Syrjälä · 9 years ago
  32. 770effb drm/i915: Add locking around chv_phy_control_init() by Ville Syrjälä · 9 years ago
  33. e27f299 drm/i915: Move DPIO port init earlier by Ville Syrjälä · 9 years ago
  34. d6db995 drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer disables there by Ville Syrjälä · 9 years ago
  35. 67fa24b drm/i915: Always program unique transition scale for CHV by Ville Syrjälä · 9 years ago
  36. 25a25df drm/i915: Always program m2 fractional value on CHV by Ville Syrjälä · 9 years ago
  37. 4eee492 drm/i915: fix driver's versions of WARN_ON & WARN_ON_ONCE by Dave Gordon · 9 years ago
  38. 901c2da drm/i915: Put back lane_count into intel_dp and add link_rate too by Ville Syrjälä · 9 years ago
  39. e5756c1 drm/i915/bxt: don't allow cached GEM mappings on A stepping by Imre Deak · 9 years ago
  40. 319404d drm/i915/bxt: work around HW coherency issue when accessing GPU seqno by Imre Deak · 9 years ago
  41. 8be6ca8 drm/i915: Also call frontbuffer flip when disabling planes. by Rodrigo Vivi · 9 years ago
  42. f1afe24 drm/i915: Change SRM, LRM instructions to use correct length by Arun Siluvery · 9 years ago
  43. cff4f55 doc: drm: Fix mis-spelling of i915_guc_submission includes by Graham Whaley · 9 years ago
  44. 66e2806 drm/i915: remove excessive scaler debugging messages by Jani Nikula · 9 years ago
  45. 8b417c2 drm/i915: Debugfs interface for GuC submission statistics by Dave Gordon · 9 years ago
  46. d167519 drm/i915: Integrate GuC-based command submission by Alex Dai · 9 years ago
  47. 4df001d drm/i915: Interrupt routing for GuC submission by Dave Gordon · 9 years ago
  48. 44a28b1 drm/i915: Implementation of GuC submission client by Dave Gordon · 9 years ago
  49. 4c7e77f drm/i915: Enable GuC firmware log by Alex Dai · 9 years ago
  50. bac427f drm/i915: Prepare for GuC-based command submission by Alex Dai · 9 years ago
  51. 919f1f5 drm/i915: Expose one LRC function for GuC submission mode by Dave Gordon · 9 years ago
  52. fdf5d35 drm/i915: Debugfs interface to read GuC load status by Alex Dai · 9 years ago
  53. 33a732f drm/i915: GuC-specific firmware loader by Alex Dai · 9 years ago
  54. 04a60f9 drm/i915: Kill intel_dp->{link_bw, rate_select} by Ville Syrjälä · 9 years ago
  55. a79b816 drm/i915: Don't use link_bw to select between TP1 and TP3 by Ville Syrjälä · 9 years ago
  56. 90a6b7b drm/i915: Move intel_dp->lane_count into pipe_config by Ville Syrjälä · 9 years ago
  57. b81e34c drm/i915: Avoid confusion between DP and TRANS_DP_CTL in DP .get_config() by Ville Syrjälä · 9 years ago
  58. 96f3f1f drm/i915: Don't pass clock to DDI PLL select functions by Ville Syrjälä · 9 years ago
  59. 840b32b drm/i915: Don't use link_bw for PLL setup by Ville Syrjälä · 9 years ago
  60. 0f2a2a7 drm/i915: Clean up DP/HDMI limited color range handling by Ville Syrjälä · 9 years ago
  61. 908565c drm/i915: Do not check or a stalled pageflip prior to it being queued by Chris Wilson · 9 years ago
  62. ed75a55 drm/i915: clflush on pin_to_display after pwrite to UC bo in LLC by Ville Syrjälä · 9 years ago
  63. cf1d588 drm/i915/bxt: WA for swapped HPD pins in A stepping by Sonika Jindal · 9 years ago
  64. 7f3561b drm/i915/bxt: Add HPD support for DDIA by Sonika Jindal · 9 years ago
  65. 25f5033 drm/i915: Always pass dev pointer in pdp_init by Michel Thierry · 9 years ago
  66. f365f91 drm/i915: Use complete virtual address range on 32-bit platforms by Michel Thierry · 9 years ago
  67. 088e0df drm/i915/gtt: Allow >= 4GB offsets in X86_32 by Michel Thierry · 9 years ago
  68. aabc95d drm/i915: Dont -ETIMEDOUT on identical new and previous (count, crc). by Rodrigo Vivi · 9 years ago
  69. 621d4c7 drm/i915: Save latest known sink CRC to compensate delayed counter reset. by Rodrigo Vivi · 9 years ago
  70. e5a1cab drm/i915: Force sink crc stop before start. by Rodrigo Vivi · 9 years ago
  71. c6d576c drm/i915/userptr: Kill user_size limit check by Michel Thierry · 9 years ago
  72. af98714 drm/i915: batch_obj vm offset must be u64 by Michel Thierry · 9 years ago
  73. 65bd342 drm/i915: object size needs to be u64 by Michel Thierry · 9 years ago
  74. ea91e40 drm/i915/gen8: Add ppgtt info and debug_dump by Michel Thierry · 9 years ago
  75. e1f1232 drm/i915: Expand error state's address width to 64b by Michel Thierry · 9 years ago
  76. 69ab76f drm/i915/gen8: Initialize PDPs and PML4 by Michel Thierry · 9 years ago
  77. de5ba8e drm/i915/gen8: Add 4 level support in insert_entries and clear_range by Michel Thierry · 9 years ago
  78. 3387d43 drm/i915/gen8: Pass sg_iter through pte inserts by Michel Thierry · 9 years ago
  79. 2dba323 drm/i915/gen8: Add 4 level switching infrastructure and lrc support by Michel Thierry · 9 years ago
  80. 762d993 drm/i915/gen8: implement alloc/free for 4lvl by Michel Thierry · 9 years ago
  81. 81ba8aef drm/i915/gen8: Add PML4 structure by Michel Thierry · 9 years ago
  82. 4c06ec8 drm/i915/gen8: Add dynamic page trace events by Michel Thierry · 9 years ago
  83. f9b5b78 drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT by Michel Thierry · 9 years ago
  84. d4ec9da drm/i915/gen8: Abstract PDP usage by Michel Thierry · 9 years ago
  85. 6ac1850 drm/i915/gen8: Make pdp allocation more dynamic by Michel Thierry · 9 years ago
  86. 09120d4 drm/i915: Remove unnecessary gen8_clamp_pd by Michel Thierry · 9 years ago
  87. 75067dd drm/i915: Per-DDI I_boost override by Antti Koskipaa · 9 years ago
  88. 622147f Merge tag 'drm-intel-fixes-2015-08-14' into drm-intel-next-fixes by Daniel Vetter · 9 years ago
  89. 5a2376d drm/i915/skl: WaIgnoreDDIAStrap is forever, always init DDI A by Jani Nikula · 9 years ago
  90. f79b468e drm/i915: fix checksum write for automated test reply by Thulasimani,Sivakumar · 9 years ago
  91. ca5a0fb drm/i915: Contain the WA_REG macro by Mika Kuoppala · 9 years ago
  92. 37876df drm/i915: Remove the failed context from the fpriv->context_idr by Chris Wilson · 9 years ago
  93. eb5be9d drm/i915: Report IOMMU enabled status for GPU hangs by Chris Wilson · 9 years ago
  94. 031a893 drm/i915: Check idle to active before processing CSQ by Mika Kuoppala · 9 years ago
  95. 500ea70 drm/i915: Set alternate aux for DDI-E by Rodrigo Vivi · 9 years ago
  96. a513e3d drm/i915: Set power domain for DDI-E by Rodrigo Vivi · 9 years ago
  97. 3774eb5 drm/i915: fix stolen bios_reserved checks by Paulo Zanoni · 9 years ago
  98. cc53699 drm/i915: Use masked write for Context Status Buffer Pointer by Mika Kuoppala · 9 years ago
  99. 9bd9dfb drm/i915/skl WaDisableSbeCacheDispatchPortSharing by Mika Kuoppala · 9 years ago
  100. 02196c7 drm/i915: Spam less on dp aux send/receive problems by Mika Kuoppala · 9 years ago