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gerrit-public.fairphone.software / kernel / msm-4.9 / 6edaa7fcf287b92fb231a9e23cd6b5b0fc3dddb2 / drivers / gpu / drm / i915 / i915_reg.h
  1. 6edaa7f drm/i915: add TDL unit clock gating disable for VLV by Jesse Barnes · 12 years ago
  2. 0f846f8 drm/i915: disable RCBP and VDS unit clock gating on SNB and VLV by Jesse Barnes · 12 years ago
  3. cc0f639 drm/i915: PIPE_CONTROL_TLB_INVALIDATE by Ben Widawsky · 12 years ago
  4. e37ec39 drm/i915: Ivybridge MI_ARB_ON_OFF context w/a by Ben Widawsky · 12 years ago
  5. fe1cc68 drm/i915: CXT_SIZE register offsets added by Ben Widawsky · 12 years ago
  6. 7cf4160 drm/i915: clear up backlight #define confusion on gen4+ by Daniel Vetter · 12 years ago
  7. 534b5a5 drm/i915: pnv has a backlight polarity control bit, too by Daniel Vetter · 12 years ago
  8. b9524a1 drm/i915: remap l3 on hw init by Ben Widawsky · 12 years ago
  9. e368919 drm/i915: Dynamic Parity Detection handling by Ben Widawsky · 12 years ago
  10. 0dd87d2 drm/i915: explicitly disable the DIPs we're not using by Paulo Zanoni · 12 years ago
  11. 084b612 drm/i915: SDVO hotplug have different interrupt status bits for i915/i965/g4x by Chris Wilson · 12 years ago
  12. 10f76a3 drm/i915: Inspect the right status bits for DP/HDMI hotplug on gen4 by Chris Wilson · 12 years ago
  13. 2da8af5 drm/i915: implement hsw_write_infoframe by Paulo Zanoni · 12 years ago
  14. 8c5f5f7 drm/i915: add new Haswell DIP controls registers by Eugeni Dodonov · 12 years ago
  15. 4e89ee1 drm/i915: set the DIP port on ibx_write_infoframe by Paulo Zanoni · 13 years ago
  16. 60c5ea2 drm/i915: mask the video DIP frequency when changing it by Paulo Zanoni · 13 years ago
  17. 3e6e639 drm/i915: mask the video DIP port select by Paulo Zanoni · 13 years ago
  18. 837ba00 drm/i915: DSL_LINEMASK is 12 bits only on gen2 by Paulo Zanoni · 13 years ago
  19. b615b57 drm/i915: Support pageflipping interrupts for all 3-pipes on IVB by Chris Wilson · 13 years ago
  20. 5ccce18 drm/i915: also reset the media engine on gen4/5 by Daniel Vetter · 13 years ago
  21. 5074329 drm/i915: use the new masked bit macro some more by Daniel Vetter · 13 years ago
  22. 6b26c86 drm/i915: create macros to handle masked bits by Daniel Vetter · 13 years ago
  23. ee7b9f9 drm/i915: manage PCH PLLs separately from pipes by Jesse Barnes · 13 years ago
  24. a1e969e drm/i915: [GEN7] Use HW scheduler for fixed function shaders by Ben Widawsky · 13 years ago
  25. 65f5687 drm/i915: Replace open coded MI_BATCH_GTT by Chris Wilson · 13 years ago
  26. 446f254 drm/i915: Mask reserved bits in display/sprite address registers by Armin Reese · 13 years ago
  27. ef4d084 drm/i915: add WRPLL divider programming bits by Eugeni Dodonov · 13 years ago
  28. dc04a61 drm/i915: add definition of LPT FDI port width registers by Eugeni Dodonov · 13 years ago
  29. 009be66 drm/i915: set stc evict disable lra evict w/a by Daniel Vetter · 13 years ago
  30. bf97b27 drm/i915: implement w/a for incorrect guarband clipping by Daniel Vetter · 13 years ago
  31. 48ecfa1 drm/i915: properly set ppgtt cacheability on snb by Daniel Vetter · 13 years ago
  32. be901a5 drm/i915: set w/a bit for snb pagefaults by Daniel Vetter · 13 years ago
  33. de4a8bd drm/i915: implement a media hang w/a by Daniel Vetter · 13 years ago
  34. 7678789 Merge tag 'v3.4-rc3' into drm-intel-next-queued by Daniel Vetter · 13 years ago
  35. cce66a2 drm/i915: add rc6 residency times to debugfs by Ben Widawsky · 13 years ago
  36. effbc4f Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel into drm-core-next by Dave Airlie · 13 years ago
  37. 80e829f drm/i915: implement ColorBlt w/a by Daniel Vetter · 13 years ago
  38. 9d2f41f drm/i915: dump the DMA fetch addr register on pre-gen6 by Daniel Vetter · 13 years ago
  39. e2a1e2f drm/i915: ring irq cleanups by Ben Widawsky · 13 years ago
  40. 96d6e35 drm/i915: add SFUSE_STRAP registers for digital port detection by Eugeni Dodonov · 13 years ago
  41. 69e94b7 drm/i915: add WM_LINETIME registers by Eugeni Dodonov · 13 years ago
  42. 4dffc40 drm/i915: add WRPLL clocks by Eugeni Dodonov · 13 years ago
  43. 90e8d31 drm/i915: add LCPLL control registers by Eugeni Dodonov · 13 years ago
  44. ccf1c86 drm/i915: add SSC offsets for SBI access by Eugeni Dodonov · 13 years ago
  45. fec9181 drm/i915: add port clock selection support for HSW by Eugeni Dodonov · 13 years ago
  46. e93ea06 drm/i915: add S PLL control by Eugeni Dodonov · 13 years ago
  47. 52f025e drm/i915: add PIXCLK_GATE register by Eugeni Dodonov · 13 years ago
  48. 7501a4d drm/i915: add SBI registers by Eugeni Dodonov · 13 years ago
  49. bb879a4 drm/i915: add definition of DDI buffer translations regs by Eugeni Dodonov · 13 years ago
  50. 03f896a drm/i915: add definitions for DDI_BUF_CTL registers by Eugeni Dodonov · 13 years ago
  51. e411b2c drm/i915: add DP_TP_STATUS registers by Eugeni Dodonov · 13 years ago
  52. 0e87f66 drm/i915: add DP_TP_CTL registers by Eugeni Dodonov · 13 years ago
  53. e7e104c drm/i915: add DDI registers by Eugeni Dodonov · 13 years ago
  54. 2b13952 drm/i915: add enumeration for DDI ports by Eugeni Dodonov · 13 years ago
  55. 9eb3a75 drm/i915: add support for power wells by Eugeni Dodonov · 13 years ago
  56. f47166d drm/i915: Sanitize BIOS debugging bits from PIPECONF by Chris Wilson · 13 years ago
  57. 7e231dbe drm/i915: ValleyView IRQ support by Jesse Barnes · 13 years ago
  58. c46ce4d drm/i915: interrupt bit definitions for VLV by Jesse Barnes · 13 years ago
  59. 575155a drm/i915: add ValleyView specific force wake get/put functions by Jesse Barnes · 13 years ago
  60. 90b107c drm/i915: Enable HDMI on ValleyView by Shobhit Kumar · 13 years ago
  61. 12a3c05 drm/i915: program drain latency regs on ValleyView by Gajanan Bhat · 13 years ago
  62. fb04685 drm/i915: add ValleyView clock gating init by Jesse Barnes · 13 years ago
  63. 57f350b drm/i915: add DPIO support by Jesse Barnes · 13 years ago
  64. 25eb05fc drm/i915: PLL defines for VLV by Jesse Barnes · 13 years ago
  65. ceb0424 drm/i915: ValleyView watermark support by Jesse Barnes · 13 years ago
  66. 2ed06c9 drm/i915/intel_i2c: gmbus disabled and reserved ports are invalid by Daniel Kurtz · 13 years ago
  67. e4fd17a drm/i915/intel_i2c: assign HDMI port D to pin pair 6 by Daniel Kurtz · 13 years ago
  68. 7eea1dd drm/i915: re-order GT IIR bit definitions by Jesse Barnes · 13 years ago
  69. be53bfd Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux by Linus Torvalds · 13 years ago
  70. 8229c88 drm: Merge tag 'v3.3-rc7' into drm-core-next by Dave Airlie · 13 years ago
  71. ab2f9df drm/i915: fix color order for BGR formats on SNB by Jesse Barnes · 13 years ago
  72. 7c26e5c drm/i915: add missing SDVO bits for interlaced modes on ILK by Paulo Zanoni · 13 years ago
  73. dd202c6 drm/i915: use gtfifodbg by Ben Widawsky · 13 years ago
  74. d71de14 drm/i915: gen7: Disable the RHWO optimization as it can cause GPU hangs. by Kenneth Graunke · 13 years ago
  75. db099c8 drm/i915: gen7: work around a system hang on IVB by Eugeni Dodonov · 13 years ago
  76. e4e0c05 drm/i915: gen7: Implement an L3 caching workaround. by Eugeni Dodonov · 13 years ago
  77. eae66b5 drm/i915: gen7: implement rczunit workaround by Eugeni Dodonov · 13 years ago
  78. 5f7f726 drm/i915: set interlaced bits for TRANSCONF by Paulo Zanoni · 13 years ago
  79. 0529a0d drm/i915: correctly program the VSYNCSHIFT register by Daniel Vetter · 13 years ago
  80. d442ae1 drm/i915: clean up interlaced pipeconf bit definitions by Daniel Vetter · 13 years ago
  81. 5eb719c drm/i915: ppgtt register definitions by Daniel Vetter · 13 years ago
  82. 1d2a314 drm/i915: initialization/teardown for the aliasing ppgtt by Daniel Vetter · 13 years ago
  83. f691e2f drm/i915: swizzling support for snb/ivb by Daniel Vetter · 13 years ago
  84. 33f3f51 drm/i915: add per-ring fault reg to error_state by Daniel Vetter · 13 years ago
  85. c1cd90e drm/i915: collect more per ring error state by Daniel Vetter · 13 years ago
  86. d27b1e0 drm/i915: refactor ring error state capture to use arrays by Daniel Vetter · 13 years ago
  87. b6daa02 drm/i915: set AUD_CONFIG N_value_index for DisplayPort by Wu Fengguang · 13 years ago
  88. fc74d8e drm/i915: Correct the bit number for the MI_FLUSH_ENABLE. by Eric Anholt · 13 years ago
  89. ae662d3 drm/i915: Add support for resetting the SO write pointers on gen7. by Eric Anholt · 13 years ago
  90. 116ac8d drm/i915: Set two chicken bits implicated in missed IRQs on Ivybridge. by Eric Anholt · 13 years ago
  91. 8ea3086 drm/i915: add color key support v4 by Jesse Barnes · 13 years ago
  92. b840d907f drm/i915: add SNB and IVB video sprite support v6 by Jesse Barnes · 13 years ago
  93. 4d85529 drm/i915: drpc debugfs update for gen6 by Ben Widawsky · 13 years ago
  94. 6ed55ee drm/i915: Update GEN6_RP_CONTROL definitions by Ben Widawsky · 13 years ago
  95. 84f9f93 drm/i915: Force sync command ordering (Gen6+) by Ben Widawsky · 13 years ago
  96. 2318fcd Merge branch 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux into drm-core-next by Dave Airlie · 13 years ago
  97. 1fbe6f6 Merge tag 'v3.2-rc6' of /home/airlied/devel/kernel/linux-2.6 into drm-core-next by Dave Airlie · 13 years ago
  98. 59df7b1 drm/intel: Fix initialization if startup happens in interlaced mode [v2] by Christian Schmidt · 13 years ago
  99. 1202b4c6 drm/i915: rename audio ELD registers by Wu Fengguang · 13 years ago
  100. 3573c41 drm/i915: set the right SDVO transcoder for CPT by Paulo Zanoni · 13 years ago