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gerrit-public.fairphone.software / kernel / msm-4.9 / 7f0801e566cc78315e5dc383bf3c3b5b5b436048 / drivers / gpu / drm / i915 / intel_pm.c
  1. d2dee86 drm/i915: extract intel_init_fbc() by Paulo Zanoni · 10 years ago
  2. 342e36c drm/i915: Avoid reading fbc registers in vain when fbc was never enabled. by Rodrigo Vivi · 10 years ago
  3. 01d06e9 drm/i915: Only flush fbc on sw when fbc is enabled. by Rodrigo Vivi · 10 years ago
  4. d6feb19 drm/i915: Limit the watermark to at least 8 entries on gen2/3 by Ville Syrjälä · 10 years ago
  5. 773538e8 drm/i915: Reset power sequencer pipe tracking when disp2d is off by Ville Syrjälä · 10 years ago
  6. 5aef600 drm/i915: Rename global latency_ns variable by Chris Wilson · 10 years ago
  7. 1038392 drm/i915: Disable trickle feed for gen2/3 by Ville Syrjälä · 10 years ago
  8. 9d53910 drm/i915: Fix gen2 planes B and C max watermark value by Ville Syrjälä · 10 years ago
  9. 00e1e62 drm/i915: Init some CHV workarounds via LRIs in ring->init_context() by Ville Syrjälä · 10 years ago
  10. 1c14762 drm/i915: Warn about odd rps values on CHV by Ville Syrjälä · 10 years ago
  11. c76bb61 drm/i915/bdw: BDW Software Turbo by Daisy Sun · 10 years ago
  12. 2bb25c1 drm/i915: Populate mem_freq in init_gt_powerwave() by Ville Syrjälä · 10 years ago
  13. 86d7f23 drm/i915/bdw: Apply workarounds in render ring init function by Arun Siluvery · 10 years ago
  14. c5ad011 drm/i915: FBC flush nuke for BDW by Rodrigo Vivi · 10 years ago
  15. 47c2bd9 drm/i915: rename gen8_init_clock_gating to broadwell_init_clock_gating by Paulo Zanoni · 10 years ago
  16. 89d6b2b drm/i915: call lpt_init_clock_gating on BDW too by Paulo Zanoni · 10 years ago
  17. 98a2e5f drm/i915: Bring UP Power Wells before disabling RC6. by Deepak S · 10 years ago
  18. 055e393 drm/i915: Use dev_priv as first argument of for_each_pipe() by Damien Lespiau · 10 years ago
  19. 48404c1 drm/i915: Add 180 degree primary plane rotation support by Sonika Jindal · 10 years ago
  20. a18b29f Merge tag 'drm-intel-next-2014-09-01' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  21. d5a0f2e Merge tag 'drm-intel-next-2014-08-08' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  22. 1bee201 drm/i915: Remove set but unused 'gt_perf_status' by Damien Lespiau · 10 years ago
  23. 889fa782 Merge tag 'drm-intel-fixes-2014-08-08' of git://anongit.freedesktop.org/drm-intel by Linus Torvalds · 10 years ago
  24. 01e184c drm/i915: Add sprite watermark programming for VLV and CHV by Gajanan Bhat · 10 years ago
  25. a398e9c drm/i915: Round-up clock and limit drain latency by Gajanan Bhat · 10 years ago
  26. 0948c26 drm/i915: Generalize drain latency computation by Gajanan Bhat · 10 years ago
  27. efd814b drm/i915: Polish the chv cmnlane resrt macros by Ville Syrjälä · 10 years ago
  28. 3dd7b974 drm/i915: Hack to tie both common lanes together on chv by Ville Syrjälä · 10 years ago
  29. 3c2777f drm/i915: Add cherryview_update_wm() by Ville Syrjälä · 10 years ago
  30. 41aad81 drm/i915: Update DDL only for current CRTC by Gajanan Bhat · 10 years ago
  31. 1abc4dc drm/i915: Parametrize VLV_DDL registers by Ville Syrjälä · 10 years ago
  32. 0a56067 drm/i915: Fill out the FWx watermark register defines by Ville Syrjälä · 10 years ago
  33. da46f93 drm/i915: Introduce FBC False Color for debug purposes. by Rodrigo Vivi · 10 years ago
  34. a504345 drm/i915: Split a few long debug prints by Ville Syrjälä · 10 years ago
  35. 2ce147f drm/i915: Add chv port D TX wells by Ville Syrjälä · 10 years ago
  36. 8258356 drm/i915: Add chv port B and C TX wells by Ville Syrjälä · 10 years ago
  37. 26972b0 drm/i915: Add per-pipe power wells for chv by Ville Syrjälä · 10 years ago
  38. f07057d drm/i915: Add disp2d power well for chv by Ville Syrjälä · 10 years ago
  39. 5d6f7ea drm/i915: Add chv cmnlane power wells by Ville Syrjälä · 10 years ago
  40. 4811ff4 drm/i915: Add chv_power_wells[] by Ville Syrjälä · 10 years ago
  41. a7d7a14 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux by Linus Torvalds · 10 years ago
  42. 69bbeb4 drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values by Ville Syrjälä · 10 years ago
  43. 22c5aee drm/i915: Fix drain latency precision multipler for VLV by Zhenyu Wang · 11 years ago
  44. df662a2 drm/i915: Tune down MCH_SSKPD values warning by Daniel Vetter · 10 years ago
  45. 8dfd1f0 drm/i915: Tune done rc6 enabling output by Daniel Vetter · 10 years ago
  46. 5ed0bdf drm: i915: Use nsec based interfaces by Thomas Gleixner · 10 years ago
  47. 9df7575f drm/i915: add helper for checking whether IRQs are enabled by Jesse Barnes · 10 years ago
  48. d49bdb0 drm/i915: extract and improve gen8_irq_power_well_post_enable by Paulo Zanoni · 10 years ago
  49. 480c803 drm/i915: Use genX_ prefix for gt irq enable/disable functions by Daniel Vetter · 10 years ago
  50. ed57cb8 drm/i915: Also give the sprite width for WM computation by Damien Lespiau · 10 years ago
  51. 3463811 drm/i915/chv: Drop WaGsvBringDownFreqInRc6 by Deepak S · 10 years ago
  52. b47adc1 drm/i915: Force GPU Freq to lowest while suspending. by Deepak S · 10 years ago
  53. b55dd64 drm/i915: byt_gpu_freq() can be static by Fengguang Wu · 10 years ago
  54. 7707df4 drm/i915: Add RP1 render P state thresholds in CHV by Deepak S · 10 years ago
  55. 3497a56 drm/i915/chv: Add basic PM interrupt support for CHV by Deepak S · 10 years ago
  56. 22b1b2f drm/i915: CHV GPU frequency to opcode functions by Deepak S · 10 years ago
  57. 67c3bf6 drm/i915: populate mem_freq/cz_clock for chv by Deepak S · 10 years ago
  58. f8f2b00 drm/i915: Read guaranteed freq for valleyview by Deepak S · 10 years ago
  59. 03af204 drm/i915: Use the cached min/min/rpe values in the vlv debugfs code by Ville Syrjälä · 10 years ago
  60. 7b3c29f drm/i915: Make the RPS interrupt generation mask handle the vlv wa by Chris Wilson · 10 years ago
  61. bd2bb1b drm/i915: add POWER_DOMAIN_PLLS by Paulo Zanoni · 10 years ago
  62. 2ff8fde drm/i915: Make use of intel_fb_obj() (v2) by Matt Roper · 10 years ago
  63. 31685c2 drm/i915/vlv: WA for Turbo and RC6 to work together. by Deepak S · 10 years ago
  64. b3f9ad9 drm/i915/bdw: 3D_CHICKEN3 has write mask bits by Michel Thierry · 10 years ago
  65. 9858425 drm/i915: gmch: set SR WMs to valid values before enabling them by Imre Deak · 10 years ago
  66. 5209b1f drm/i915: gmch: factor out intel_set_memory_cxsr by Imre Deak · 10 years ago
  67. d2011dc drm/i915: Move VLV cmnlane workaround to intel_power_domains_init_hw() by Ville Syrjälä · 10 years ago
  68. aa519f2 drm/i915: Pull the cmnlane tricks into its own power well ops by Ville Syrjälä · 10 years ago
  69. f8bf63f drm/i915: Kill duplicated cdclk readout code from i2c by Ville Syrjälä · 10 years ago
  70. d197b7d drm/i915: Move vlv cdclk code to .get_display_clock_speed() by Ville Syrjälä · 10 years ago
  71. dfcab17 drm/i915: Change vlv cdclk to use kHz units by Ville Syrjälä · 10 years ago
  72. f1615bb Merge tag 'v3.16-rc4' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  73. dfd7aec Merge tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-intel by Dave Airlie · 10 years ago
  74. 88b5a85 Merge tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound by Linus Torvalds · 10 years ago
  75. c149dcb drm/i915: provide interface for audio driver to query cdclk by Jani Nikula · 10 years ago
  76. 5e59f71 drm/i915: Try harder to get FBC by Ben Widawsky · 10 years ago
  77. 0d68b25 drm/i915/bdw: Use timeout mode for RC6 on bdw by Tom O'Rourke · 10 years ago
  78. 5549d25 drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin by Deepak S · 10 years ago
  79. bfafe93 drm/i915: cache hw power well enabled state by Imre Deak · 10 years ago
  80. 4ef6107 Merge tag 'sound-3.16-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound by Linus Torvalds · 10 years ago
  81. e11aa36 drm/i915: use runtime irq suspend/resume in freeze/thaw by Jesse Barnes · 10 years ago
  82. 5d0cf3d Merge branch 'topic/soix' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  83. 032843a drm/i915: Broaden FBC resolution limit to 4096*4096 by Daisy Sun · 10 years ago
  84. 74b0c2d drm/i915, HD-audio: Don't continue probing when nomodeset is given by Takashi Iwai · 10 years ago
  85. 7405f42 drm/i915/chv: Fix "drm/i915/chv: Add a bunch of pre production workarounds" by Tom O'Rourke · 10 years ago
  86. e0f0273 drm/i915: Use named initializers for gmch wm params by Ville Syrjälä · 10 years ago
  87. 223a6f2 drm/i915/bdw: remove erroneous chv specific workarounds from bdw code by Tom O'Rourke · 10 years ago
  88. 10d8d36 drm/i915: Unifiy GT powersave suspend logic by Daniel Vetter · 10 years ago
  89. 156c7ca drm/i915: leave rc6 enabled at suspend time v4 by Jesse Barnes · 10 years ago
  90. 2b6b3a0 drm/i915/chv: Enable RPS (Turbo) for Cherryview by Deepak S · 10 years ago
  91. 3880774 drm/i915/chv: Enable Render Standby (RC6) for Cherryview by Deepak S · 10 years ago
  92. 0368920 drm/i915: Disable FBC by default also on Haswell and later by Chris Wilson · 10 years ago
  93. ecb889e Merge tag 'drm-intel-fixes-2014-06-06' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  94. 8d4ad9d Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next by Dave Airlie · 10 years ago
  95. b8c000d drm/i915: fix display power sw state reporting by Imre Deak · 10 years ago
  96. dbb4274 drm/i915: Move the C3 LP write bit setup to gen3_init_clock_gating() for KMS by Ville Syrjälä · 11 years ago
  97. 54e472a drm/i915: Enable interrupt-based AGPBUSY# enable on 85x by Ville Syrjälä · 11 years ago
  98. 3299254 drm/i915: Flip the sense of AGPBUSY_DIS bit by Ville Syrjälä · 11 years ago
  99. 12fabbcb9 drm/i915: Set AGPBUSY# bit in init_clock_gating by Ville Syrjälä · 11 years ago
  100. 4dfbd12 drm/i915/vlv: add pll assertion when disabling DPIO common well by Jesse Barnes · 10 years ago