1. 82ce742 clk: tegra: Fix cdev1 and cdev2 IDs by Prashant Gaikwad · 11 years ago
  2. ce91068 clk: tegra: Make gr2d and gr3d clocks children of pll_c by Thierry Reding · 11 years ago
  3. 8aa15d8 Merge branch 'for-3.10/soc' into for-3.10/clk by Stephen Warren · 11 years ago
  4. bf161d2 clk: tegra: No 7.1 super clk dividers on Tegra20 by Peter De Schrijver · 11 years ago
  5. 984b839 clk: Tegra: Remove duplicate smp_twd clock by Prashant Gaikwad · 11 years ago
  6. 527fad1 clk: tegra: initialise parent of uart clocks by Laxman Dewangan · 11 years ago
  7. 0203d91 clk: tegra: fix driver to match DT binding by Stephen Warren · 11 years ago
  8. d076a20 clk: tegra: Add missing spinlock for hclk and pclk by Peter De Schrijver · 11 years ago
  9. 4a2e327 clk: tegra20: Implementing CPU low-power function for tegra_cpu_car_ops by Joseph Lo · 12 years ago
  10. e5dd263 clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s by Prashant Gaikwad · 12 years ago
  11. 37c26a9 clk: tegra: add clock support for Tegra20 by Prashant Gaikwad · 12 years ago