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gerrit-public.fairphone.software / kernel / msm-4.9 / refs/tags/FP3-REL-Q-3.A.0107 / include / dt-bindings / clock / mdss-10nm-pll-clk.h
  1. 9deca51 clk: qcom: mdss: add support for 10nm DSI PLL shadow clock by Sandeep Panda · 6 years ago
  2. b6adb3a clk: qcom: mdss: Fix DSI clock divider configuration by Rajkumar Subbiah · 7 years ago
  3. 6f0508d clk: qcom: mdss: add upstream clock framework support for 10nm DP PLL by Padmanabhan Komanduru · 7 years ago
  4. 704b93b msm: clk: qcom: upstream clock framework support on 10nm MDSS PLL by Shashank Babu Chinta Venkata · 7 years ago